Merge branch 'u-boot-samsung/master' into 'u-boot-arm/master'

[karo-tx-uboot.git] / include / configs / canmb.h

diff --git a/include/configs/canmb.h b/include/configs/canmb.h
index 1f275e5dbcffa43b150adca88b98b435544361f9..c90179380f838e951df02956efb14267f9db074a 100644 (file)
--- a/include/configs/canmb.h
+++ b/include/configs/canmb.h
@@ -2,23 +2,7 @@
  * (C) Copyright 2005
  * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
  *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.         See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
+ * SPDX-License-Identifier:    GPL-2.0+
  */
 
 #ifndef __CONFIG_H
@@ -29,14 +13,17 @@
  * (easy to change)
  */
 
-#define CONFIG_MPC5xxx         1       /* This is an MPC5xxx CPU */
-#define CONFIG_MPC5200         1       /* More exactly a MPC5200 */
+#define CONFIG_MPC5200         1       /* This is a MPC5200 CPU */
 #define CONFIG_CANMB           1       /* ... on canmb board - we need this for FEC.C */
 
-#define CONFIG_SYS_MPC5XXX_CLKIN       33000000 /* ... running at 33.000000MHz */
+/*
+ * allowed and functional CONFIG_SYS_TEXT_BASE values:
+ * 0xfe000000  low boot at 0x00000100 (default board setting)
+ * 0x00100000  RAM load and test
+ */
+#define        CONFIG_SYS_TEXT_BASE    0xFE000000
 
-#define BOOTFLAG_COLD          0x01    /* Normal Power-On: Boot from FLASH  */
-#define BOOTFLAG_WARM          0x02    /* Software reboot           */
+#define CONFIG_SYS_MPC5XXX_CLKIN       33000000 /* ... running at 33.000000MHz */
 
 #define CONFIG_BOARD_EARLY_INIT_R
 
@@ -77,11 +64,11 @@
 /*
  * MUST be low boot - HIGHBOOT is not supported anymore
  */
-#if (TEXT_BASE == 0xFE000000)          /* Boot low with 32 MB Flash */
+#if (CONFIG_SYS_TEXT_BASE == 0xFE000000)               /* Boot low with 32 MB Flash */
 #   define CONFIG_SYS_LOWBOOT          1
 #   define CONFIG_SYS_LOWBOOT16        1
 #else
-#   error "TEXT_BASE must be 0xFE000000"
+#   error "CONFIG_SYS_TEXT_BASE must be 0xFE000000"
 #endif
 
 /*
@@ -153,14 +140,13 @@
 
 /* Use SRAM until RAM will be available */
 #define CONFIG_SYS_INIT_RAM_ADDR       MPC5XXX_SRAM
-#define CONFIG_SYS_INIT_RAM_END        MPC5XXX_SRAM_SIZE       /* End of used area in DPRAM */
+#define CONFIG_SYS_INIT_RAM_SIZE       MPC5XXX_SRAM_SIZE       /* Size of used area in DPRAM */
 
 
-#define CONFIG_SYS_GBL_DATA_SIZE       128     /* size in bytes reserved for initial data */
-#define CONFIG_SYS_GBL_DATA_OFFSET     (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE)
+#define CONFIG_SYS_GBL_DATA_OFFSET     (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
 #define CONFIG_SYS_INIT_SP_OFFSET      CONFIG_SYS_GBL_DATA_OFFSET
 
-#define CONFIG_SYS_MONITOR_BASE    TEXT_BASE
+#define CONFIG_SYS_MONITOR_BASE    CONFIG_SYS_TEXT_BASE
 #if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE)
 #   define CONFIG_SYS_RAMBOOT          1
 #endif
@@ -187,7 +173,6 @@
  * Miscellaneous configurable options
  */
 #define CONFIG_SYS_LONGHELP                    /* undef to save memory     */
-#define CONFIG_SYS_PROMPT              "=> "   /* Monitor Command Prompt   */
 #if defined(CONFIG_CMD_KGDB)
 #  define CONFIG_SYS_CBSIZE            1024    /* Console I/O Buffer Size  */
 #else
@@ -202,8 +187,6 @@
 
 #define CONFIG_SYS_LOAD_ADDR           0x200000        /* default load address */
 
-#define CONFIG_SYS_HZ                  1000    /* decrementer freq: 1 ms ticks */
-
 #define CONFIG_RTC_MPC5200     1       /* use internal MPC5200 RTC */
 
 #define CONFIG_SYS_CACHELINE_SIZE      32      /* For MPC5xxx CPUs */