]> git.kernelconcepts.de Git - karo-tx-uboot.git/blobdiff - include/configs/corenet_ds.h
Update from 2013.01 to 2013.07
[karo-tx-uboot.git] / include / configs / corenet_ds.h
index 3f42cd9a38ecc939dc9e55853f092eb4e71580a4..c0591c52770d9083b4291bfccea69271bbcb3649 100644 (file)
@@ -1,23 +1,7 @@
 /*
  * Copyright 2009-2012 Freescale Semiconductor, Inc.
  *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
+ * SPDX-License-Identifier:    GPL-2.0+
  */
 
 /*
@@ -38,6 +22,8 @@
 #define CONFIG_PBLRCW_CONFIG $(SRCTREE)/board/freescale/corenet_ds/rcw_p4080ds.cfg
 #elif defined(CONFIG_P5020DS)
 #define CONFIG_PBLRCW_CONFIG $(SRCTREE)/board/freescale/corenet_ds/rcw_p5020ds.cfg
+#elif defined(CONFIG_P5040DS)
+#define CONFIG_PBLRCW_CONFIG $(SRCTREE)/board/freescale/corenet_ds/rcw_p5040ds.cfg
 #endif
 #endif
 
 #define CONFIG_FIT_VERBOSE     /* enable fit_format_{error,warning}() */
 
 /* I2C */
-#define CONFIG_FSL_I2C         /* Use FSL common I2C driver */
-#define CONFIG_HARD_I2C                /* I2C with hardware support */
-#define CONFIG_I2C_MULTI_BUS
-#define CONFIG_I2C_CMD_TREE
-#define CONFIG_SYS_I2C_SPEED           400000  /* I2C speed and slave address */
-#define CONFIG_SYS_I2C_SLAVE           0x7F
-#define CONFIG_SYS_I2C_OFFSET          0x118000
-#define CONFIG_SYS_I2C2_OFFSET         0x118100
+#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_FSL
+#define CONFIG_SYS_FSL_I2C_SPEED       400000
+#define CONFIG_SYS_FSL_I2C_SLAVE       0x7F
+#define CONFIG_SYS_FSL_I2C_OFFSET      0x118000
+#define CONFIG_SYS_FSL_I2C2_SPEED      400000
+#define CONFIG_SYS_FSL_I2C2_SLAVE      0x7F
+#define CONFIG_SYS_FSL_I2C2_OFFSET     0x118100
 
 /*
  * RapidIO
 #endif
 
 #ifdef CONFIG_PCI
+#define CONFIG_PCI_INDIRECT_BRIDGE
 #define CONFIG_PCI_PNP                 /* do pci plug-and-play */
 #define CONFIG_E1000
 
 #define        CONFIG_EXTRA_ENV_SETTINGS                               \
        "hwconfig=fsl_ddr:ctlr_intlv=cacheline,"                \
        "bank_intlv=cs0_cs1;"                                   \
+       "usb2:dr_mode=peripheral,phy_type=" __stringify(__USB_PHY_TYPE) ";"\
        "usb1:dr_mode=host,phy_type=" __stringify(__USB_PHY_TYPE) "\0"\
        "netdev=eth0\0"                                         \
        "uboot=" __stringify(CONFIG_UBOOTPATH) "\0"             \