devkit8000: add rootwait to mmcboot option

[karo-tx-uboot.git] / include / configs / devkit8000.h

diff --git a/include/configs/devkit8000.h b/include/configs/devkit8000.h
index 4b58dc3bcb9ed9b6fe962e99ae5a879207ebf668..1e658067e04e604b10d03eab4e6734e7ee7d32c9 100644 (file)
--- a/include/configs/devkit8000.h
+++ b/include/configs/devkit8000.h
@@ -35,8 +35,16 @@
 #define CONFIG_OMAP            1       /* in a TI OMAP core */
 #define CONFIG_OMAP34XX                1       /* which is a 34XX */
 #define CONFIG_OMAP3_DEVKIT8000        1       /* working with DevKit8000 */
+#define CONFIG_MACH_TYPE       MACH_TYPE_DEVKIT8000
+#define CONFIG_OMAP_GPIO
 
-#define        CONFIG_SYS_TEXT_BASE    0x80008000
+/*
+ * 1MB into the SDRAM to allow for SPL's bss at the beginning of SDRAM
+ * 64 bytes before this address should be set aside for u-boot.img's
+ * header. That is 0x800FFFC0--0x80100000 should not be used for any
+ * other needs.
+ */
+#define CONFIG_SYS_TEXT_BASE   0x80100000
 
 #define CONFIG_SDRC    /* The chip has SDRC controller */
 
@@ -51,7 +59,6 @@
 #define V_OSCK                         26000000        /* Clock output from T2 */
 #define V_SCLK                         (V_OSCK >> 1)
 
-#undef CONFIG_USE_IRQ                  /* no support for IRQs */
 #define CONFIG_MISC_INIT_R
 
 #define CONFIG_CMDLINE_TAG             1       /* enable passing of ATAGs */
@@ -191,6 +198,7 @@
                "run commonargs; " \
                "setenv bootargs ${bootargs} " \
                "root=/dev/mmcblk0p2 " \
+               "rootwait " \
                "${kernelopts}\0" \
        "nandargs=" \
                "run commonargs; " \
@@ -243,7 +251,6 @@
 #define CONFIG_SYS_LONGHELP            /* undef to save memory */
 #define CONFIG_SYS_HUSH_PARSER         /* use "hush" command parser */
 #define CONFIG_AUTO_COMPLETE           1
-#define CONFIG_SYS_PROMPT_HUSH_PS2     "> "
 #define CONFIG_SYS_PROMPT              "OMAP3 DevKit8000 # "
 #define CONFIG_SYS_CBSIZE              512     /* Console I/O Buffer Size */
 /* Print Buffer Size */
@@ -269,9 +276,6 @@
 #define CONFIG_SYS_PTV                 2 /* Divisor: 2^(PTV+1) => 8 */
 #define CONFIG_SYS_HZ                  1000
 
-/* The stack sizes are set up in start.S using the settings below */
-#define CONFIG_STACKSIZE       (128 << 10)     /* regular stack 128 KiB */
-
 /*  Physical Memory Map  */
 #define CONFIG_NR_DRAM_BANKS           2 /* CS1 may or may not be populated */
 #define PHYS_SDRAM_1                   OMAP34XX_SDRC_CS0
@@ -300,13 +304,16 @@
 
 /* Defines for SPL */
 #define CONFIG_SPL
+#define CONFIG_SPL_FRAMEWORK
 #define CONFIG_SPL_NAND_SIMPLE
 
 #define CONFIG_SPL_LIBCOMMON_SUPPORT
 #define CONFIG_SPL_LIBDISK_SUPPORT
+#define CONFIG_SPL_BOARD_INIT
 #define CONFIG_SPL_I2C_SUPPORT
 #define CONFIG_SPL_LIBGENERIC_SUPPORT
 #define CONFIG_SPL_SERIAL_SUPPORT
+#define CONFIG_SPL_GPIO_SUPPORT
 #define CONFIG_SPL_POWER_SUPPORT
 #define CONFIG_SPL_NAND_SUPPORT
 #define CONFIG_SPL_MMC_SUPPORT
@@ -317,10 +324,10 @@
 #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300 /* address 0x60000 */
 
 #define CONFIG_SPL_TEXT_BASE           0x40200000 /*CONFIG_SYS_SRAM_START*/
-#define CONFIG_SPL_MAX_SIZE            0xB400  /* 45 K */
+#define CONFIG_SPL_MAX_SIZE            (54 * 1024)     /* 8 KB for stack */
 #define CONFIG_SPL_STACK               LOW_LEVEL_SRAM_STACK
 
-#define CONFIG_SPL_BSS_START_ADDR      0x80000000 /*CONFIG_SYS_SDRAM_BASE*/
+#define CONFIG_SPL_BSS_START_ADDR       0x80000500 /* leave space for bootargs*/
 #define CONFIG_SPL_BSS_MAX_SIZE                0x80000
 
 /* NAND boot config */
@@ -336,17 +343,23 @@
 #define CONFIG_SYS_NAND_ECCSIZE                512
 #define CONFIG_SYS_NAND_ECCBYTES       3
 
-#define CONFIG_SYS_NAND_ECCSTEPS       (CONFIG_SYS_NAND_PAGE_SIZE / \
-                                               CONFIG_SYS_NAND_ECCSIZE)
-#define CONFIG_SYS_NAND_ECCTOTAL       (CONFIG_SYS_NAND_ECCBYTES * \
-                                               CONFIG_SYS_NAND_ECCSTEPS)
-
 #define CONFIG_SYS_NAND_U_BOOT_START   CONFIG_SYS_TEXT_BASE
 
 #define CONFIG_SYS_NAND_U_BOOT_OFFS    0x80000
 #define CONFIG_SYS_NAND_U_BOOT_SIZE    0x200000
 
-#define CONFIG_SYS_SPL_MALLOC_START    0x80108000
+#define CONFIG_SYS_SPL_MALLOC_START    0x80208000
 #define CONFIG_SYS_SPL_MALLOC_SIZE     0x100000        /* 1 MB */
 
+/* SPL OS boot options */
+#define CONFIG_SPL_OS_BOOT
+#define CONFIG_SPL_OS_BOOT_KEY 26
+
+#define CONFIG_CMD_SPL
+#define CONFIG_CMD_SPL_WRITE_SIZE       0x400 /* 1024 byte */
+#define CONFIG_CMD_SPL_NAND_OFS (CONFIG_SYS_NAND_SPL_KERNEL_OFFS+\
+                                       0x400000)
+#define CONFIG_SYS_NAND_SPL_KERNEL_OFFS 0x280000
+#define CONFIG_SYS_SPL_ARGS_ADDR        (PHYS_SDRAM_1 + 0x100)
+
 #endif /* __CONFIG_H */