Merge remote-tracking branch 'u-boot-imx/master'

[karo-tx-uboot.git] / include / configs / devkit8000.h

diff --git a/include/configs/devkit8000.h b/include/configs/devkit8000.h
index 788227d79d0233f8527b6c245ac92b36e49d8f61..7ab6d51642d5fb1457bf33537482fdd9d1e8d9ff 100644 (file)
--- a/include/configs/devkit8000.h
+++ b/include/configs/devkit8000.h
@@ -9,23 +9,7 @@
  *
  * Configuration settings for the DevKit8000 board.
  *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.         See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
+ * SPDX-License-Identifier:    GPL-2.0+
  */
 
 #ifndef __CONFIG_H
@@ -33,10 +17,10 @@
 
 /* High Level Configuration Options */
 #define CONFIG_OMAP            1       /* in a TI OMAP core */
-#define CONFIG_OMAP34XX                1       /* which is a 34XX */
 #define CONFIG_OMAP3_DEVKIT8000        1       /* working with DevKit8000 */
 #define CONFIG_MACH_TYPE       MACH_TYPE_DEVKIT8000
 #define CONFIG_OMAP_GPIO
+#define CONFIG_OMAP_COMMON
 
 /*
  * 1MB into the SDRAM to allow for SPL's bss at the beginning of SDRAM
@@ -105,10 +89,10 @@
 #define CONFIG_DOS_PARTITION           1
 
 /* I2C */
-#define CONFIG_HARD_I2C                        1
-#define CONFIG_SYS_I2C_SPEED           100000
-#define CONFIG_SYS_I2C_SLAVE           1
-#define CONFIG_DRIVER_OMAP34XX_I2C     1
+#define CONFIG_SYS_I2C
+#define CONFIG_SYS_OMAP24_I2C_SPEED    100000
+#define CONFIG_SYS_OMAP24_I2C_SLAVE    1
+#define CONFIG_SYS_I2C_OMAP34XX
 
 /* TWL4030 */
 #define CONFIG_TWL4030_POWER           1
@@ -131,8 +115,6 @@
 #define CONFIG_SYS_NAND_BASE           NAND_BASE       /* physical address */
                                                        /* to access nand at */
                                                        /* CS0 */
-#define GPMC_NAND_ECC_LP_x16_LAYOUT    1
-
 #define CONFIG_SYS_MAX_NAND_DEVICE     1               /* Max number of NAND */
                                                        /* devices */
 #define CONFIG_JFFS2_NAND
@@ -272,7 +254,6 @@
  */
 #define CONFIG_SYS_TIMERBASE           (OMAP34XX_GPT2)
 #define CONFIG_SYS_PTV                 2 /* Divisor: 2^(PTV+1) => 8 */
-#define CONFIG_SYS_HZ                  1000
 
 /*  Physical Memory Map  */
 #define CONFIG_NR_DRAM_BANKS           2 /* CS1 may or may not be populated */
@@ -280,8 +261,6 @@
 #define PHYS_SDRAM_2                   OMAP34XX_SDRC_CS1
 
 /* NAND and environment organization  */
-#define PISMO1_NAND_SIZE               GPMC_SIZE_128M
-
 #define CONFIG_SYS_MONITOR_LEN         (256 << 10)     /* Reserve 2 sectors */
 
 #define CONFIG_ENV_IS_IN_NAND          1
@@ -293,15 +272,14 @@
 #define CONFIG_SYS_INIT_RAM_ADDR        0x4020f800
 #define CONFIG_SYS_INIT_RAM_SIZE        0x800
 #define CONFIG_SYS_INIT_SP_ADDR         (CONFIG_SYS_INIT_RAM_ADDR + \
-                                                        CONFIG_SYS_INIT_RAM_SIZE - \
-                                                        GENERATED_GBL_DATA_SIZE)
+                                                        CONFIG_SYS_INIT_RAM_SIZE - \
+                                                        GENERATED_GBL_DATA_SIZE)
 
 /* SRAM config */
 #define CONFIG_SYS_SRAM_START              0x40200000
 #define CONFIG_SYS_SRAM_SIZE               0x10000
 
 /* Defines for SPL */
-#define CONFIG_SPL
 #define CONFIG_SPL_FRAMEWORK
 #define CONFIG_SPL_NAND_SIMPLE
 
@@ -332,6 +310,7 @@
 #define CONFIG_SPL_BSS_MAX_SIZE                0x80000
 
 /* NAND boot config */
+#define CONFIG_SYS_NAND_BUSWIDTH_16BIT 16
 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
 #define CONFIG_SYS_NAND_PAGE_COUNT     64
 #define CONFIG_SYS_NAND_PAGE_SIZE      2048
@@ -343,6 +322,7 @@
 
 #define CONFIG_SYS_NAND_ECCSIZE                512
 #define CONFIG_SYS_NAND_ECCBYTES       3
+#define CONFIG_NAND_OMAP_ECCSCHEME     OMAP_ECC_HAM1_CODE_HW
 
 #define CONFIG_SYS_NAND_U_BOOT_START   CONFIG_SYS_TEXT_BASE
 
@@ -360,6 +340,14 @@
 #define CONFIG_CMD_SPL_NAND_OFS (CONFIG_SYS_NAND_SPL_KERNEL_OFFS+\
                                        0x400000)
 #define CONFIG_SYS_NAND_SPL_KERNEL_OFFS 0x280000
+
+#define CONFIG_SPL_FAT_LOAD_KERNEL_NAME                "uImage"
+#define CONFIG_SPL_FAT_LOAD_ARGS_NAME          "args"
+
+#define CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR        0x500 /* address 0xa0000 */
+#define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR  0x8   /* address 0x1000 */
+#define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS 8     /* 4KB */
+
 #define CONFIG_SYS_SPL_ARGS_ADDR        (PHYS_SDRAM_1 + 0x100)
 
 #endif /* __CONFIG_H */