Merge branch 'u-boot-microblaze/zynq' into 'u-boot-arm/master'

[karo-tx-uboot.git] / include / configs / ethernut5.h

diff --git a/include/configs/ethernut5.h b/include/configs/ethernut5.h
index 5bf8c22498c0eef30908257258372d2742246d76..480d8678c6f8f2756313ed86ff2271ff30441125 100644 (file)
--- a/include/configs/ethernut5.h
+++ b/include/configs/ethernut5.h
@@ -4,23 +4,7 @@
  *
  * Configuation settings for Ethernut 5 with AT91SAM9XE.
  *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
+ * SPDX-License-Identifier:    GPL-2.0+
  */
 
 #ifndef __CONFIG_H
@@ -47,7 +31,6 @@
 /* ARM asynchronous clock */
 #define CONFIG_SYS_AT91_SLOW_CLOCK     32768   /* slow clock xtal */
 #define CONFIG_SYS_AT91_MAIN_CLOCK     18432000 /* 18.432 MHz crystal */
-#define CONFIG_SYS_HZ                  1000
 
 /* 32kB internal SRAM */
 #define CONFIG_SRAM_BASE       0x00300000 /*AT91SAM9XE_SRAM_BASE */
@@ -166,7 +149,7 @@
 #define CONFIG_SYS_NAND_MASK_ALE       (1 << 21)
 /* our CLE is AD22 */
 #define CONFIG_SYS_NAND_MASK_CLE       (1 << 22)
-#define CONFIG_SYS_NAND_ENABLE_PIN     AT91_PIO_PORTC, 14
+#define CONFIG_SYS_NAND_ENABLE_PIN     GPIO_PIN_PC(14)
 #endif
 
 /* JFFS2 */
@@ -194,6 +177,7 @@
 /* USB */
 #ifdef CONFIG_CMD_USB
 #define CONFIG_USB_ATMEL
+#define CONFIG_USB_ATMEL_CLK_SEL_PLLB
 #define CONFIG_USB_OHCI_NEW
 #define CONFIG_SYS_USB_OHCI_CPU_INIT
 #define CONFIG_SYS_USB_OHCI_REGS_BASE  0x00500000