Merge branch 'tx28-update' into tx28-bugfix

[karo-tx-uboot.git] / include / configs / gdppc440etx.h

diff --git a/include/configs/gdppc440etx.h b/include/configs/gdppc440etx.h
index d193919dc5a0a3c0d7cbf3d06c959a5d0e2a2b85..bfaba42643e63da2306ae1bde8f59b361de82033 100644 (file)
--- a/include/configs/gdppc440etx.h
+++ b/include/configs/gdppc440etx.h
@@ -6,23 +6,7 @@
  * (C) Copyright 2005-2007
  * Stefan Roese, DENX Software Engineering, sr@denx.de.
  *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.         See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
+ * SPDX-License-Identifier:    GPL-2.0+
  */
 
 /*
@@ -37,9 +21,10 @@
 #define CONFIG_440GR           1               /* Specific PPC440GR support */
 #define CONFIG_HOSTNAME                gdppc440etx
 #define CONFIG_440             1               /* ... PPC440 family         */
-#define CONFIG_4xx             1               /* ... PPC4xx family         */
 #define CONFIG_SYS_CLK_FREQ    66666666        /* external freq to pll      */
 
+#define        CONFIG_SYS_TEXT_BASE    0xFFF80000
+
 /*
  * Include common defines/options for all AMCC eval boards
  */
@@ -47,6 +32,9 @@
 
 #define CONFIG_BOARD_EARLY_INIT_F      1       /* call board_early_init_f*/
 #define CONFIG_MISC_INIT_R             1       /* call misc_init_r()     */
+#define CONFIG_SYS_GENERIC_BOARD
+
+#undef CONFIG_ZERO_BOOTDELAY_CHECK     /* ignore keypress on bootdelay==0 */
 
 /*
  * Base addresses -- Note these are effective addresses where the
@@ -59,7 +47,6 @@
 #define CONFIG_SYS_PCI_MEMBASE3                CONFIG_SYS_PCI_MEMBASE2 + 0x10000000
 
 /*Don't change either of these*/
-#define CONFIG_SYS_PERIPHERAL_BASE     0xef600000      /* internal peripheral*/
 #define CONFIG_SYS_PCI_BASE            0xe0000000      /* internal PCI regs */
 /*Don't change either of these*/
 
@@ -71,17 +58,20 @@
  */
 #define CONFIG_SYS_INIT_RAM_DCACHE     1               /* d-cache as init ram*/
 #define CONFIG_SYS_INIT_RAM_ADDR       0x70000000      /* DCache             */
-#define CONFIG_SYS_INIT_RAM_END                (4 << 10)
-#define CONFIG_SYS_GBL_DATA_SIZE       256             /* num bytes init data*/
-#define CONFIG_SYS_GBL_DATA_OFFSET     (CONFIG_SYS_INIT_RAM_END \
-                                        - CONFIG_SYS_GBL_DATA_SIZE)
+#define CONFIG_SYS_INIT_RAM_SIZE               (4 << 10)
+#define CONFIG_SYS_GBL_DATA_OFFSET     (CONFIG_SYS_INIT_RAM_SIZE \
+                                        - GENERATED_GBL_DATA_SIZE)
 #define CONFIG_SYS_INIT_SP_OFFSET      CONFIG_SYS_GBL_DATA_OFFSET
 
 /*
  * Serial Port
  */
+#define CONFIG_CONS_INDEX      2       /* Use UART1                    */
+#define CONFIG_SYS_NS16550
+#define CONFIG_SYS_NS16550_SERIAL
+#define CONFIG_SYS_NS16550_REG_SIZE    1
+#define CONFIG_SYS_NS16550_CLK         get_serial_clock()
 #define CONFIG_SYS_EXT_SERIAL_CLOCK    11059200        /* ext. 11.059MHz clk */
-#define CONFIG_UART1_CONSOLE
 
 /*
  * Environment
@@ -137,7 +127,7 @@
 /*
  * I2C
  */
-#define CONFIG_SYS_I2C_SPEED           400000  /* I2C speed+slave address*/
+#define CONFIG_SYS_I2C_PPC4XX_SPEED_0          400000
 
 /*
  * Default environment variables
@@ -170,6 +160,7 @@
 
 /* General PCI */
 #define CONFIG_PCI                             /* include pci support        */
+#define CONFIG_PCI_INDIRECT_BRIDGE     /* indirect PCI bridge support */
 #undef  CONFIG_PCI_PNP                         /* do (not) pci plug-and-play */
 #define CONFIG_PCI_SCAN_SHOW                   /* show pci devices on startup*/
 #define CONFIG_SYS_PCI_TARGBASE                0x80000000      /* PCIaddr mapped to \