Merge branch 'u-boot-tegra/master' into 'u-boot-arm/master'

[karo-tx-uboot.git] / include / configs / hawkboard.h

diff --git a/include/configs/hawkboard.h b/include/configs/hawkboard.h
index 12acb27aef7e4e68d8d8b3374bd469b99e1fb177..8d27590278abc31b2e5b2fbca934c970371a76e2 100644 (file)
--- a/include/configs/hawkboard.h
+++ b/include/configs/hawkboard.h
@@ -35,6 +35,7 @@
 #define CONFIG_ARM926EJS               /* arm926ejs CPU core */
 #define CONFIG_SOC_DA8XX               /* TI DA8xx SoC */
 #define CONFIG_SOC_DA850               /* TI DA850 SoC */
+#define CONFIG_SYS_EXCEPTION_VECTORS_HIGH
 #define CONFIG_SYS_CLK_FREQ            clk_get(DAVINCI_ARM_CLKID)
 #define CONFIG_SYS_OSCIN_FREQ          24000000
 #define CONFIG_SYS_TIMERBASE           DAVINCI_TIMER0_BASE
@@ -42,13 +43,36 @@
 #define CONFIG_SYS_HZ                  1000
 #define CONFIG_SKIP_LOWLEVEL_INIT
 #define CONFIG_BOARD_EARLY_INIT_F
+#define CONFIG_AIS_CONFIG_FILE         "board/$(BOARDDIR)/hawkboard-ais-nand.cfg"
 
-#if defined(CONFIG_NAND_U_BOOT) || defined(CONFIG_UART_U_BOOT)
+#define CONFIG_SYS_DA850_SYSCFG_SUSPSRC (      \
+       DAVINCI_SYSCFG_SUSPSRC_EMAC |           \
+       DAVINCI_SYSCFG_SUSPSRC_I2C  |           \
+       DAVINCI_SYSCFG_SUSPSRC_SPI1 |           \
+       DAVINCI_SYSCFG_SUSPSRC_TIMER0 |         \
+       DAVINCI_SYSCFG_SUSPSRC_UART2)
+
+#if defined(CONFIG_UART_U_BOOT)
 #define CONFIG_SYS_TEXT_BASE           0xc1080000
-#else
+#elif !defined(CONFIG_SPL_BUILD)
 #define CONFIG_SYS_TEXT_BASE           0xc1180000
 #endif
 
+/* Spl */
+#define CONFIG_SPL
+#define CONFIG_SPL_FRAMEWORK
+#define CONFIG_SPL_BOARD_INIT
+#define CONFIG_SPL_NAND_SUPPORT
+#define CONFIG_SPL_NAND_BASE
+#define CONFIG_SPL_NAND_DRIVERS
+#define CONFIG_SPL_NAND_ECC
+#define CONFIG_SPL_NAND_SIMPLE
+#define CONFIG_SPL_LIBGENERIC_SUPPORT  /* for udelay and __div64_32 for NAND */
+#define CONFIG_SPL_SERIAL_SUPPORT
+#define CONFIG_SPL_LDSCRIPT            "board/$(BOARDDIR)/u-boot-spl-hawk.lds"
+#define CONFIG_SPL_TEXT_BASE           0xc1080000
+#define CONFIG_SPL_STACK               CONFIG_SYS_INIT_SP_ADDR
+
 /*
  * Memory Info
  */
@@ -59,6 +83,7 @@
 #define CONFIG_MAX_RAM_BANK_SIZE       (512 << 20)
 #define CONFIG_SYS_INIT_SP_ADDR                (CONFIG_SYS_SDRAM_BASE + 0x1000 -\
                                        GENERATED_GBL_DATA_SIZE)
+#define CONFIG_SYS_MONITOR_LEN         0x60000
 
 /* memtest start addr */
 #define CONFIG_SYS_MEMTEST_START       (PHYS_SDRAM_1)
@@ -67,7 +92,6 @@
 #define CONFIG_SYS_MEMTEST_END         (PHYS_SDRAM_1 + 16*1024*1024)
 
 #define CONFIG_NR_DRAM_BANKS           1 /* we have 1 bank of DRAM */
-#define CONFIG_STACKSIZE               (256*1024) /* regular stack */
 
 /*
  * Serial Driver info
@@ -79,14 +103,11 @@
 #define CONFIG_SYS_NS16550_CLK         clk_get(DAVINCI_UART2_CLKID)
 #define CONFIG_CONS_INDEX              1
 #define CONFIG_BAUDRATE                        115200
-#define CONFIG_SYS_BAUDRATE_TABLE      { 9600, 19200, 38400, 57600, 115200 }
 
 /*
  * Network & Ethernet Configuration
  */
-#if !defined(CONFIG_NAND_SPL)
 #define CONFIG_DRIVER_TI_EMAC
-#endif
 #define CONFIG_MII
 #define CONFIG_BOOTP_DEFAULT
 #define CONFIG_BOOTP_DNS
@@ -107,21 +128,19 @@
 #define CONFIG_SYS_NAND_USE_FLASH_BBT
 #define CONFIG_NAND_DAVINCI
 #define CONFIG_SYS_NAND_4BIT_HW_ECC_OOBFIRST
+#define CONFIG_SYS_NAND_HW_ECC_OOBFIRST /* SPL nand driver configuration */
 #define CFG_DAVINCI_STD_NAND_LAYOUT
 #define CONFIG_SYS_NAND_CS             3
 #define CONFIG_SYS_NAND_PAGE_2K
-#define CONFIG_SYS_64BIT_VSPRINTF      /* needed for nand_util.c */
 /* Max number of NAND devices */
 #define CONFIG_SYS_MAX_NAND_DEVICE     1
 #define CONFIG_SYS_NAND_BASE_LIST      { 0x62000000, }
-#define NAND_MAX_CHIPS                 1
 /* Block 0--not used by bootcode */
 #define CONFIG_ENV_OFFSET              0x0
 
 #define CONFIG_SYS_NAND_PAGE_SIZE      (2 << 10)
 #define CONFIG_SYS_NAND_BLOCK_SIZE     (128 << 10)
 #define CONFIG_SYS_NAND_U_BOOT_OFFS    0xe0000
-#define CONFIG_SYS_NAND_U_BOOT_SIZE    0x40000
 #define CONFIG_SYS_NAND_U_BOOT_DST     0xc1180000
 #define CONFIG_SYS_NAND_U_BOOT_START   CONFIG_SYS_NAND_U_BOOT_DST
 #define CONFIG_SYS_NAND_U_BOOT_RELOC_SP        (CONFIG_SYS_NAND_U_BOOT_DST - \
@@ -138,13 +157,20 @@
 #define CONFIG_SYS_NAND_BAD_BLOCK_POS  0
 #define CONFIG_SYS_NAND_ECCSIZE                512
 #define CONFIG_SYS_NAND_ECCBYTES       10
-#define CONFIG_SYS_NAND_ECCSTEPS       (CONFIG_SYS_NAND_PAGE_SIZE /     \
-                                        CONFIG_SYS_NAND_ECCSIZE)
 #define CONFIG_SYS_NAND_OOBSIZE                64
-#define CONFIG_SYS_NAND_ECCTOTAL       (CONFIG_SYS_NAND_ECCBYTES *     \
-                                       CONFIG_SYS_NAND_ECCSTEPS)
+
 #endif /* CONFIG_SYS_USE_NAND */
 
+/* USB Configs */
+#define CONFIG_SYS_USB_OHCI_CPU_INIT
+#define CONFIG_USB_OHCI_NEW
+#define CONFIG_USB_OHCI_DA8XX
+#define CONFIG_USB_STORAGE
+#define CONFIG_DOS_PARTITION
+#define CONFIG_SYS_USB_OHCI_REGS_BASE          0x01E25000
+#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS     15
+#define CONFIG_SYS_USB_OHCI_SLOT_NAME          "hawkboard"
+
 /*
  * U-Boot general configuration
  */
@@ -159,7 +185,6 @@
 #define CONFIG_VERSION_VARIABLE
 #define CONFIG_AUTO_COMPLETE
 #define CONFIG_SYS_HUSH_PARSER
-#define CONFIG_SYS_PROMPT_HUSH_PS2     "> "
 #define CONFIG_CMDLINE_EDITING
 #define CONFIG_SYS_LONGHELP
 #define CONFIG_CRC32_VERIFY
@@ -188,6 +213,12 @@
 #define CONFIG_CMD_PING
 #define CONFIG_CMD_SAVES
 #define CONFIG_CMD_MEMORY
+#define CONFIG_CMD_USB
+#define CONFIG_CMD_EXT2
+
+#ifdef CONFIG_CMD_BDI
+#define CONFIG_CLOCKS
+#endif
 
 #ifdef CONFIG_SYS_USE_NAND
 #undef CONFIG_CMD_FLASH