DEBUG: Fix debug macros

[karo-tx-uboot.git] / include / configs / ibf-dsp561.h

diff --git a/include/configs/ibf-dsp561.h b/include/configs/ibf-dsp561.h
index 2c0a263da293c6e6b36cde1a1304336d0910628f..294af735d6ec34aa5e631954d71eb96e17b61293 100644 (file)
--- a/include/configs/ibf-dsp561.h
+++ b/include/configs/ibf-dsp561.h
@@ -61,7 +61,6 @@
  * Network Settings
  */
 #define ADI_CMDS_NETWORK       1
-#define CONFIG_NET_MULTI
 #define CONFIG_DRIVER_AX88180  1
 #define AX88180_BASE           0x2c000000
 #define CONFIG_HOSTNAME                ibf-dsp561
@@ -80,8 +79,8 @@
 #define CONFIG_SYS_MAX_FLASH_SECT      135     /* max number of sectors on one chip */
 /* The BF561-EZKIT uses a top boot flash */
 #define CONFIG_ENV_IS_IN_FLASH 1
-#define CONFIG_ENV_ADDR                0x20004000
-#define CONFIG_ENV_OFFSET              (CONFIG_ENV_ADDR - CONFIG_SYS_FLASH_BASE)
+#define CONFIG_ENV_OFFSET              0x4000
+#define CONFIG_ENV_ADDR                (CONFIG_SYS_FLASH_BASE + CONFIG_ENV_OFFSET)
 #define CONFIG_ENV_SIZE                0x2000
 #define CONFIG_ENV_SECT_SIZE   0x10000 /* Total Size of Environment Sector */
 #if (CONFIG_BFIN_BOOT_MODE == BFIN_BOOT_BYPASS)
@@ -96,15 +95,10 @@
  * it linked after the configuration sector.
  */
 # define LDS_BOARD_TEXT \
-       arch/blackfin/cpu/traps.o               (.text .text.*); \
-       arch/blackfin/cpu/interrupt.o   (.text .text.*); \
-       arch/blackfin/cpu/serial.o              (.text .text.*); \
-       common/dlmalloc.o               (.text .text.*); \
-       lib/crc32.o             (.text .text.*); \
-       lib/zlib.o              (.text .text.*); \
-       board/ibf-dsp561/ibf-dsp561.o   (.text .text.*); \
+       arch/blackfin/lib/libblackfin.o (.text*); \
+       arch/blackfin/cpu/libblackfin.o (.text*); \
        . = DEFINED(env_offset) ? env_offset : .; \
-       common/env_embedded.o           (.text .text.*);
+       common/env_embedded.o (.text*);
 #endif
 
 
@@ -112,33 +106,8 @@
  * I2C Settings
  */
 #define CONFIG_SOFT_I2C                1
-#define PF_SCL                 0x1/*PF0*/
-#define PF_SDA                 0x2/*PF1*/
-
-#ifdef CONFIG_SOFT_I2C
-#define I2C_INIT       do { *pFIO0_DIR |= PF_SCL; SSYNC(); } while (0)
-#define I2C_ACTIVE     do { *pFIO0_DIR |= PF_SDA; *pFIO0_INEN &= ~PF_SDA; SSYNC(); } while (0)
-#define I2C_TRISTATE   do { *pFIO0_DIR &= ~PF_SDA; *pFIO0_INEN |= PF_SDA; SSYNC(); } while (0)
-#define I2C_READ       ((*pFIO0_FLAG_D & PF_SDA) != 0)
-#define I2C_SDA(bit) \
-       do { \
-               if (bit) \
-                       *pFIO0_FLAG_S = PF_SDA; \
-               else \
-                       *pFIO0_FLAG_C = PF_SDA; \
-               SSYNC(); \
-       } while (0)
-#define I2C_SCL(bit) \
-       do { \
-               if (bit) \
-                       *pFIO0_FLAG_S = PF_SCL; \
-               else \
-                       *pFIO0_FLAG_C = PF_SCL; \
-               SSYNC(); \
-       } while (0)
-#define I2C_DELAY              udelay(5)       /* 1/4 I2C clock duration */
-
-#endif
+#define CONFIG_SOFT_I2C_GPIO_SCL GPIO_PF0
+#define CONFIG_SOFT_I2C_GPIO_SDA GPIO_PF1
 
 
 /*