]> git.kernelconcepts.de Git - karo-tx-uboot.git/blobdiff - include/configs/ls1021atwr.h
Merge branch 'master' of git://git.denx.de/u-boot-usb
[karo-tx-uboot.git] / include / configs / ls1021atwr.h
index e98e102e424727a739dbf68ead6df3983cf420c5..66954d0a401aee4e97be648cd5566c4c6b9d6194 100644 (file)
 #define CONFIG_SYS_CLK_FREQ            100000000
 #define CONFIG_DDR_CLK_FREQ            100000000
 
+#ifdef CONFIG_RAMBOOT_PBL
+#define CONFIG_SYS_FSL_PBL_PBI board/freescale/ls1021atwr/ls102xa_pbi.cfg
+#endif
+
+#ifdef CONFIG_SD_BOOT
+#define CONFIG_SYS_FSL_PBL_RCW board/freescale/ls1021atwr/ls102xa_rcw_sd.cfg
+#define CONFIG_SPL_FRAMEWORK
+#define CONFIG_SPL_LDSCRIPT    "arch/$(ARCH)/cpu/u-boot-spl.lds"
+#define CONFIG_SPL_LIBCOMMON_SUPPORT
+#define CONFIG_SPL_LIBGENERIC_SUPPORT
+#define CONFIG_SPL_ENV_SUPPORT
+#define CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT
+#define CONFIG_SPL_I2C_SUPPORT
+#define CONFIG_SPL_WATCHDOG_SUPPORT
+#define CONFIG_SPL_SERIAL_SUPPORT
+#define CONFIG_SPL_MMC_SUPPORT
+#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR                0xe8
+#define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS             0x400
+
+#define CONFIG_SPL_TEXT_BASE           0x10000000
+#define CONFIG_SPL_MAX_SIZE            0x1a000
+#define CONFIG_SPL_STACK               0x1001d000
+#define CONFIG_SPL_PAD_TO              0x1c000
+#define CONFIG_SYS_TEXT_BASE           0x82000000
+
+#define CONFIG_SYS_SPL_MALLOC_START    0x80200000
+#define CONFIG_SYS_SPL_MALLOC_SIZE     0x100000
+#define CONFIG_SPL_BSS_START_ADDR      0x80100000
+#define CONFIG_SPL_BSS_MAX_SIZE                0x80000
+#define CONFIG_SYS_MONITOR_LEN         0x80000
+#endif
+
+#ifdef CONFIG_QSPI_BOOT
+#define CONFIG_SYS_TEXT_BASE           0x40010000
+#define CONFIG_SYS_NO_FLASH
+#endif
+
 #ifndef CONFIG_SYS_TEXT_BASE
 #define CONFIG_SYS_TEXT_BASE           0x67f80000
 #endif
 
 #define CONFIG_FSL_CAAM                        /* Enable CAAM */
 
+#if !defined(CONFIG_SD_BOOT) && !defined(CONFIG_NAND_BOOT) && \
+       !defined(CONFIG_QSPI_BOOT)
+#define CONFIG_U_QE
+#endif
+
 /*
  * IFC Definitions
  */
+#ifndef CONFIG_QSPI_BOOT
 #define CONFIG_FSL_IFC
 #define CONFIG_SYS_FLASH_BASE          0x60000000
 #define CONFIG_SYS_FLASH_BASE_PHYS     CONFIG_SYS_FLASH_BASE
 #define CONFIG_SYS_FLASH_BANKS_LIST    { CONFIG_SYS_FLASH_BASE_PHYS }
 
 #define CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS
+#define CONFIG_SYS_WRITE_SWAPPED_DATA
+#endif
 
 /* CPLD */
 
 #define CONFIG_SYS_I2C
 #define CONFIG_SYS_I2C_MXC
 
+/* EEPROM */
+#ifndef CONFIG_SD_BOOT
+#define CONFIG_ID_EEPROM
+#define CONFIG_SYS_I2C_EEPROM_NXID
+#define CONFIG_SYS_EEPROM_BUS_NUM              1
+#define CONFIG_SYS_I2C_EEPROM_ADDR             0x53
+#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN         1
+#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS      3
+#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS  5
+#endif
+
 /*
  * MMC
  */
 #define CONFIG_FSL_ESDHC
 #define CONFIG_GENERIC_MMC
 
+#define CONFIG_CMD_FAT
+#define CONFIG_DOS_PARTITION
+
+/* QSPI */
+#ifdef CONFIG_QSPI_BOOT
+#define CONFIG_FSL_QSPI
+#define QSPI0_AMBA_BASE                        0x40000000
+#define FSL_QSPI_FLASH_SIZE            (1 << 24)
+#define FSL_QSPI_FLASH_NUM             2
+
+#define CONFIG_CMD_SF
+#define CONFIG_SPI_FLASH
+#define CONFIG_SPI_FLASH_STMICRO
+#endif
+
 /*
  * Video
  */
 #define CONFIG_HAS_ETH2
 #endif
 
+/* PCIe */
+#define CONFIG_PCI             /* Enable PCI/PCIE */
+#define CONFIG_PCIE1           /* PCIE controler 1 */
+#define CONFIG_PCIE2           /* PCIE controler 2 */
+#define CONFIG_PCIE_LAYERSCAPE /* Use common FSL Layerscape PCIe code */
+#define FSL_PCIE_COMPAT "fsl,ls1021a-pcie"
+
 #define CONFIG_CMD_PING
 #define CONFIG_CMD_DHCP
 #define CONFIG_CMD_MII
 
 #define CONFIG_CMDLINE_TAG
 #define CONFIG_CMDLINE_EDITING
+
+#ifdef CONFIG_QSPI_BOOT
+#undef CONFIG_CMD_IMLS
+#else
 #define CONFIG_CMD_IMLS
+#endif
+
+#define CONFIG_ARMV7_NONSEC
+#define CONFIG_ARMV7_VIRT
+#define CONFIG_PEN_ADDR_BIG_ENDIAN
+#define CONFIG_LS102XA_NS_ACCESS
+#define CONFIG_SMP_PEN_ADDR            0x01ee0200
+#define CONFIG_TIMER_CLK_FREQ          12500000
+#define CONFIG_ARMV7_SECURE_BASE       OCRAM_BASE_S_ADDR
 
 #define CONFIG_HWCONFIG
 #define HWCONFIG_BUFFER_SIZE           128
 
 #define CONFIG_SYS_LOAD_ADDR           0x82000000
 
+#define CONFIG_LS102XA_STREAM_ID
+
 /*
  * Stack sizes
  * The stack sizes are set up in start.S using the settings below
 #define CONFIG_SYS_INIT_SP_ADDR \
        (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
 
+#ifdef CONFIG_SPL_BUILD
+#define CONFIG_SYS_MONITOR_BASE CONFIG_SPL_TEXT_BASE
+#else
 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE    /* start of monitor */
+#endif
+
+#define CONFIG_SYS_QE_FW_ADDR     0x67f40000
 
 /*
  * Environment
  */
 #define CONFIG_ENV_OVERWRITE
 
+#if defined(CONFIG_SD_BOOT)
+#define CONFIG_ENV_OFFSET              0x100000
+#define CONFIG_ENV_IS_IN_MMC
+#define CONFIG_SYS_MMC_ENV_DEV         0
+#define CONFIG_ENV_SIZE                        0x20000
+#elif defined(CONFIG_QSPI_BOOT)
+#define CONFIG_ENV_IS_IN_SPI_FLASH
+#define CONFIG_ENV_SIZE                        0x2000
+#define CONFIG_ENV_OFFSET              0x100000
+#define CONFIG_ENV_SECT_SIZE           0x10000
+#else
 #define CONFIG_ENV_IS_IN_FLASH
 #define CONFIG_ENV_ADDR                (CONFIG_SYS_MONITOR_BASE - CONFIG_ENV_SECT_SIZE)
 #define CONFIG_ENV_SIZE                        0x20000
 #define CONFIG_ENV_SECT_SIZE           0x20000 /* 128K (one sector) */
+#endif
 
 #define CONFIG_OF_LIBFDT
 #define CONFIG_OF_BOARD_SETUP