Merge branch 'u-boot-tegra/master' into 'u-boot-arm/master'

[karo-tx-uboot.git] / include / configs / mcx.h

diff --git a/include/configs/mcx.h b/include/configs/mcx.h
index 733022e78566de795c63fef640467930366a88b9..1f09947706e924fa0ad0173b9bfeccd47521a489 100644 (file)
--- a/include/configs/mcx.h
+++ b/include/configs/mcx.h
@@ -114,9 +114,7 @@
 #define CONFIG_USB_EHCI_OMAP
 #define CONFIG_USB_ULPI
 #define CONFIG_USB_ULPI_VIEWPORT_OMAP
-/*#define CONFIG_EHCI_DCACHE*/ /* leave it disabled for now */
-#define CONFIG_OMAP_EHCI_PHY1_RESET_GPIO       154
-#define CONFIG_OMAP_EHCI_PHY2_RESET_GPIO       152
+#define CONFIG_OMAP_EHCI_PHY1_RESET_GPIO       57
 #define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 3
 
 /* commands to include */
@@ -153,7 +151,6 @@
 #define CONFIG_HARD_I2C
 #define CONFIG_SYS_I2C_SPEED           100000
 #define CONFIG_SYS_I2C_SLAVE           1
-#define CONFIG_SYS_I2C_BUS             0
 #define CONFIG_DRIVER_OMAP34XX_I2C
 
 /* RTC */
@@ -182,7 +179,7 @@
 #define CONFIG_JFFS2_PART_SIZE         0xf980000       /* sz of jffs2 part */
 
 /* Environment information */
-#define CONFIG_BOOTDELAY       10
+#define CONFIG_BOOTDELAY       3
 
 #define CONFIG_BOOTFILE                "uImage"
 
@@ -256,22 +253,28 @@
                "run nandargs; "                                        \
                "ubi part nand0,4;"                                     \
                "ubi readvol ${loadaddr} kernel;"                       \
-               "run addip addtty addmtd addfb addeth addmisc;"         \
+               "run addtty addmtd addfb addeth addmisc;"               \
                "bootm ${loadaddr}\0"                                   \
-       "swupdate_args=setenv bootargs ubi.mtd=6 root=ubi0:fs_recovery "\
-               "rootfstype=ubifs quiet loglevel=1 "                    \
-                       "consoleblank=0 ${swupdate_misc}\0"             \
+       "preboot=ubi part nand0,7;"                                     \
+               "ubi readvol ${loadaddr} splash;"                       \
+               "bmp display ${loadaddr};"                              \
+               "gpio set 55\0"                                         \
+       "swupdate_args=setenv bootargs root=/dev/ram "                  \
+               "quiet loglevel=1 "                                     \
+               "consoleblank=0 ${swupdate_misc}\0"                     \
        "swupdate=echo Running Sw-Update...;"                           \
                "if printenv mtdparts;then echo Starting SwUpdate...; " \
                "else mtdparts default;fi; "                            \
                "ubi part nand0,5;"                                     \
                "ubi readvol 0x82000000 kernel_recovery;"               \
+               "ubi part nand0,6;"                                     \
+               "ubi readvol 0x84000000 fs_recovery;"                   \
                "run swupdate_args; "                                   \
                "setenv bootargs ${bootargs} "                          \
                        "${mtdparts} "                                  \
                        "vram=6M omapfb.vram=1:2M,2:2M,3:2M "           \
                        "omapdss.def_disp=lcd;"                         \
-               "bootm ${loadaddr}\0"
+               "bootm 0x82000000 0x84000000\0"
 
 #define CONFIG_BOOTCOMMAND \
        "run nandboot"
@@ -302,6 +305,7 @@
 
 #define CONFIG_SYS_LOAD_ADDR           (OMAP34XX_SDRC_CS0) /* default load */
                                                                /* address */
+#define CONFIG_PREBOOT
 
 /*
  * AM3517 has 12 GP timers, they can be driven by the system clock
@@ -317,7 +321,6 @@
  */
 #define CONFIG_NR_DRAM_BANKS   2       /* CS1 may or may not be populated */
 #define PHYS_SDRAM_1           OMAP34XX_SDRC_CS0
-#define PHYS_SDRAM_1_SIZE      (32 << 20)      /* at least 32 MiB */
 #define PHYS_SDRAM_2           OMAP34XX_SDRC_CS1
 
 /*
@@ -359,6 +362,8 @@
 
 /* Defines for SPL */
 #define CONFIG_SPL
+#define CONFIG_SPL_FRAMEWORK
+#define CONFIG_SPL_BOARD_INIT
 #define CONFIG_SPL_NAND_SIMPLE
 #define CONFIG_SPL_NAND_SOFTECC
 
@@ -371,6 +376,9 @@
 #define CONFIG_SPL_SERIAL_SUPPORT
 #define CONFIG_SPL_POWER_SUPPORT
 #define CONFIG_SPL_NAND_SUPPORT
+#define CONFIG_SPL_NAND_BASE
+#define CONFIG_SPL_NAND_DRIVERS
+#define CONFIG_SPL_NAND_ECC
 #define CONFIG_SPL_LDSCRIPT            "$(CPUDIR)/omap-common/u-boot-spl.lds"
 
 #define CONFIG_SPL_TEXT_BASE           0x40200000 /*CONFIG_SYS_SRAM_START*/
@@ -419,4 +427,13 @@
 #define CONFIG_NET_RETRY_COUNT 10
 #endif
 
+#define CONFIG_VIDEO
+#define CONFIG_CFB_CONSOLE
+#define CONFIG_VGA_AS_SINGLE_DEVICE
+#define CONFIG_SPLASH_SCREEN
+#define CONFIG_VIDEO_BMP_RLE8
+#define CONFIG_CMD_BMP
+#define CONFIG_VIDEO_OMAP3
+#define CONFIG_SYS_CONSOLE_IS_IN_ENV
+
 #endif /* __CONFIG_H */