]> git.kernelconcepts.de Git - karo-tx-uboot.git/blobdiff - include/configs/mcx.h
Exynos5420: Introduce support for the Peach-Pit board
[karo-tx-uboot.git] / include / configs / mcx.h
index 733022e78566de795c63fef640467930366a88b9..47244c003434d7a8f826ba2ecb5410066029d750 100644 (file)
@@ -3,19 +3,7 @@
  *
  * Based on omap3_evm_config.h
  *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc.
+ * SPDX-License-Identifier:    GPL-2.0+
  */
 
 #ifndef __CONFIG_H
@@ -28,6 +16,7 @@
 #define CONFIG_OMAP34XX                        /* which is a 34XX */
 #define CONFIG_OMAP3_MCX               /* working with mcx */
 #define CONFIG_OMAP_GPIO
+#define CONFIG_OMAP_COMMON
 
 #define MACH_TYPE_MCX                  3656
 #define CONFIG_MACH_TYPE       MACH_TYPE_MCX
 
 /* EHCI */
 #define CONFIG_USB_STORAGE
+#define CONFIG_OMAP3_GPIO_2
 #define CONFIG_OMAP3_GPIO_5
 #define CONFIG_USB_EHCI
 #define CONFIG_USB_EHCI_OMAP
 #define CONFIG_USB_ULPI
 #define CONFIG_USB_ULPI_VIEWPORT_OMAP
-/*#define CONFIG_EHCI_DCACHE*/ /* leave it disabled for now */
-#define CONFIG_OMAP_EHCI_PHY1_RESET_GPIO       154
-#define CONFIG_OMAP_EHCI_PHY2_RESET_GPIO       152
+#define CONFIG_OMAP_EHCI_PHY1_RESET_GPIO       57
 #define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 3
 
 /* commands to include */
 #undef CONFIG_CMD_IMLS         /* List all found images        */
 
 #define CONFIG_SYS_NO_FLASH
-#define CONFIG_HARD_I2C
-#define CONFIG_SYS_I2C_SPEED           100000
-#define CONFIG_SYS_I2C_SLAVE           1
-#define CONFIG_SYS_I2C_BUS             0
-#define CONFIG_DRIVER_OMAP34XX_I2C
+#define CONFIG_SYS_I2C
+#define CONFIG_SYS_OMAP24_I2C_SPEED    100000
+#define CONFIG_SYS_OMAP24_I2C_SLAVE    1
+#define CONFIG_SYS_I2C_OMAP34XX
 
 /* RTC */
 #define CONFIG_RTC_DS1337
 #define CONFIG_JFFS2_PART_SIZE         0xf980000       /* sz of jffs2 part */
 
 /* Environment information */
-#define CONFIG_BOOTDELAY       10
+#define CONFIG_BOOTDELAY       3
 
 #define CONFIG_BOOTFILE                "uImage"
 
                "run nandargs; "                                        \
                "ubi part nand0,4;"                                     \
                "ubi readvol ${loadaddr} kernel;"                       \
-               "run addip addtty addmtd addfb addeth addmisc;"         \
+               "run addtty addmtd addfb addeth addmisc;"               \
                "bootm ${loadaddr}\0"                                   \
-       "swupdate_args=setenv bootargs ubi.mtd=6 root=ubi0:fs_recovery "\
-               "rootfstype=ubifs quiet loglevel=1 "                    \
-                       "consoleblank=0 ${swupdate_misc}\0"             \
+       "preboot=ubi part nand0,7;"                                     \
+               "ubi readvol ${loadaddr} splash;"                       \
+               "bmp display ${loadaddr};"                              \
+               "gpio set 55\0"                                         \
+       "swupdate_args=setenv bootargs root=/dev/ram "                  \
+               "quiet loglevel=1 "                                     \
+               "consoleblank=0 ${swupdate_misc}\0"                     \
        "swupdate=echo Running Sw-Update...;"                           \
                "if printenv mtdparts;then echo Starting SwUpdate...; " \
                "else mtdparts default;fi; "                            \
                "ubi part nand0,5;"                                     \
                "ubi readvol 0x82000000 kernel_recovery;"               \
+               "ubi part nand0,6;"                                     \
+               "ubi readvol 0x84000000 fs_recovery;"                   \
                "run swupdate_args; "                                   \
                "setenv bootargs ${bootargs} "                          \
                        "${mtdparts} "                                  \
                        "vram=6M omapfb.vram=1:2M,2:2M,3:2M "           \
                        "omapdss.def_disp=lcd;"                         \
-               "bootm ${loadaddr}\0"
-
-#define CONFIG_BOOTCOMMAND \
-       "run nandboot"
+               "bootm 0x82000000 0x84000000\0"                         \
+       "bootcmd=mmc rescan;if fatload mmc 0 82000000 loadbootscr.scr;" \
+               "then source 82000000;else run nandboot;fi\0"
 
 #define CONFIG_AUTO_COMPLETE
 #define CONFIG_CMDLINE_EDITING
 
 #define CONFIG_SYS_LOAD_ADDR           (OMAP34XX_SDRC_CS0) /* default load */
                                                                /* address */
+#define CONFIG_PREBOOT
 
 /*
  * AM3517 has 12 GP timers, they can be driven by the system clock
  */
 #define CONFIG_SYS_TIMERBASE           OMAP34XX_GPT2
 #define CONFIG_SYS_PTV                 2       /* Divisor: 2^(PTV+1) => 8 */
-#define CONFIG_SYS_HZ                  1000
 
 /*
  * Physical Memory Map
  */
 #define CONFIG_NR_DRAM_BANKS   2       /* CS1 may or may not be populated */
 #define PHYS_SDRAM_1           OMAP34XX_SDRC_CS0
-#define PHYS_SDRAM_1_SIZE      (32 << 20)      /* at least 32 MiB */
 #define PHYS_SDRAM_2           OMAP34XX_SDRC_CS1
 
 /*
 #define PISMO1_NAND_SIZE               GPMC_SIZE_128M
 
 #define CONFIG_NAND_OMAP_GPMC
-#define GPMC_NAND_ECC_LP_x16_LAYOUT
 #define CONFIG_ENV_IS_IN_NAND
 #define SMNAND_ENV_OFFSET              0x180000 /* environment starts here */
 
 
 /* Defines for SPL */
 #define CONFIG_SPL
+#define CONFIG_SPL_FRAMEWORK
+#define CONFIG_SPL_BOARD_INIT
 #define CONFIG_SPL_NAND_SIMPLE
-#define CONFIG_SPL_NAND_SOFTECC
 
 #define CONFIG_SPL_LIBCOMMON_SUPPORT
 #define CONFIG_SPL_LIBDISK_SUPPORT
 #define CONFIG_SPL_SERIAL_SUPPORT
 #define CONFIG_SPL_POWER_SUPPORT
 #define CONFIG_SPL_NAND_SUPPORT
+#define CONFIG_SPL_NAND_BASE
+#define CONFIG_SPL_NAND_DRIVERS
+#define CONFIG_SPL_NAND_ECC
 #define CONFIG_SPL_LDSCRIPT            "$(CPUDIR)/omap-common/u-boot-spl.lds"
 
 #define CONFIG_SPL_TEXT_BASE           0x40200000 /*CONFIG_SYS_SRAM_START*/
                                         56, 57, 58, 59, 60, 61, 62, 63}
 #define CONFIG_SYS_NAND_ECCSIZE                256
 #define CONFIG_SYS_NAND_ECCBYTES       3
+#define CONFIG_NAND_OMAP_ECCSCHEME     OMAP_ECC_HAM1_CODE_SW
+#define CONFIG_SPL_NAND_SOFTECC
 
 #define CONFIG_SYS_NAND_U_BOOT_START   CONFIG_SYS_TEXT_BASE
 
 #define CONFIG_DRIVER_TI_EMAC
 #define CONFIG_DRIVER_TI_EMAC_USE_RMII
 #define CONFIG_MII
-#define CONFIG_BOOTP_DEFAULT
 #define CONFIG_BOOTP_DNS
 #define CONFIG_BOOTP_DNS2
 #define CONFIG_BOOTP_SEND_HOSTNAME
 #define CONFIG_NET_RETRY_COUNT 10
 #endif
 
+#define CONFIG_VIDEO
+#define CONFIG_CFB_CONSOLE
+#define CONFIG_VGA_AS_SINGLE_DEVICE
+#define CONFIG_SPLASH_SCREEN
+#define CONFIG_VIDEO_BMP_RLE8
+#define CONFIG_CMD_BMP
+#define CONFIG_VIDEO_OMAP3
+#define CONFIG_SYS_CONSOLE_IS_IN_ENV
+
 #endif /* __CONFIG_H */