Merge branch 'u-boot-imx/master' into 'u-boot-arm/master'

[karo-tx-uboot.git] / include / configs / mecp5123.h

diff --git a/include/configs/mecp5123.h b/include/configs/mecp5123.h
index 92c4f5fdb30f39ddc3c9e3f780953e4120e047c5..c4f245b985120f65e77a569222c2c178ec71672c 100644 (file)
--- a/include/configs/mecp5123.h
+++ b/include/configs/mecp5123.h
@@ -48,6 +48,8 @@
 #define CONFIG_E300            1       /* E300 Family */
 #define CONFIG_MPC512X         1       /* MPC512X family */
 
+#define        CONFIG_SYS_TEXT_BASE    0xFFF00000
+
 #define CONFIG_SYS_MPC512X_CLKIN       33333333        /* in Hz */
 
 #define CONFIG_BOARD_EARLY_INIT_F              /* call board_early_init_f() */
@@ -176,9 +178,7 @@
 #define CONFIG_CMD_NAND
 #define CONFIG_NAND_MPC5121_NFC
 #define CONFIG_SYS_NAND_BASE            0x40000000
-
 #define CONFIG_SYS_MAX_NAND_DEVICE      1
-#define NAND_MAX_CHIPS                  CONFIG_SYS_MAX_NAND_DEVICE
 
 /*
  * Configuration parameters for MPC5121 NAND driver
@@ -191,6 +191,10 @@
 #define CONFIG_SYS_SRAM_BASE           0x30000000
 #define CONFIG_SYS_SRAM_SIZE           0x00020000      /* 128 KB */
 
+/* Initialize Local Window for NOR FLASH access */
+#define CONFIG_SYS_CS0_START           CONFIG_SYS_FLASH_BASE
+#define CONFIG_SYS_CS0_SIZE            CONFIG_SYS_FLASH_SIZE
+
 /* ALE active low, data size 4bytes */
 #define CONFIG_SYS_CS0_CFG             0x05051150
 
@@ -201,16 +205,18 @@
 #define CONFIG_SYS_CS1_CFG             0x1f1f3090
 #define CONFIG_SYS_VPC3_BASE           0x82000000      /* start of VPC3 space */
 #define CONFIG_SYS_VPC3_SIZE           0x00010000      /* max VPC3 size */
+/* Initialize Local Window for VPC3 access */
+#define CONFIG_SYS_CS1_START           CONFIG_SYS_VPC3_BASE
+#define CONFIG_SYS_CS1_SIZE            CONFIG_SYS_VPC3_SIZE
 
 /* Use SRAM for initial stack */
 #define CONFIG_SYS_INIT_RAM_ADDR       CONFIG_SYS_SRAM_BASE /* Init RAM addr */
-#define CONFIG_SYS_INIT_RAM_END                CONFIG_SYS_SRAM_SIZE
+#define CONFIG_SYS_INIT_RAM_SIZE               CONFIG_SYS_SRAM_SIZE
 
-#define CONFIG_SYS_GBL_DATA_SIZE       0x100           /* num bytes initial data */
-#define CONFIG_SYS_GBL_DATA_OFFSET     (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE)
+#define CONFIG_SYS_GBL_DATA_OFFSET     (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
 #define CONFIG_SYS_INIT_SP_OFFSET      CONFIG_SYS_GBL_DATA_OFFSET
 
-#define CONFIG_SYS_MONITOR_BASE                TEXT_BASE       /* Start of monitor */
+#define CONFIG_SYS_MONITOR_BASE                CONFIG_SYS_TEXT_BASE    /* Start of monitor */
 #define CONFIG_SYS_MONITOR_LEN         (256 * 1024)    /* Monitor length */
 #define CONFIG_SYS_MALLOC_LEN          (6 * 1024 * 1024) /* Malloc size */
 
@@ -218,12 +224,12 @@
  * Serial Port
  */
 #define CONFIG_CONS_INDEX     1
-#undef CONFIG_SERIAL_SOFTWARE_FIFO
 
 /*
  * Serial console configuration
  */
 #define CONFIG_PSC_CONSOLE     3       /* console is on PSC3 */
+#define CONFIG_SYS_PSC3
 #if CONFIG_PSC_CONSOLE != 3
 #error CONFIG_PSC_CONSOLE must be 3
 #endif
@@ -236,11 +242,27 @@
 #define CONSOLE_FIFO_RX_SIZE   FIFOC_PSC3_RX_SIZE
 #define CONSOLE_FIFO_RX_ADDR   FIFOC_PSC3_RX_ADDR
 
+/*
+ * Clocks in use
+ */
+#define SCCR1_CLOCKS_EN        (CLOCK_SCCR1_CFG_EN |                           \
+                        CLOCK_SCCR1_LPC_EN |                           \
+                        CLOCK_SCCR1_PSC_EN(CONFIG_PSC_CONSOLE) |       \
+                        CLOCK_SCCR1_PSCFIFO_EN |                       \
+                        CLOCK_SCCR1_DDR_EN |                           \
+                        CLOCK_SCCR1_FEC_EN |                           \
+                        CLOCK_SCCR1_NFC_EN |                           \
+                        CLOCK_SCCR1_PCI_EN |                           \
+                        CLOCK_SCCR1_TPR_EN)
+
+#define SCCR2_CLOCKS_EN        (CLOCK_SCCR2_MEM_EN |   \
+                        CLOCK_SCCR2_I2C_EN)
+
+
 #define CONFIG_CMDLINE_EDITING 1       /* add command line history     */
 /* Use the HUSH parser */
 #define CONFIG_SYS_HUSH_PARSER
 #ifdef  CONFIG_SYS_HUSH_PARSER
-#define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
 #endif
 
 /* I2C */
@@ -253,7 +275,7 @@
 /*
  * IIM - IC Identification Module
  */
-#undef CONFIG_IIM
+#undef CONFIG_FSL_IIM
 
 /*
  * EEPROM configuration
@@ -268,7 +290,6 @@
  * Ethernet configuration
  */
 #define CONFIG_MPC512x_FEC     1
-#define CONFIG_NET_MULTI
 #define CONFIG_PHY_ADDR                0x1
 #define CONFIG_MII             1       /* MII PHY management           */
 #define CONFIG_FEC_AN_TIMEOUT  1
@@ -344,10 +365,10 @@
 
 /*
  * For booting Linux, the board info and command line data
- * have to be in the first 8 MB of memory, since this is
+ * have to be in the first 256 MB of memory, since this is
  * the maximum mapped by the Linux kernel during initialization.
  */
-#define CONFIG_SYS_BOOTMAPSZ   (8 << 20)       /* Linux initial memory map */
+#define CONFIG_SYS_BOOTMAPSZ   (256 << 20)     /* Linux initial memory map */
 
 /* Cache Configuration */
 #define CONFIG_SYS_DCACHE_SIZE         32768
@@ -362,14 +383,6 @@
 
 #define CONFIG_HIGH_BATS       1       /* High BATs supported */
 
-/*
- * Internal Definitions
- *
- * Boot Flags
- */
-#define BOOTFLAG_COLD          0x01    /* Normal Power-On: Boot from FLASH */
-#define BOOTFLAG_WARM          0x02    /* Software reboot */
-
 #ifdef CONFIG_CMD_KGDB
 #define CONFIG_KGDB_BAUDRATE   230400  /* speed of kgdb serial port */
 #define CONFIG_KGDB_SER_INDEX  2       /* which serial port to use */
@@ -381,8 +394,8 @@
 #define CONFIG_TIMESTAMP
 
 #define CONFIG_HOSTNAME                mecp512x
-#define CONFIG_BOOTFILE                /tftpboot/mecp512x/uImage
-#define CONFIG_ROOTPATH                /tftpboot/mecp512x/target_root
+#define CONFIG_BOOTFILE                "/tftpboot/mecp512x/uImage"
+#define CONFIG_ROOTPATH                "/tftpboot/mecp512x/target_root"
 
 #define CONFIG_LOADADDR                400000  /* def. location for tftp and bootm */