CONFIGS: peach-pit: Enable display for peach_pit board

[karo-tx-uboot.git] / include / configs / omap3_igep00x0.h

diff --git a/include/configs/omap3_igep00x0.h b/include/configs/omap3_igep00x0.h
index 20fbbecdfbd05231a68314ccf0d6339a01d86d93..006c9a9c0daa29422af9485ad0b7ab1c69f29081 100644 (file)
--- a/include/configs/omap3_igep00x0.h
+++ b/include/configs/omap3_igep00x0.h
@@ -37,6 +37,11 @@
 #define CONFIG_SHOW_BOOT_PROGRESS
 #endif
 
+/* GPIO banks */
+#define CONFIG_OMAP3_GPIO_3            /* GPIO64 .. 95 is in GPIO bank 3 */
+#define CONFIG_OMAP3_GPIO_5            /* GPIO128..159 is in GPIO bank 5 */
+#define CONFIG_OMAP3_GPIO_6            /* GPIO160..191 is in GPIO bank 6 */
+
 /* USB */
 #define CONFIG_MUSB_UDC                        1
 #define CONFIG_USB_OMAP3               1
@@ -141,8 +146,6 @@
  */
 
 #ifdef CONFIG_BOOT_ONENAND
-#define PISMO1_ONEN_SIZE               GPMC_SIZE_128M /* Configure the PISMO */
-
 #define CONFIG_SYS_ONENAND_BASE                ONENAND_MAP
 
 #define ONENAND_ENV_OFFSET             0x260000 /* environment starts here */
@@ -153,8 +156,6 @@
 #endif
 
 #ifdef CONFIG_NAND
-#define PISMO1_NAND_SIZE               GPMC_SIZE_128M /* Configure the PISMO */
-#define GPMC_NAND_ECC_LP_x16_LAYOUT    1
 #define CONFIG_ENV_OFFSET              0x260000 /* environment starts here */
 #define CONFIG_ENV_IS_IN_NAND          1
 #define CONFIG_ENV_SIZE                        (512 << 10) /* Total Size Environment */
@@ -183,6 +184,7 @@
 
 /* NAND boot config */
 #ifdef CONFIG_NAND
+#define CONFIG_SYS_NAND_BUSWIDTH_16BIT 16
 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
 #define CONFIG_SYS_NAND_PAGE_COUNT     64
 #define CONFIG_SYS_NAND_PAGE_SIZE      2048
@@ -194,6 +196,13 @@
 #define CONFIG_SYS_NAND_ECCSIZE                512
 #define CONFIG_SYS_NAND_ECCBYTES       3
 #define CONFIG_NAND_OMAP_ECCSCHEME     OMAP_ECC_HAM1_CODE_HW
+#define CONFIG_SYS_NAND_U_BOOT_OFFS    0x80000
+/* NAND: SPL falcon mode configs */
+#ifdef CONFIG_SPL_OS_BOOT
+#define CONFIG_CMD_SPL_NAND_OFS                0x240000
+#define CONFIG_SYS_NAND_SPL_KERNEL_OFFS        0x280000
+#define CONFIG_CMD_SPL_WRITE_SIZE      0x2000
+#endif
 #endif
 
 #endif /* __IGEP00X0_H */