Merge branch 'master' of git://git.denx.de/u-boot

[karo-tx-uboot.git] / include / configs / pcm030.h

diff --git a/include/configs/pcm030.h b/include/configs/pcm030.h
index 8acf3c7469baee28dc95764caa7fe93d377d75ac..31a93c87de8bbc5f4e5983068f2691d150a45cc7 100644 (file)
--- a/include/configs/pcm030.h
+++ b/include/configs/pcm030.h
@@ -8,23 +8,7 @@
  * (C) Copyright 2009
  * Jon Smirl <jonsmirl@gmail.com>
  *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.         See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
+ * SPDX-License-Identifier:    GPL-2.0+
  */
 
 #ifndef __CONFIG_H
@@ -36,14 +20,22 @@
 High Level Configuration Options
 (easy to change)
 -----------------------------------------------------------------------------*/
-#define CONFIG_MPC5xxx         1       /* This is an MPC5xxx CPU */
-#define CONFIG_MPC5200         1       /* (more precisely an MPC5200 CPU) */
+#define CONFIG_MPC5200         1       /* This is an MPC5200 CPU */
 #define CONFIG_MPC5200_DDR     1       /* (with DDR-SDRAM) */
 #define CONFIG_PHYCORE_MPC5200B_TINY 1 /* phyCORE-MPC5200B -> */
                                        /* FEC configuration and IDE */
+
+/*
+ * Valid values for CONFIG_SYS_TEXT_BASE are:
+ * 0xFFF00000  boot high (standard configuration)
+ * 0xFF000000  boot low
+ * 0x00100000  boot from RAM (for testing only)
+ */
+#ifndef CONFIG_SYS_TEXT_BASE
+#define CONFIG_SYS_TEXT_BASE   0xFFF00000
+#endif
+
 #define CONFIG_SYS_MPC5XXX_CLKIN 33333333 /* ... running at 33.333333MHz */
-#define BOOTFLAG_COLD          0x01    /* Normal Power-On: Boot from FLASH */
-#define BOOTFLAG_WARM          0x02    /* Software reboot */
 
 /*-----------------------------------------------------------------------------
 Serial console configuration
@@ -71,7 +63,7 @@ Serial console configuration
 
 #define        CONFIG_TIMESTAMP        1       /* Print image info with timestamp */
 
-#if (TEXT_BASE == 0xFF000000)  /* Boot low */
+#if (CONFIG_SYS_TEXT_BASE == 0xFF000000)       /* Boot low */
 #define CONFIG_SYS_LOWBOOT 1
 #endif
 /* RAMBOOT will be defined automatically in memory section */
@@ -214,15 +206,13 @@ RTC configuration
 #define CONFIG_SYS_DEFAULT_MBAR                0x80000000
 /* Use SRAM until RAM will be available */
 #define CONFIG_SYS_INIT_RAM_ADDR       MPC5XXX_SRAM
-#define CONFIG_SYS_INIT_RAM_END                MPC5XXX_SRAM_SIZE       /* End of used */
+#define CONFIG_SYS_INIT_RAM_SIZE       MPC5XXX_SRAM_SIZE       /* Size of used */
                                                                /* area in DPRAM */
-#define CONFIG_SYS_GBL_DATA_SIZE       128     /* size in bytes */
-                                               /* reserved for initial data */
-#define CONFIG_SYS_GBL_DATA_OFFSET     (CONFIG_SYS_INIT_RAM_END - \
-                                               CONFIG_SYS_GBL_DATA_SIZE)
+#define CONFIG_SYS_GBL_DATA_OFFSET     (CONFIG_SYS_INIT_RAM_SIZE - \
+                                               GENERATED_GBL_DATA_SIZE)
 #define CONFIG_SYS_INIT_SP_OFFSET      CONFIG_SYS_GBL_DATA_OFFSET
 
-#define CONFIG_SYS_MONITOR_BASE        TEXT_BASE
+#define CONFIG_SYS_MONITOR_BASE        CONFIG_SYS_TEXT_BASE
 #if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE)
 #      define CONFIG_SYS_RAMBOOT               1
 #endif
@@ -373,7 +363,6 @@ RTC configuration
 #define CONFIG_SYS_MEMTEST_END 0x00f00000 /* 1 ... 15 MB in DRAM */
 
 #define CONFIG_SYS_LOAD_ADDR 0x400000 /* default load address */
-#define CONFIG_SYS_HZ 1000 /* decrementer freq: 1 ms ticks */
 
 #define CONFIG_DISPLAY_BOARDINFO 1