at91: switch coloured LED to gpio API

[karo-tx-uboot.git] / include / configs / pm9g45.h

diff --git a/include/configs/pm9g45.h b/include/configs/pm9g45.h
index a044346f39485f54133ce34a900e2723b5a4b542..f78e0ec173e0f1fecf09eed1f1420810ee0b6922 100644 (file)
--- a/include/configs/pm9g45.h
+++ b/include/configs/pm9g45.h
@@ -10,23 +10,7 @@
  *
  * Configuation settings for the PM9G45 board.
  *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
+ * SPDX-License-Identifier:    GPL-2.0+
  */
 
 #ifndef __CONFIG_H
@@ -47,7 +31,6 @@
 /* ARM asynchronous clock */
 #define CONFIG_SYS_AT91_MAIN_CLOCK     12000000 /* from 12 MHz crystal */
 #define CONFIG_SYS_AT91_SLOW_CLOCK     32768           /* slow clock xtal */
-#define CONFIG_SYS_HZ                  1000
 #define CONFIG_SYS_TEXT_BASE           0x73f00000
 
 #define CONFIG_ARCH_CPU_INIT
@@ -71,8 +54,8 @@
 
 /* LED */
 #define CONFIG_AT91_LED
-#define        CONFIG_RED_LED          AT91_PIO_PORTD, 31 /* this is the user1 led */
-#define        CONFIG_GREEN_LED        AT91_PIO_PORTD, 0 /* this is the user2 led */
+#define CONFIG_RED_LED         GPIO_PIN_PD(31) /* this is the user1 led */
+#define CONFIG_GREEN_LED       GPIO_PIN_PD(0)  /* this is the user2 led */
 
 #define CONFIG_BOOTDELAY       3
 
@@ -123,8 +106,8 @@
 #define CONFIG_SYS_NAND_MASK_ALE       (1 << 21)
 /* our CLE is AD22 */
 #define CONFIG_SYS_NAND_MASK_CLE       (1 << 22)
-#define CONFIG_SYS_NAND_ENABLE_PIN     AT91_PIO_PORTC, 14
-#define CONFIG_SYS_NAND_READY_PIN      AT91_PIO_PORTD, 3
+#define CONFIG_SYS_NAND_ENABLE_PIN     GPIO_PIN_PC(14)
+#define CONFIG_SYS_NAND_READY_PIN      GPIO_PIN_PD(3)
 
 #endif
 
@@ -136,6 +119,7 @@
 
 /* USB */
 #define CONFIG_USB_ATMEL
+#define CONFIG_USB_ATMEL_CLK_SEL_UPLL
 #define CONFIG_USB_OHCI_NEW            1
 #define CONFIG_DOS_PARTITION           1
 #define CONFIG_SYS_USB_OHCI_CPU_INIT   1
@@ -177,7 +161,6 @@
 #define CONFIG_CMDLINE_EDITING         1
 #define CONFIG_AUTO_COMPLETE
 #define CONFIG_SYS_HUSH_PARSER
-#define CONFIG_SYS_PROMPT_HUSH_PS2     "> "
 
 /*
  * Size of malloc() pool
@@ -189,10 +172,4 @@
 #define CONFIG_SYS_INIT_SP_ADDR        (CONFIG_SYS_SDRAM_BASE + 0x1000 - \
                                GENERATED_GBL_DATA_SIZE)
 
-#define CONFIG_STACKSIZE               (32*1024)       /* regular stack */
-
-#ifdef CONFIG_USE_IRQ
-#error CONFIG_USE_IRQ not supported
-#endif
-
 #endif