ppc4xx: Cleanup for partial linking and --gc-sections

[karo-tx-uboot.git] / include / configs / sc3.h

diff --git a/include/configs/sc3.h b/include/configs/sc3.h
index d00f2480cb6a256219771f73340278ca43ec4d4a..873d3b4df0a398bcb4d2ea5abc2021165e7b10fb 100644 (file)
--- a/include/configs/sc3.h
+++ b/include/configs/sc3.h
@@ -62,6 +62,8 @@
 #define CONFIG_4xx     1
 #define CONFIG_405GP   1
 
+#define        CONFIG_SYS_TEXT_BASE    0xFFFA0000
+
 #define CONFIG_BOARD_EARLY_INIT_F      1
 #define CONFIG_MISC_INIT_R             1       /* Call misc_init_r() */
 
@@ -76,15 +78,12 @@
 /*-----------------------------------------------------------------------
  * Serial Port
  *----------------------------------------------------------------------*/
+#define CONFIG_CONS_INDEX      1       /* Use UART0                    */
+#define CONFIG_SYS_NS16550
+#define CONFIG_SYS_NS16550_SERIAL
+#define CONFIG_SYS_NS16550_REG_SIZE    1
+#define CONFIG_SYS_NS16550_CLK         get_serial_clock()
 #define CONFIG_SERIAL_MULTI
-#undef CONFIG_SERIAL_SOFTWARE_FIFO
-/*
- * define CONFIG_POWER_DOWN if your cpu should power down while waiting for your input
- * Works only, if you have enabled the CONFIG_SERIAL_SOFTWARE_FIFO feature
- */
-#if CONFIG_SERIAL_SOFTWARE_FIFO
- #define CONFIG_POWER_DOWN
-#endif
 
 /*
  * define CONFIG_SYS_CLK_FREQ to your base crystal clock in Hz
@@ -379,8 +378,9 @@
  */
 #define CONFIG_SYS_SDRAM_BASE          0x00000000
 #define CONFIG_SYS_FLASH_BASE          0xFFE00000
-#define CONFIG_SYS_MONITOR_BASE        0xFFFC0000     /* placed last 256k */
-#define CONFIG_SYS_MONITOR_LEN         (224 * 1024)    /* Reserve 224 KiB for Monitor  */
+
+#define CONFIG_SYS_MONITOR_BASE        CONFIG_SYS_TEXT_BASE    /* Start of U-Boot      */
+#define CONFIG_SYS_MONITOR_LEN         (0xFFFFFFFF - CONFIG_SYS_MONITOR_BASE + 1)
 #define CONFIG_SYS_MALLOC_LEN          (128 * 1024)    /* Reserve 128 KiB for malloc() */
 
 /*
@@ -456,14 +456,14 @@
  * - internal SRAM (OCM=On Chip Memory) is placed to CONFIG_SYS_OCM_DATA_ADDR
  * - Stackpointer will be located to
  *   (CONFIG_SYS_INIT_RAM_ADDR&0xFFFF0000) | (CONFIG_SYS_INIT_SP_OFFSET&0x0000FFFF)
- *   in cpu/ppc4xx/start.S
+ *   in arch/powerpc/cpu/ppc4xx/start.S
  */
 
 #undef CONFIG_SYS_INIT_DCACHE_CS
 /* Where the internal SRAM starts */
 #define CONFIG_SYS_INIT_RAM_ADDR       CONFIG_SYS_OCM_DATA_ADDR
 /* Where the internal SRAM ends (only offset) */
-#define CONFIG_SYS_INIT_RAM_END        0x0F00
+#define CONFIG_SYS_INIT_RAM_SIZE       0x0F00
 
 /*
 
@@ -476,26 +476,17 @@
                           |          |
                           | 64 Bytes |
                           |          |
- CONFIG_SYS_INIT_RAM_END  ------> ------------ higher address
+ CONFIG_SYS_INIT_RAM_SIZE  ------> ------------ higher address
   (offset only)
 
 */
 /* size in bytes reserved for initial data */
-#define CONFIG_SYS_GBL_DATA_SIZE     64
-#define CONFIG_SYS_GBL_DATA_OFFSET   (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE)
+#define CONFIG_SYS_GBL_DATA_OFFSET   (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
 /* Initial value of the stack pointern in internal SRAM */
 #define CONFIG_SYS_INIT_SP_OFFSET    CONFIG_SYS_GBL_DATA_OFFSET
 
-/*
- * Internal Definitions
- *
- * Boot Flags
- */
-#define BOOTFLAG_COLD  0x01            /* Normal Power-On: Boot from FLASH     */
-#define BOOTFLAG_WARM  0x02            /* Software reboot                      */
-
 /* ################################################################################### */
-/* These defines will be used in cpu/ppc4xx/cpu_init.c to setup external chip selects  */
+/* These defines will be used in arch/powerpc/cpu/ppc4xx/cpu_init.c to setup external chip selects  */
 /* They are currently undefined cause they are initiaized in board/solidcard3/init.S   */
 
 /* This chip select accesses the boot device */
@@ -527,7 +518,7 @@
 
 #define CONFIG_SYS_EBC_CFG    0xb84ef000
 
-#define CONFIG_SDRAM_BANK0     /* use the standard SDRAM initialization */
+#undef CONFIG_SDRAM_BANK0      /* use private SDRAM initialization */
 #undef CONFIG_SPD_EEPROM
 
 /*