tx25: add CONFIG_SPL_LIBGENERIC_SUPPORT

[karo-tx-uboot.git] / include / configs / sc3.h

diff --git a/include/configs/sc3.h b/include/configs/sc3.h
index 3e6abf34e4805b4135a26c33a68c110b8fce05dc..fb74608bb9ce89ac26cf2b434b53ef98a94f426d 100644 (file)
--- a/include/configs/sc3.h
+++ b/include/configs/sc3.h
@@ -83,7 +83,6 @@
 #define CONFIG_SYS_NS16550_SERIAL
 #define CONFIG_SYS_NS16550_REG_SIZE    1
 #define CONFIG_SYS_NS16550_CLK         get_serial_clock()
-#define CONFIG_SERIAL_MULTI
 
 /*
  * define CONFIG_SYS_CLK_FREQ to your base crystal clock in Hz
@@ -162,7 +161,6 @@
 #undef CONFIG_LOADS_ECHO   /* no echo on for serial download   */
 #define CONFIG_SYS_LOADS_BAUD_CHANGE   1       /* allow baudrate change        */
 
-#define CONFIG_NET_MULTI
 /* #define CONFIG_EEPRO100_SROM_WRITE */
 /* #define CONFIG_SHOW_MAC */
 #define CONFIG_EEPRO100
@@ -463,7 +461,7 @@
 /* Where the internal SRAM starts */
 #define CONFIG_SYS_INIT_RAM_ADDR       CONFIG_SYS_OCM_DATA_ADDR
 /* Where the internal SRAM ends (only offset) */
-#define CONFIG_SYS_INIT_RAM_END        0x0F00
+#define CONFIG_SYS_INIT_RAM_SIZE       0x0F00
 
 /*
 
@@ -476,13 +474,11 @@
                           |          |
                           | 64 Bytes |
                           |          |
- CONFIG_SYS_INIT_RAM_END  ------> ------------ higher address
+ CONFIG_SYS_INIT_RAM_SIZE  ------> ------------ higher address
   (offset only)
 
 */
-/* size in bytes reserved for initial data */
-#define CONFIG_SYS_GBL_DATA_SIZE     64
-#define CONFIG_SYS_GBL_DATA_OFFSET   (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE)
+#define CONFIG_SYS_GBL_DATA_OFFSET   (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
 /* Initial value of the stack pointern in internal SRAM */
 #define CONFIG_SYS_INIT_SP_OFFSET    CONFIG_SYS_GBL_DATA_OFFSET
 
@@ -519,7 +515,7 @@
 
 #define CONFIG_SYS_EBC_CFG    0xb84ef000
 
-#define CONFIG_SDRAM_BANK0     /* use the standard SDRAM initialization */
+#undef CONFIG_SDRAM_BANK0      /* use private SDRAM initialization */
 #undef CONFIG_SPD_EEPROM
 
 /*
@@ -534,9 +530,9 @@
 
 #define CONFIG_SYS_ISA_MEM_BASE_ADDRESS 0x78000000
 /*
- Die Grafik-Treiber greifen über die Adresse in diesem Macro auf den Chip zu.
+ Die Grafik-Treiber greifen über die Adresse in diesem Macro auf den Chip zu.
  Das funktioniert bei deren Karten, weil sie eine PCI-Bridge benutzen, die
- das gleiche Mapping durchführen kann, wie der SC520 (also Aufteilen von IO-Zugriffen
+ das gleiche Mapping durchführen kann, wie der SC520 (also Aufteilen von IO-Zugriffen
  auf ISA- und PCI-Zyklen)
  */
 #define CONFIG_SYS_ISA_IO_BASE_ADDRESS  0xE8000000