ppc4xx: Remove 4xx NAND booting support

[karo-tx-uboot.git] / include / configs / sequoia.h

diff --git a/include/configs/sequoia.h b/include/configs/sequoia.h
index 0e21ee3dc087eb784878f58fdad1513314748b60..b6a5e6a59c98cadc2abb045d0e64756c7d8b1953 100644 (file)
--- a/include/configs/sequoia.h
+++ b/include/configs/sequoia.h
@@ -97,10 +97,7 @@
 /*
  * Environment
  */
-#if defined(CONFIG_NAND_U_BOOT) || defined(CONFIG_NAND_SPL)
-#define CONFIG_ENV_IS_IN_NAND          /* use NAND for environ vars    */
-#define CONFIG_ENV_IS_EMBEDDED         /* use embedded environment     */
-#elif defined(CONFIG_SYS_RAMBOOT)
+#if defined(CONFIG_SYS_RAMBOOT)
 #define CONFIG_ENV_IS_NOWHERE          /* Store env in memory only     */
 #define CONFIG_ENV_SIZE                (8 << 10)
 /*
@@ -148,68 +145,11 @@
 #endif
 #endif /* CONFIG_CMD_FLASH */
 
-/*
- * IPL (Initial Program Loader, integrated inside CPU)
- * Will load first 4k from NAND (SPL) into cache and execute it from there.
- *
- * SPL (Secondary Program Loader)
- * Will load special U-Boot version (NUB) from NAND and execute it. This SPL
- * has to fit into 4kByte. It sets up the CPU and configures the SDRAM
- * controller and the NAND controller so that the special U-Boot image can be
- * loaded from NAND to SDRAM.
- *
- * NUB (NAND U-Boot)
- * This NAND U-Boot (NUB) is a special U-Boot version which can be started
- * from RAM. Therefore it mustn't (re-)configure the SDRAM controller.
- *
- * On 440EPx the SPL is copied to SDRAM before the NAND controller is
- * set up. While still running from cache, I experienced problems accessing
- * the NAND controller.        sr - 2006-08-25
- */
-#define CONFIG_SYS_NAND_BOOT_SPL_SRC   0xfffff000      /* SPL location               */
-#define CONFIG_SYS_NAND_BOOT_SPL_SIZE  (4 << 10)       /* SPL size                   */
-#define CONFIG_SYS_NAND_BOOT_SPL_DST   (CONFIG_SYS_OCM_BASE + (12 << 10)) /* Copy SPL here  */
-#define CONFIG_SYS_NAND_U_BOOT_DST     0x01000000      /* Load NUB to this addr      */
-#define CONFIG_SYS_NAND_U_BOOT_START   CONFIG_SYS_NAND_U_BOOT_DST      /* Start NUB from     */
-                                                       /*   this addr        */
-#define CONFIG_SYS_NAND_BOOT_SPL_DELTA (CONFIG_SYS_NAND_BOOT_SPL_SRC - CONFIG_SYS_NAND_BOOT_SPL_DST)
-
-/*
- * Define the partitioning of the NAND chip (only RAM U-Boot is needed here)
- */
-#define CONFIG_SYS_NAND_U_BOOT_OFFS    (16 << 10)      /* Offset to RAM U-Boot image */
-#define CONFIG_SYS_NAND_U_BOOT_SIZE    (512 << 10)     /* Size of RAM U-Boot image   */
-
-/*
- * Now the NAND chip has to be defined (no autodetection used!)
- */
-#define CONFIG_SYS_NAND_PAGE_SIZE      512             /* NAND chip page size        */
-#define CONFIG_SYS_NAND_BLOCK_SIZE     (16 << 10)      /* NAND chip block size       */
-#define CONFIG_SYS_NAND_PAGE_COUNT     32              /* NAND chip page count       */
-#define CONFIG_SYS_NAND_BAD_BLOCK_POS  5             /* Location of bad block marker */
-#undef CONFIG_SYS_NAND_4_ADDR_CYCLE                  /* No fourth addr used (<=32MB) */
-
-#define CONFIG_SYS_NAND_ECCSIZE        256
-#define CONFIG_SYS_NAND_ECCBYTES       3
-#define CONFIG_SYS_NAND_OOBSIZE        16
-#define CONFIG_SYS_NAND_ECCPOS         {0, 1, 2, 3, 6, 7}
-
-#ifdef CONFIG_ENV_IS_IN_NAND
-/*
- * For NAND booting the environment is embedded in the U-Boot image. Please take
- * look at the file board/amcc/sequoia/u-boot-nand.lds for details.
- */
-#define CONFIG_ENV_SIZE                CONFIG_SYS_NAND_BLOCK_SIZE
-#define CONFIG_ENV_OFFSET              (CONFIG_SYS_NAND_U_BOOT_OFFS + CONFIG_ENV_SIZE)
-#define CONFIG_ENV_OFFSET_REDUND       (CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE)
-#endif
-
 /*
  * DDR SDRAM
  */
 #define CONFIG_SYS_MBYTES_SDRAM        (256)   /* 256MB                        */
-#if !defined(CONFIG_NAND_U_BOOT) && !defined(CONFIG_NAND_SPL) && \
-    !defined(CONFIG_SYS_RAMBOOT)
+#if !defined(CONFIG_SYS_RAMBOOT)
 #define CONFIG_DDR_DATA_EYE            /* use DDR2 optimization        */
 #endif
 #define CONFIG_SYS_MEM_TOP_HIDE        (4 << 10) /* don't use last 4kbytes     */
@@ -247,7 +187,6 @@
        CONFIG_AMCC_DEF_ENV_POWERPC                                     \
        CONFIG_AMCC_DEF_ENV_PPC_OLD                                     \
        CONFIG_AMCC_DEF_ENV_NOR_UPD                                     \
-       CONFIG_AMCC_DEF_ENV_NAND_UPD                                    \
        "kernel_addr=FC000000\0"                                        \
        "ramdisk_addr=FC180000\0"                                       \
        ""
@@ -321,7 +260,7 @@
  * overwrite part of the U-Boot image which is already loaded from NAND
  * to SDRAM.
  */
-#if defined(CONFIG_NAND_U_BOOT) || defined(CONFIG_SYS_RAMBOOT)
+#if defined(CONFIG_SYS_RAMBOOT)
 #define CONFIG_SYS_POST_MEMORY_ON      0
 #else
 #define CONFIG_SYS_POST_MEMORY_ON      CONFIG_SYS_POST_MEMORY
@@ -370,8 +309,7 @@
 /*
  * On Sequoia CS0 and CS3 are switched when configuring for NAND booting
  */
-#if !defined(CONFIG_NAND_U_BOOT) && !defined(CONFIG_NAND_SPL) && \
-    !defined(CONFIG_SYS_RAMBOOT)
+#if !defined(CONFIG_SYS_RAMBOOT)
 #define CONFIG_SYS_NAND_CS             3       /* NAND chip connected to CSx   */
 /* Memory Bank 0 (NOR-FLASH) initialization                            */
 #define CONFIG_SYS_EBC_PB0AP           0x03017200