Unified codebase for TX28, TX48, TX51, TX53

[karo-tx-uboot.git] / include / configs / spear-common.h

diff --git a/include/configs/spear-common.h b/include/configs/spear-common.h
index cc52e39ffb6cc082763ffe8d61410eb27e654f92..ab1b33209e369fa790caed83ab8fbcee70d78741 100644 (file)
--- a/include/configs/spear-common.h
+++ b/include/configs/spear-common.h
@@ -28,18 +28,20 @@
  */
 
 /* USBD driver configuration */
-#define CONFIG_SPEARUDC
+#define CONFIG_DW_UDC
 #define CONFIG_USB_DEVICE
 #define CONFIG_USB_TTY
 
 #define CONFIG_USBD_PRODUCT_NAME               "SPEAr SoC"
 #define CONFIG_USBD_MANUFACTURER               "ST Microelectronics"
 
+#if defined(CONFIG_USB_TTY)
 #define CONFIG_EXTRA_ENV_USBTTY                        "usbtty=cdc_acm\0"
+#endif
 
 /* I2C driver configuration */
 #define CONFIG_HARD_I2C
-#define CONFIG_SPEAR_I2C
+#define CONFIG_DW_I2C
 #define CONFIG_SYS_I2C_SPEED                   400000
 #define CONFIG_SYS_I2C_SLAVE                   0x02
 
@@ -86,6 +88,8 @@
 #define CONFIG_SYS_LOADS_BAUD_CHANGE
 
 /* NAND FLASH Configuration */
+#define CONFIG_MTD_DEVICE
+#define CONFIG_MTD_PARTITIONS
 #define CONFIG_NAND_SPEAR                      1
 #define CONFIG_SYS_MAX_NAND_DEVICE             1
 #define CONFIG_MTD_NAND_VERIFY_WRITE           1
@@ -181,7 +185,6 @@
 #define CONFIG_SYS_MEMTEST_START               0x00800000
 #define CONFIG_SYS_MEMTEST_END                 0x04000000
 #define CONFIG_SYS_MALLOC_LEN                  (1024*1024)
-#define CONFIG_SYS_GBL_DATA_SIZE               128
 #define CONFIG_IDENT_STRING                    "-SPEAr"
 #define CONFIG_SYS_LONGHELP
 #define CONFIG_SYS_PROMPT                      "u-boot> "
@@ -193,7 +196,6 @@
 #define CONFIG_SYS_BARGSIZE                    CONFIG_SYS_CBSIZE
 #define CONFIG_SYS_LOAD_ADDR                   0x00800000
 #define CONFIG_SYS_CONSOLE_INFO_QUIET          1
-#define CONFIG_SYS_64BIT_VSPRINTF              1
 
 #define CONFIG_EXTRA_ENV_SETTINGS              CONFIG_EXTRA_ENV_USBTTY
 
@@ -210,4 +212,14 @@
 #define PHYS_SDRAM_1                           0x00000000
 #define PHYS_SDRAM_1_MAXSIZE                   0x40000000
 
+#define CONFIG_SYS_SDRAM_BASE                  PHYS_SDRAM_1
+#define CONFIG_SYS_INIT_RAM_ADDR               0xD2800000
+#define CONFIG_SYS_INIT_RAM_SIZE               0x2000
+
+#define CONFIG_SYS_INIT_SP_OFFSET              \
+       (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
+
+#define CONFIG_SYS_INIT_SP_ADDR                        \
+       (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
+
 #endif