DEBUG: Fix debug macros

[karo-tx-uboot.git] / include / configs / stxgp3.h

diff --git a/include/configs/stxgp3.h b/include/configs/stxgp3.h
index 479fbab4cb001d9870a90a4c9bb85c6552caf4cf..d85d5276405d7b547565f471cd7d61c8c100ca35 100644 (file)
--- a/include/configs/stxgp3.h
+++ b/include/configs/stxgp3.h
@@ -109,12 +109,9 @@
 
 #ifdef CONFIG_SYS_RAMBOOT
 #define CONFIG_SYS_CCSRBAR_DEFAULT     0x40000000      /* CCSRBAR by BDI cfg   */
-#else
-#define CONFIG_SYS_CCSRBAR_DEFAULT     0xff700000      /* CCSRBAR Default      */
 #endif
-#define CONFIG_SYS_CCSRBAR             0xfdf00000      /* relocated CCSRBAR    */
-#define CONFIG_SYS_CCSRBAR_PHYS        CONFIG_SYS_CCSRBAR      /* physical addr of CCSRBAR */
-#define CONFIG_SYS_IMMR                CONFIG_SYS_CCSRBAR      /* PQII uses CONFIG_SYS_IMMR    */
+#define CONFIG_SYS_CCSRBAR             0xfdf00000
+#define CONFIG_SYS_CCSRBAR_PHYS_LOW    CONFIG_SYS_CCSRBAR
 
 /* DDR Setup */
 #define CONFIG_FSL_DDR1
@@ -123,7 +120,7 @@
 #undef CONFIG_FSL_DDR_INTERACTIVE
 
 #undef  CONFIG_DDR_ECC                 /* only for ECC DDR module */
-#define CONFIG_DDR_DLL                  /* possible DLL fix needed */
+#define CONFIG_SYS_FSL_ERRATUM_DDR_MSYNC_IN    /* possible DLL fix needed */
 #define CONFIG_DDR_2T_TIMING           /* Sets the 2T timing bit */
 
 #define CONFIG_MEM_INIT_VALUE          0xDeadBeef
@@ -155,10 +152,9 @@
 
 #define CONFIG_SYS_INIT_RAM_LOCK       1
 #define CONFIG_SYS_INIT_RAM_ADDR       0x60000000      /* Initial RAM address  */
-#define CONFIG_SYS_INIT_RAM_END        0x4000          /* End of used area in RAM */
+#define CONFIG_SYS_INIT_RAM_SIZE       0x4000          /* Size of used area in RAM */
 
-#define CONFIG_SYS_GBL_DATA_SIZE       128             /* num bytes initial data */
-#define CONFIG_SYS_GBL_DATA_OFFSET     (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE)
+#define CONFIG_SYS_GBL_DATA_OFFSET     (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
 #define CONFIG_SYS_INIT_SP_OFFSET      CONFIG_SYS_GBL_DATA_OFFSET
 
 #define CONFIG_SYS_MONITOR_LEN         (256 * 1024)    /* Reserve 256 kB for Mon */
@@ -213,7 +209,6 @@
 
 #if defined(CONFIG_PCI)                        /* PCI Ethernet card */
 
-#define CONFIG_NET_MULTI
 #define CONFIG_PCI_PNP                 /* do pci plug-and-play */
 
 #undef CONFIG_EEPRO100
@@ -232,10 +227,6 @@
 
 #if defined(CONFIG_TSEC_ENET)
 
-#ifndef CONFIG_NET_MULTI
-#define CONFIG_NET_MULTI       1
-#endif
-
 #define CONFIG_MII             1       /* MII PHY management           */
 
 #define CONFIG_TSEC1   1
@@ -264,8 +255,8 @@
    * - Select bus for bd/buffers
    * - Full duplex
    */
-  #define CONFIG_SYS_CMXFCR_MASK       (CMXFCR_FC2 | CMXFCR_RF2CS_MSK | CMXFCR_TF2CS_MSK)
-  #define CONFIG_SYS_CMXFCR_VALUE      (CMXFCR_RF2CS_CLK13 | CMXFCR_TF2CS_CLK14)
+  #define CONFIG_SYS_CMXFCR_MASK2      (CMXFCR_FC2 | CMXFCR_RF2CS_MSK | CMXFCR_TF2CS_MSK)
+  #define CONFIG_SYS_CMXFCR_VALUE2     (CMXFCR_RF2CS_CLK13 | CMXFCR_TF2CS_CLK14)
   #define CONFIG_SYS_CPMFCR_RAMTYPE    0
 #if 0
   #define CONFIG_SYS_FCC_PSMR          (FCC_PSMR_FDE)
@@ -386,8 +377,8 @@
 #define CONFIG_GATEWAYIP       192.168.85.1
 #define CONFIG_NETMASK         255.255.255.0
 #define CONFIG_HOSTNAME                STX_GP3
-#define CONFIG_ROOTPATH                /gppproot
-#define CONFIG_BOOTFILE                uImage
+#define CONFIG_ROOTPATH                "/gppproot"
+#define CONFIG_BOOTFILE                "uImage"
 #define CONFIG_LOADADDR                0x1000000
 
 #endif /* __CONFIG_H */