avr32: delete non generic board mimc200

[karo-tx-uboot.git] / include / configs / suvd3.h

diff --git a/include/configs/suvd3.h b/include/configs/suvd3.h
index c50832c1e01c0f5af4cf56c14f0f2fd30c55d440..fddba92389c0f5774fdd20f5044d9613f47397e7 100644 (file)
--- a/include/configs/suvd3.h
+++ b/include/configs/suvd3.h
@@ -11,10 +11,7 @@
  * (C) Copyright 2010
  * Heiko Schocher, DENX Software Engineering, hs@denx.de.
  *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
+ * SPDX-License-Identifier:    GPL-2.0+
  */
 
 #ifndef __CONFIG_H
@@ -110,4 +107,41 @@
                                 BATL_CACHEINHIBIT | BATL_GUARDEDSTORAGE)
 #define CONFIG_SYS_DBAT6U      CONFIG_SYS_IBAT6U
 
+/*
+ * QE UEC ethernet configuration
+ */
+#if defined(CONFIG_KMVECT1)
+#define CONFIG_MV88E6352_SWITCH
+#define CONFIG_KM_MVEXTSW_ADDR         0x10
+
+/* ethernet port connected to simple switch 88e6122 (UEC0) */
+#define CONFIG_UEC_ETH1
+#define CONFIG_SYS_UEC1_UCC_NUM                0       /* UCC1 */
+#define CONFIG_SYS_UEC1_RX_CLK         QE_CLK9
+#define CONFIG_SYS_UEC1_TX_CLK         QE_CLK10
+
+#define CONFIG_FIXED_PHY               0xFFFFFFFF
+#define CONFIG_SYS_FIXED_PHY_ADDR      0x1E    /* unused address */
+#define CONFIG_SYS_FIXED_PHY_PORT(devnum, speed, duplex) \
+               {devnum, speed, duplex}
+#define CONFIG_SYS_FIXED_PHY_PORTS \
+               CONFIG_SYS_FIXED_PHY_PORT("UEC0", SPEED_100, DUPLEX_FULL)
+
+#define CONFIG_SYS_UEC1_ETH_TYPE       FAST_ETH
+#define CONFIG_SYS_UEC1_PHY_ADDR       CONFIG_SYS_FIXED_PHY_ADDR
+#define CONFIG_SYS_UEC1_INTERFACE_TYPE PHY_INTERFACE_MODE_MII
+#define CONFIG_SYS_UEC1_INTERFACE_SPEED        100
+
+/* ethernet port connected to piggy (UEC2) */
+#define CONFIG_HAS_ETH1
+#define CONFIG_UEC_ETH2
+#define CONFIG_SYS_UEC2_UCC_NUM                2       /* UCC3 */
+#define CONFIG_SYS_UEC2_RX_CLK         QE_CLK_NONE /* not used in RMII Mode */
+#define CONFIG_SYS_UEC2_TX_CLK         QE_CLK12
+#define CONFIG_SYS_UEC2_ETH_TYPE       FAST_ETH
+#define CONFIG_SYS_UEC2_PHY_ADDR       0
+#define CONFIG_SYS_UEC2_INTERFACE_TYPE PHY_INTERFACE_MODE_RMII
+#define CONFIG_SYS_UEC2_INTERFACE_SPEED        100
+#endif /* CONFIG_KMVECT1 */
+
 #endif /* __CONFIG_H */