Merge branch 'master' of git://git.denx.de/u-boot-arm

[karo-tx-uboot.git] / include / configs / trats.h

diff --git a/include/configs/trats.h b/include/configs/trats.h
index 8a0deea434ec620d5239b51fae670a7586e69494..6efee5c47707b4c1678ba06786df90e4deff4a8d 100644 (file)
--- a/include/configs/trats.h
+++ b/include/configs/trats.h
@@ -69,7 +69,6 @@
 #define CONFIG_SYS_MALLOC_LEN          (CONFIG_ENV_SIZE + (1 << 20))
 
 /* select serial console configuration */
-#define CONFIG_SERIAL_MULTI
 #define CONFIG_SERIAL2                 /* use SERIAL 2 */
 #define CONFIG_BAUDRATE                        115200
 
@@ -78,6 +77,7 @@
 #define CONFIG_MMC
 #define CONFIG_S5P_SDHCI
 #define CONFIG_SDHCI
+#define CONFIG_MMC_SDMA
 
 /* PWM */
 #define CONFIG_PWM
@@ -97,6 +97,22 @@
 #undef CONFIG_CMD_ONENAND
 #undef CONFIG_CMD_MTDPARTS
 #define CONFIG_CMD_MMC
+#define CONFIG_CMD_DFU
+#define CONFIG_CMD_GPT
+
+/* FAT */
+#define CONFIG_CMD_FAT
+#define CONFIG_FAT_WRITE
+
+/* USB Composite download gadget - g_dnl */
+#define CONFIG_USBDOWNLOAD_GADGET
+#define CONFIG_DFU_FUNCTION
+#define CONFIG_DFU_MMC
+
+/* USB Samsung's IDs */
+#define CONFIG_G_DNL_VENDOR_NUM 0x04E8
+#define CONFIG_G_DNL_PRODUCT_NUM 0x6601
+#define CONFIG_G_DNL_MANUFACTURER "Samsung"
 
 #define CONFIG_BOOTDELAY               1
 #define CONFIG_ZERO_BOOTDELAY_CHECK
@@ -107,6 +123,31 @@
 #define CONFIG_BOOTBLOCK               "10"
 #define CONFIG_ENV_COMMON_BOOT         "${console} ${meminfo}"
 
+/* Tizen - partitions definitions */
+#define PARTS_CSA              "csa-mmc"
+#define PARTS_BOOTLOADER       "u-boot"
+#define PARTS_BOOT             "boot"
+#define PARTS_ROOT             "platform"
+#define PARTS_DATA             "data"
+#define PARTS_CSC              "csc"
+#define PARTS_UMS              "ums"
+
+#define PARTS_DEFAULT \
+       "uuid_disk=${uuid_gpt_disk};" \
+       "name="PARTS_CSA",size=8MiB,uuid=${uuid_gpt_"PARTS_CSA"};" \
+       "name="PARTS_BOOTLOADER",size=60MiB," \
+               "uuid=${uuid_gpt_"PARTS_BOOTLOADER"};" \
+       "name="PARTS_BOOT",size=100MiB,uuid=${uuid_gpt_"PARTS_BOOT"};" \
+       "name="PARTS_ROOT",size=1GiB,uuid=${uuid_gpt_"PARTS_ROOT"};" \
+       "name="PARTS_DATA",size=3GiB,uuid=${uuid_gpt_"PARTS_DATA"};" \
+       "name="PARTS_CSC",size=150MiB,uuid=${uuid_gpt_"PARTS_CSC"};" \
+       "name="PARTS_UMS",size=-,uuid=${uuid_gpt_"PARTS_UMS"}\0" \
+
+#define CONFIG_DFU_ALT \
+       "dfu_alt_info=" \
+       "u-boot mmc 80 400;" \
+       "uImage fat 0 2\0" \
+
 #define CONFIG_ENV_OVERWRITE
 #define CONFIG_SYS_CONSOLE_INFO_QUIET
 #define CONFIG_SYS_CONSOLE_IS_IN_ENV
@@ -150,7 +191,9 @@
        "mmcdev=0\0" \
        "mmcbootpart=2\0" \
        "mmcrootpart=3\0" \
-       "opts=always_resume=1"
+       "opts=always_resume=1\0" \
+       "partitions=" PARTS_DEFAULT \
+       CONFIG_DFU_ALT \
 
 /* Miscellaneous configurable options */
 #define CONFIG_SYS_LONGHELP            /* undef to save memory */
@@ -168,12 +211,17 @@
 
 #define CONFIG_SYS_HZ                  1000
 
-/* TRATS has 2 banks of DRAM */
-#define CONFIG_NR_DRAM_BANKS   2
-#define PHYS_SDRAM_1           CONFIG_SYS_SDRAM_BASE   /* LDDDR2 DMC 0 */
-#define PHYS_SDRAM_1_SIZE      (512 << 20)             /* 512 MB in CS 0 */
-#define PHYS_SDRAM_2           0x50000000              /* LPDDR2 DMC 1 */
-#define PHYS_SDRAM_2_SIZE      (512 << 20)             /* 512 MB in CS 0 */
+/* TRATS has 4 banks of DRAM */
+#define CONFIG_NR_DRAM_BANKS   4
+#define SDRAM_BANK_SIZE                (256UL << 20UL) /* 256 MB */
+#define PHYS_SDRAM_1           CONFIG_SYS_SDRAM_BASE
+#define PHYS_SDRAM_1_SIZE      SDRAM_BANK_SIZE
+#define PHYS_SDRAM_2           (CONFIG_SYS_SDRAM_BASE + SDRAM_BANK_SIZE)
+#define PHYS_SDRAM_2_SIZE      SDRAM_BANK_SIZE
+#define PHYS_SDRAM_3           (CONFIG_SYS_SDRAM_BASE + (2 * SDRAM_BANK_SIZE))
+#define PHYS_SDRAM_3_SIZE      SDRAM_BANK_SIZE
+#define PHYS_SDRAM_4           (CONFIG_SYS_SDRAM_BASE + (3 * SDRAM_BANK_SIZE))
+#define PHYS_SDRAM_4_SIZE      SDRAM_BANK_SIZE
 
 #define CONFIG_SYS_MEM_TOP_HIDE                (1 << 20)       /* ram console */
 
@@ -187,29 +235,50 @@
 
 #define CONFIG_DOS_PARTITION
 
+/* GPT */
+#define CONFIG_EFI_PARTITION
+#define CONFIG_PARTITION_UUIDS
+
 #define CONFIG_SYS_INIT_SP_ADDR        (CONFIG_SYS_LOAD_ADDR - GENERATED_GBL_DATA_SIZE)
 #define CONFIG_SYS_CACHELINE_SIZE       32
 
-#include <asm/arch/gpio.h>
-/*
- * I2C Settings
- */
-#define CONFIG_SOFT_I2C_GPIO_SCL exynos4_gpio_part1_get_nr(b, 7)
-#define CONFIG_SOFT_I2C_GPIO_SDA exynos4_gpio_part1_get_nr(b, 6)
 
 #define CONFIG_SOFT_I2C
 #define CONFIG_SOFT_I2C_READ_REPEATED_START
+#define CONFIG_SYS_I2C_INIT_BOARD
 #define CONFIG_SYS_I2C_SPEED   50000
 #define CONFIG_I2C_MULTI_BUS
-#define CONFIG_SYS_MAX_I2C_BUS 7
+#define CONFIG_SOFT_I2C_MULTI_BUS
+#define CONFIG_SYS_MAX_I2C_BUS 15
+
+#include <asm/arch/gpio.h>
+
+/* I2C PMIC */
+#define CONFIG_SOFT_I2C_I2C5_SCL exynos4_gpio_part1_get_nr(b, 7)
+#define CONFIG_SOFT_I2C_I2C5_SDA exynos4_gpio_part1_get_nr(b, 6)
+
+/* I2C FG */
+#define CONFIG_SOFT_I2C_I2C9_SCL exynos4_gpio_part2_get_nr(y4, 1)
+#define CONFIG_SOFT_I2C_I2C9_SDA exynos4_gpio_part2_get_nr(y4, 0)
+
+#define CONFIG_SOFT_I2C_GPIO_SCL get_multi_scl_pin()
+#define CONFIG_SOFT_I2C_GPIO_SDA get_multi_sda_pin()
+#define I2C_INIT multi_i2c_init()
 
-#define CONFIG_PMIC
-#define CONFIG_PMIC_I2C
-#define CONFIG_PMIC_MAX8997
+#define CONFIG_POWER
+#define CONFIG_POWER_I2C
+#define CONFIG_POWER_MAX8997
 
+#define CONFIG_POWER_FG
+#define CONFIG_POWER_FG_MAX17042
+#define CONFIG_POWER_MUIC
+#define CONFIG_POWER_MUIC_MAX8997
+#define CONFIG_POWER_BATTERY
+#define CONFIG_POWER_BATTERY_TRATS
 #define CONFIG_USB_GADGET
 #define CONFIG_USB_GADGET_S3C_UDC_OTG
 #define CONFIG_USB_GADGET_DUALSPEED
+#define CONFIG_USB_GADGET_VBUS_DRAW    2
 
 /* LCD */
 #define CONFIG_EXYNOS_FB