arm: socfpga: Use EMAC1 on SoCDK

[karo-tx-uboot.git] / include / mmc.h

diff --git a/include/mmc.h b/include/mmc.h
index a3a100bd392f7d5591297192b4487fc28974e3d3..7f5f9bc8ca86eb92614c24f951991f05d9dd64e5 100644 (file)
--- a/include/mmc.h
+++ b/include/mmc.h
@@ -32,15 +32,13 @@
 #define MMC_VERSION_4_41       (MMC_VERSION_MMC | 0x429)
 #define MMC_VERSION_4_5                (MMC_VERSION_MMC | 0x405)
 
-#define MMC_MODE_HS            0x001
-#define MMC_MODE_HS_52MHz      0x010
-#define MMC_MODE_4BIT          0x100
-#define MMC_MODE_8BIT          0x200
-#define MMC_MODE_SPI           0x400
-#define MMC_MODE_HC            0x800
-
-#define MMC_MODE_MASK_WIDTH_BITS (MMC_MODE_4BIT | MMC_MODE_8BIT)
-#define MMC_MODE_WIDTH_BITS_SHIFT 8
+#define MMC_MODE_HS            (1 << 0)
+#define MMC_MODE_HS_52MHz      (1 << 1)
+#define MMC_MODE_4BIT          (1 << 2)
+#define MMC_MODE_8BIT          (1 << 3)
+#define MMC_MODE_SPI           (1 << 4)
+#define MMC_MODE_HC            (1 << 5)
+#define MMC_MODE_DDR_52MHz     (1 << 6)
 
 #define SD_DATA_4BIT   0x00040000
 
@@ -100,9 +98,6 @@
 #define SD_HIGHSPEED_BUSY      0x00020000
 #define SD_HIGHSPEED_SUPPORTED 0x00020000
 
-#define MMC_HS_TIMING          0x00000100
-#define MMC_HS_52MHZ           0x2
-
 #define OCR_BUSY               0x80000000
 #define OCR_HCS                        0x40000000
 #define OCR_VOLTAGE_MASK       0x007FFF80
@@ -178,10 +173,16 @@
 
 #define EXT_CSD_CARD_TYPE_26   (1 << 0)        /* Card can run at 26MHz */
 #define EXT_CSD_CARD_TYPE_52   (1 << 1)        /* Card can run at 52MHz */
+#define EXT_CSD_CARD_TYPE_DDR_1_8V     (1 << 2)
+#define EXT_CSD_CARD_TYPE_DDR_1_2V     (1 << 3)
+#define EXT_CSD_CARD_TYPE_DDR_52       (EXT_CSD_CARD_TYPE_DDR_1_8V \
+                                       | EXT_CSD_CARD_TYPE_DDR_1_2V)
 
 #define EXT_CSD_BUS_WIDTH_1    0       /* Card is in 1 bit mode */
 #define EXT_CSD_BUS_WIDTH_4    1       /* Card is in 4 bit mode */
 #define EXT_CSD_BUS_WIDTH_8    2       /* Card is in 8 bit mode */
+#define EXT_CSD_DDR_BUS_WIDTH_4        5       /* Card is in 4 bit DDR mode */
+#define EXT_CSD_DDR_BUS_WIDTH_8        6       /* Card is in 8 bit DDR mode */
 
 #define EXT_CSD_BOOT_ACK_ENABLE                        (1 << 6)
 #define EXT_CSD_BOOT_PARTITION_ENABLE          (1 << 3)
@@ -326,10 +327,11 @@ struct mmc *find_mmc_device(int dev_num);
 int mmc_set_dev(int dev_num);
 void print_mmc_devices(char separator);
 int get_mmc_num(void);
-int board_mmc_getcd(struct mmc *mmc);
 int mmc_switch_part(int dev_num, unsigned int part_num);
 int mmc_getcd(struct mmc *mmc);
+int board_mmc_getcd(struct mmc *mmc);
 int mmc_getwp(struct mmc *mmc);
+int board_mmc_getwp(struct mmc *mmc);
 int mmc_set_dsr(struct mmc *mmc, u16 val);
 /* Function to change the size of boot partition and rpmb partitions */
 int mmc_boot_partition_size_change(struct mmc *mmc, unsigned long bootsize,
@@ -384,6 +386,7 @@ int mmc_legacy_init(int verbose);
 #endif
 
 int board_mmc_init(bd_t *bis);
+int cpu_mmc_init(bd_t *bis);
 
 /* Set block count limit because of 16 bit register limit on some hardware*/
 #ifndef CONFIG_SYS_MMC_MAX_BLK_COUNT