mtd: nand/docg4: fix driver after Linux resync

[karo-tx-uboot.git] / include / mpc824x.h

diff --git a/include/mpc824x.h b/include/mpc824x.h
index 30f01d5aa8999d69b4a70832b84566f19dc17d3f..cb8445830e3d299e724b538aad3518f6e224a3b7 100644 (file)
--- a/include/mpc824x.h
+++ b/include/mpc824x.h
@@ -154,7 +154,7 @@
 #define MAP_B_CONFIG_DATA_LOW  0x0000  /* Lower half of CONFIG_DAT for Map B */
 
 
-#if defined(CFG_ADDR_MAP_A)
+#if defined(CONFIG_SYS_ADDR_MAP_A)
 #define CONFIG_ADDR_HIGH    MAP_A_CONFIG_ADDR_HIGH  /* Upper half of CONFIG_ADDR */
 #define CONFIG_ADDR_LOW            MAP_A_CONFIG_ADDR_LOW   /* Lower half of CONFIG_ADDR */
 #define CONFIG_DATA_HIGH    MAP_A_CONFIG_DATA_HIGH  /* Upper half of CONFIG_DAT */
@@ -258,7 +258,7 @@
 #define PLTR           0x8000000d  /* PCI Latancy Timer Register */
 #define PHTR           0x8000000e  /* PCI Header Type Register */
 #define BISTCTRL       0x8000000f  /* BIST Control */
-#define LMBAR          0x80000010  /* Local Base Addres Register */
+#define LMBAR          0x80000010  /* Local Base Address Register */
 #define PCSRBAR                0x80000014  /* PCSR Base Address Register */
 #define ILR            0x8000003c  /* PCI Interrupt Line Register */
 #define IPR            0x8000003d  /* Interrupt Pin Register */
@@ -451,45 +451,6 @@
 #define MICR_EADDR_MASK                0x30000000
 #define MICR_EADDR_SHIFT       28
 
-#define BATU_BEPI_MSK          0xfffe0000
-#define BATU_BL_MSK            0x00001ffc
-
-#define BATU_BL_128K           0x00000000
-#define BATU_BL_256K           0x00000004
-#define BATU_BL_512K           0x0000000c
-#define BATU_BL_1M             0x0000001c
-#define BATU_BL_2M             0x0000003c
-#define BATU_BL_4M             0x0000007c
-#define BATU_BL_8M             0x000000fc
-#define BATU_BL_16M            0x000001fc
-#define BATU_BL_32M            0x000003fc
-#define BATU_BL_64M            0x000007fc
-#define BATU_BL_128M           0x00000ffc
-#define BATU_BL_256M           0x00001ffc
-
-#define BATU_VS                        0x00000002
-#define BATU_VP                        0x00000001
-
-#define BATL_BRPN_MSK          0xfffe0000
-#define BATL_WIMG_MSK          0x00000078
-
-#define BATL_WRITETHROUGH      0x00000040
-#define BATL_CACHEINHIBIT      0x00000020
-#define BATL_MEMCOHERENCE      0x00000010
-#define BATL_GUARDEDSTORAGE    0x00000008
-
-#define BATL_PP_MSK            0x00000003
-#define BATL_PP_00             0x00000000 /* No access */
-#define BATL_PP_01             0x00000001 /* Read-only */
-#define BATL_PP_10             0x00000002 /* Read-write */
-#define BATL_PP_11             0x00000003
-
-/*
- * I'd attempt to do defines for the PP bits, but it's use is a bit
- * too complex, see the PowerPC Operating Environment Architecture
- * section in the PowerPc arch book, chapter 4.
- */
-
 /*eumb and epic config*/
 
 #define EPIC_FPR               0x00041000