Merge branch 'master' of /home/wd/git/u-boot/master

[karo-tx-uboot.git] / nand_spl / nand_boot.c

diff --git a/nand_spl/nand_boot.c b/nand_spl/nand_boot.c
index c7eadad1b9aa9335c5dcc4e8d7ba1db4881daa7f..d6244183c83b279b5c555e9f88514885f7da5af5 100644 (file)
--- a/nand_spl/nand_boot.c
+++ b/nand_spl/nand_boot.c
@@ -47,11 +47,13 @@ static int nand_command(struct mtd_info *mtd, int block, int page, int offs, u8
        /* Set ALE and clear CLE to start address cycle */
        /* Column address */
        this->cmd_ctrl(mtd, offs, NAND_CTRL_ALE | NAND_CTRL_CHANGE);
-       this->cmd_ctrl(mtd, page_addr & 0xff, 0); /* A[16:9] */
-       this->cmd_ctrl(mtd, (page_addr >> 8) & 0xff, 0); /* A[24:17] */
+       this->cmd_ctrl(mtd, page_addr & 0xff, NAND_CTRL_ALE); /* A[16:9] */
+       this->cmd_ctrl(mtd, (page_addr >> 8) & 0xff,
+                      NAND_CTRL_ALE); /* A[24:17] */
 #ifdef CONFIG_SYS_NAND_4_ADDR_CYCLE
        /* One more address cycle for devices > 32MiB */
-       this->cmd_ctrl(mtd, (page_addr >> 16) & 0x0f, 0); /* A[28:25] */
+       this->cmd_ctrl(mtd, (page_addr >> 16) & 0x0f,
+                      NAND_CTRL_ALE); /* A[28:25] */
 #endif
        /* Latch in address */
        this->cmd_ctrl(mtd, NAND_CMD_NONE, NAND_NCE | NAND_CTRL_CHANGE);
@@ -94,13 +96,15 @@ static int nand_command(struct mtd_info *mtd, int block, int page, int offs, u8
        /* Column address */
        this->cmd_ctrl(mtd, offs & 0xff,
                       NAND_CTRL_ALE | NAND_CTRL_CHANGE); /* A[7:0] */
-       this->cmd_ctrl(mtd, (offs >> 8) & 0xff, 0); /* A[11:9] */
+       this->cmd_ctrl(mtd, (offs >> 8) & 0xff, NAND_CTRL_ALE); /* A[11:9] */
        /* Row address */
-       this->cmd_ctrl(mtd, (page_addr & 0xff), 0); /* A[19:12] */
-       this->cmd_ctrl(mtd, ((page_addr >> 8) & 0xff), 0); /* A[27:20] */
+       this->cmd_ctrl(mtd, (page_addr & 0xff), NAND_CTRL_ALE); /* A[19:12] */
+       this->cmd_ctrl(mtd, ((page_addr >> 8) & 0xff),
+                      NAND_CTRL_ALE); /* A[27:20] */
 #ifdef CONFIG_SYS_NAND_5_ADDR_CYCLE
        /* One more address cycle for devices > 128MiB */
-       this->cmd_ctrl(mtd, (page_addr >> 16) & 0x0f, 0); /* A[31:28] */
+       this->cmd_ctrl(mtd, (page_addr >> 16) & 0x0f,
+                      NAND_CTRL_ALE); /* A[31:28] */
 #endif
        /* Latch in address */
        this->cmd_ctrl(mtd, NAND_CMD_READSTART,
@@ -217,6 +221,14 @@ static int nand_load(struct mtd_info *mtd, unsigned int offs,
        return 0;
 }
 
+#if defined(CONFIG_ARM)
+void board_init_f (ulong bootflag)
+{
+       relocate_code (CONFIG_SYS_TEXT_BASE - TOTAL_MALLOC_LEN, NULL,
+                      CONFIG_SYS_TEXT_BASE);
+}
+#endif
+
 /*
  * The main entry for NAND booting. It's necessary that SDRAM is already
  * configured and available since this code loads the main U-Boot image
@@ -246,6 +258,16 @@ void nand_boot(void)
        ret = nand_load(&nand_info, CONFIG_SYS_NAND_U_BOOT_OFFS, CONFIG_SYS_NAND_U_BOOT_SIZE,
                        (uchar *)CONFIG_SYS_NAND_U_BOOT_DST);
 
+#ifdef CONFIG_NAND_ENV_DST
+       nand_load(&nand_info, CONFIG_ENV_OFFSET, CONFIG_ENV_SIZE,
+                 (uchar *)CONFIG_NAND_ENV_DST);
+
+#ifdef CONFIG_ENV_OFFSET_REDUND
+       nand_load(&nand_info, CONFIG_ENV_OFFSET_REDUND, CONFIG_ENV_SIZE,
+                 (uchar *)CONFIG_NAND_ENV_DST + CONFIG_ENV_SIZE);
+#endif
+#endif
+
        if (nand_chip.select_chip)
                nand_chip.select_chip(&nand_info, -1);