X-Git-Url: https://git.kernelconcepts.de/?p=karo-tx-uboot.git;a=blobdiff_plain;f=board%2Fatmel%2Fat91sam9260ek%2Fat91sam9260ek.c;h=8d3fc75cd9f7a7a0934ff22ca51242b2b66c7010;hp=913e3fb34c13e9df45adf3e6412f793d0f9b53e2;hb=d0a51373131c4ba565a2391d5ed78b87c406ce98;hpb=4615fc22e539a2f7dae971701c05f09e21c1ca25 diff --git a/board/atmel/at91sam9260ek/at91sam9260ek.c b/board/atmel/at91sam9260ek/at91sam9260ek.c index 913e3fb34c..8d3fc75cd9 100644 --- a/board/atmel/at91sam9260ek/at91sam9260ek.c +++ b/board/atmel/at91sam9260ek/at91sam9260ek.c @@ -1,6 +1,6 @@ /* * (C) Copyright 2007-2008 - * Stelian Pop + * Stelian Pop * Lead Tech Design * * See file CREDITS for list of people who contributed to this @@ -23,16 +23,17 @@ */ #include -#include +#include #include #include +#include #include #include #include -#include -#include +#include + #if defined(CONFIG_RESET_PHY_R) && defined(CONFIG_MACB) -#include +# include #endif #include @@ -43,92 +44,56 @@ DECLARE_GLOBAL_DATA_PTR; * Miscelaneous platform dependent initialisations */ -static void at91sam9260ek_serial_hw_init(void) -{ -#ifdef CONFIG_USART0 - at91_set_A_periph(AT91_PIN_PB4, 1); /* TXD0 */ - at91_set_A_periph(AT91_PIN_PB5, 0); /* RXD0 */ - at91_sys_write(AT91_PMC_PCER, 1 << AT91_ID_US0); -#endif - -#ifdef CONFIG_USART1 - at91_set_A_periph(AT91_PIN_PB6, 1); /* TXD1 */ - at91_set_A_periph(AT91_PIN_PB7, 0); /* RXD1 */ - at91_sys_write(AT91_PMC_PCER, 1 << AT91_ID_US1); -#endif - -#ifdef CONFIG_USART2 - at91_set_A_periph(AT91_PIN_PB8, 1); /* TXD2 */ - at91_set_A_periph(AT91_PIN_PB9, 0); /* RXD2 */ - at91_sys_write(AT91_PMC_PCER, 1 << AT91_ID_US2); -#endif - -#ifdef CONFIG_USART3 /* DBGU */ - at91_set_A_periph(AT91_PIN_PB14, 0); /* DRXD */ - at91_set_A_periph(AT91_PIN_PB15, 1); /* DTXD */ - at91_sys_write(AT91_PMC_PCER, 1 << AT91_ID_SYS); -#endif -} - #ifdef CONFIG_CMD_NAND static void at91sam9260ek_nand_hw_init(void) { + struct at91_smc *smc = (struct at91_smc *)ATMEL_BASE_SMC; + struct at91_matrix *matrix = (struct at91_matrix *)ATMEL_BASE_MATRIX; unsigned long csa; - /* Enable CS3 */ - csa = at91_sys_read(AT91_MATRIX_EBICSA); - at91_sys_write(AT91_MATRIX_EBICSA, - csa | AT91_MATRIX_CS3A_SMC_SMARTMEDIA); + /* Assign CS3 to NAND/SmartMedia Interface */ + csa = readl(&matrix->ebicsa); + csa |= AT91_MATRIX_CS3A_SMC_SMARTMEDIA; + writel(csa, &matrix->ebicsa); /* Configure SMC CS3 for NAND/SmartMedia */ - at91_sys_write(AT91_SMC_SETUP(3), - AT91_SMC_NWESETUP_(1) | AT91_SMC_NCS_WRSETUP_(0) | - AT91_SMC_NRDSETUP_(1) | AT91_SMC_NCS_RDSETUP_(0)); - at91_sys_write(AT91_SMC_PULSE(3), - AT91_SMC_NWEPULSE_(3) | AT91_SMC_NCS_WRPULSE_(3) | - AT91_SMC_NRDPULSE_(3) | AT91_SMC_NCS_RDPULSE_(3)); - at91_sys_write(AT91_SMC_CYCLE(3), - AT91_SMC_NWECYCLE_(5) | AT91_SMC_NRDCYCLE_(5)); - at91_sys_write(AT91_SMC_MODE(3), - AT91_SMC_READMODE | AT91_SMC_WRITEMODE | - AT91_SMC_EXNWMODE_DISABLE | -#ifdef CFG_NAND_DBW_16 - AT91_SMC_DBW_16 | -#else /* CFG_NAND_DBW_8 */ - AT91_SMC_DBW_8 | -#endif - AT91_SMC_TDF_(2)); - - at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9260_ID_PIOC); + writel(AT91_SMC_SETUP_NWE(1) | AT91_SMC_SETUP_NCS_WR(0) | + AT91_SMC_SETUP_NRD(1) | AT91_SMC_SETUP_NCS_RD(0), + &smc->cs[3].setup); + writel(AT91_SMC_PULSE_NWE(3) | AT91_SMC_PULSE_NCS_WR(3) | + AT91_SMC_PULSE_NRD(3) | AT91_SMC_PULSE_NCS_RD(3), + &smc->cs[3].pulse); + writel(AT91_SMC_CYCLE_NWE(5) | AT91_SMC_CYCLE_NRD(5), + &smc->cs[3].cycle); + writel(AT91_SMC_MODE_RM_NRD | AT91_SMC_MODE_WM_NWE | + AT91_SMC_MODE_EXNW_DISABLE | +#ifdef CONFIG_SYS_NAND_DBW_16 + AT91_SMC_MODE_DBW_16 | +#else /* CONFIG_SYS_NAND_DBW_8 */ + AT91_SMC_MODE_DBW_8 | +#endif + AT91_SMC_MODE_TDF_CYCLE(2), + &smc->cs[3].mode); /* Configure RDY/BSY */ - at91_set_gpio_input(AT91_PIN_PC13, 1); + at91_set_gpio_input(CONFIG_SYS_NAND_READY_PIN, 1); /* Enable NandFlash */ - at91_set_gpio_output(AT91_PIN_PC14, 1); -} -#endif - -#ifdef CONFIG_HAS_DATAFLASH -static void at91sam9260ek_spi_hw_init(void) -{ - at91_set_A_periph(AT91_PIN_PA3, 0); /* SPI0_NPCS0 */ - at91_set_B_periph(AT91_PIN_PC11, 0); /* SPI0_NPCS1 */ - - at91_set_A_periph(AT91_PIN_PA0, 0); /* SPI0_MISO */ - at91_set_A_periph(AT91_PIN_PA1, 0); /* SPI0_MOSI */ - at91_set_A_periph(AT91_PIN_PA2, 0); /* SPI0_SPCK */ + at91_set_gpio_output(CONFIG_SYS_NAND_ENABLE_PIN, 1); - /* Enable clock */ - at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9260_ID_SPI0); } #endif #ifdef CONFIG_MACB static void at91sam9260ek_macb_hw_init(void) { - /* Enable clock */ - at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9260_ID_EMAC); + struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC; + struct at91_port *pioa = (struct at91_port *)ATMEL_BASE_PIOA; + struct at91_rstc *rstc = (struct at91_rstc *)ATMEL_BASE_RSTC; + unsigned long erstl; + + /* Enable EMAC clock */ + writel(1 << ATMEL_ID_EMAC0, &pmc->pcer); /* * Disable pull-up on: @@ -142,87 +107,75 @@ static void at91sam9260ek_macb_hw_init(void) * PHY has internal pull-down */ writel(pin_to_mask(AT91_PIN_PA14) | - pin_to_mask(AT91_PIN_PA15) | - pin_to_mask(AT91_PIN_PA17) | - pin_to_mask(AT91_PIN_PA25) | - pin_to_mask(AT91_PIN_PA26) | - pin_to_mask(AT91_PIN_PA28), - pin_to_controller(AT91_PIN_PA0) + PIO_PUDR); + pin_to_mask(AT91_PIN_PA15) | + pin_to_mask(AT91_PIN_PA17) | + pin_to_mask(AT91_PIN_PA25) | + pin_to_mask(AT91_PIN_PA26) | + pin_to_mask(AT91_PIN_PA28), + &pioa->pudr); + + erstl = readl(&rstc->mr) & AT91_RSTC_MR_ERSTL_MASK; /* Need to reset PHY -> 500ms reset */ - at91_sys_write(AT91_RSTC_MR, AT91_RSTC_KEY | - (AT91_RSTC_ERSTL & (0x0D << 8)) | - AT91_RSTC_URSTEN); + writel(AT91_RSTC_KEY | AT91_RSTC_MR_ERSTL(13) | + AT91_RSTC_MR_URSTEN, &rstc->mr); - at91_sys_write(AT91_RSTC_CR, AT91_RSTC_KEY | AT91_RSTC_EXTRST); + writel(AT91_RSTC_KEY | AT91_RSTC_CR_EXTRST, &rstc->cr); /* Wait for end hardware reset */ - while (!(at91_sys_read(AT91_RSTC_SR) & AT91_RSTC_NRSTL)); + while (!(readl(&rstc->sr) & AT91_RSTC_SR_NRSTL)) + ; /* Restore NRST value */ - at91_sys_write(AT91_RSTC_MR, AT91_RSTC_KEY | - (AT91_RSTC_ERSTL & (0x0 << 8)) | - AT91_RSTC_URSTEN); + writel(AT91_RSTC_KEY | erstl | AT91_RSTC_MR_URSTEN, + &rstc->mr); /* Re-enable pull-up */ writel(pin_to_mask(AT91_PIN_PA14) | - pin_to_mask(AT91_PIN_PA15) | - pin_to_mask(AT91_PIN_PA17) | - pin_to_mask(AT91_PIN_PA25) | - pin_to_mask(AT91_PIN_PA26) | - pin_to_mask(AT91_PIN_PA28), - pin_to_controller(AT91_PIN_PA0) + PIO_PUER); + pin_to_mask(AT91_PIN_PA15) | + pin_to_mask(AT91_PIN_PA17) | + pin_to_mask(AT91_PIN_PA25) | + pin_to_mask(AT91_PIN_PA26) | + pin_to_mask(AT91_PIN_PA28), + &pioa->puer); + + /* Initialize EMAC=MACB hardware */ + at91_macb_hw_init(); +} +#endif - at91_set_A_periph(AT91_PIN_PA19, 0); /* ETXCK_EREFCK */ - at91_set_A_periph(AT91_PIN_PA17, 0); /* ERXDV */ - at91_set_A_periph(AT91_PIN_PA14, 0); /* ERX0 */ - at91_set_A_periph(AT91_PIN_PA15, 0); /* ERX1 */ - at91_set_A_periph(AT91_PIN_PA18, 0); /* ERXER */ - at91_set_A_periph(AT91_PIN_PA16, 0); /* ETXEN */ - at91_set_A_periph(AT91_PIN_PA12, 0); /* ETX0 */ - at91_set_A_periph(AT91_PIN_PA13, 0); /* ETX1 */ - at91_set_A_periph(AT91_PIN_PA21, 0); /* EMDIO */ - at91_set_A_periph(AT91_PIN_PA20, 0); /* EMDC */ +#ifdef CONFIG_GENERIC_ATMEL_MCI +int board_mmc_init(bd_t *bd) +{ + at91_mci_hw_init(); -#ifndef CONFIG_RMII - at91_set_B_periph(AT91_PIN_PA28, 0); /* ECRS */ - at91_set_B_periph(AT91_PIN_PA29, 0); /* ECOL */ - at91_set_B_periph(AT91_PIN_PA25, 0); /* ERX2 */ - at91_set_B_periph(AT91_PIN_PA26, 0); /* ERX3 */ - at91_set_B_periph(AT91_PIN_PA27, 0); /* ERXCK */ -#if defined(CONFIG_AT91SAM9260EK) - /* - * use PA10, PA11 for ETX2, ETX3. - * PA23 and PA24 are for TWI EEPROM - */ - at91_set_B_periph(AT91_PIN_PA10, 0); /* ETX2 */ - at91_set_B_periph(AT91_PIN_PA11, 0); /* ETX3 */ -#else - at91_set_B_periph(AT91_PIN_PA23, 0); /* ETX2 */ - at91_set_B_periph(AT91_PIN_PA24, 0); /* ETX3 */ -#endif - at91_set_B_periph(AT91_PIN_PA22, 0); /* ETXER */ + return atmel_mci_init((void *)ATMEL_BASE_MCI); +} #endif +int board_early_init_f(void) +{ + struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC; + + /* Enable clocks for all PIOs */ + writel((1 << ATMEL_ID_PIOA) | (1 << ATMEL_ID_PIOB) | + (1 << ATMEL_ID_PIOC), + &pmc->pcer); + + return 0; } -#endif int board_init(void) { - /* Enable Ctrlc */ - console_init_f(); - - /* arch number of AT91SAM9260EK-Board */ - gd->bd->bi_arch_number = MACH_TYPE_AT91SAM9260EK; /* adress of boot parameters */ - gd->bd->bi_boot_params = PHYS_SDRAM + 0x100; + gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100; - at91sam9260ek_serial_hw_init(); + at91_seriald_hw_init(); #ifdef CONFIG_CMD_NAND at91sam9260ek_nand_hw_init(); #endif #ifdef CONFIG_HAS_DATAFLASH - at91sam9260ek_spi_hw_init(); + at91_spi0_hw_init((1 << 0) | (1 << 1)); #endif #ifdef CONFIG_MACB at91sam9260ek_macb_hw_init(); @@ -233,21 +186,15 @@ int board_init(void) int dram_init(void) { - gd->bd->bi_dram[0].start = PHYS_SDRAM; - gd->bd->bi_dram[0].size = PHYS_SDRAM_SIZE; + gd->ram_size = get_ram_size( + (void *)CONFIG_SYS_SDRAM_BASE, + CONFIG_SYS_SDRAM_SIZE); return 0; } #ifdef CONFIG_RESET_PHY_R void reset_phy(void) { -#ifdef CONFIG_MACB - /* - * Initialize ethernet HW addr prior to starting Linux, - * needed for nfsroot - */ - eth_init(gd->bd); -#endif } #endif @@ -255,7 +202,7 @@ int board_eth_init(bd_t *bis) { int rc = 0; #ifdef CONFIG_MACB - rc = macb_eth_initialize(0, (void *)AT91_BASE_EMAC, 0x00); + rc = macb_eth_initialize(0, (void *)ATMEL_BASE_EMAC0, 0x00); #endif return rc; }