X-Git-Url: https://git.kernelconcepts.de/?p=karo-tx-uboot.git;a=blobdiff_plain;f=drivers%2Fserial%2Fserial_zynq.c;h=22c6bf099cf7a187c7a9687dd95e987a1f255877;hp=38322367b42981da0b9e3b36cea54c3009f85763;hb=1feb6e3c9216a34885f24f0df4a02a30dfb35f19;hpb=198166877768cf4d0197289a524df8a6ca0e2f19

diff --git a/drivers/serial/serial_zynq.c b/drivers/serial/serial_zynq.c
index 38322367b4..22c6bf099c 100644
--- a/drivers/serial/serial_zynq.c
+++ b/drivers/serial/serial_zynq.c
@@ -2,23 +2,7 @@
  * Copyright (C) 2012 Michal Simek <monstr@monstr.eu>
  * Copyright (C) 2011-2012 Xilinx, Inc. All rights reserved.
  *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
+ * SPDX-License-Identifier:	GPL-2.0+
  */
 
 #include <common.h>
@@ -26,6 +10,8 @@
 #include <asm/io.h>
 #include <linux/compiler.h>
 #include <serial.h>
+#include <asm/arch/clk.h>
+#include <asm/arch/hardware.h>
 
 #define ZYNQ_UART_SR_TXFULL	0x00000010 /* TX FIFO full */
 #define ZYNQ_UART_SR_RXEMPTY	0x00000002 /* RX FIFO empty */
@@ -37,10 +23,6 @@
 
 #define ZYNQ_UART_MR_PARITY_NONE	0x00000020  /* No parity mode */
 
-/* Some clock/baud constants */
-#define ZYNQ_UART_BDIV	15 /* Default/reset BDIV value */
-#define ZYNQ_UART_BASECLK	3125000L /* master / (bdiv + 1) */
-
 struct uart_zynq {
 	u32 control; /* Control Register [8:0] */
 	u32 mode; /* Mode Register [10:0] */
@@ -53,28 +35,24 @@ struct uart_zynq {
 };
 
 static struct uart_zynq *uart_zynq_ports[2] = {
-#ifdef CONFIG_ZYNQ_SERIAL_BASEADDR0
-	[0] = (struct uart_zynq *)CONFIG_ZYNQ_SERIAL_BASEADDR0,
+	[0] = (struct uart_zynq *)ZYNQ_SERIAL_BASEADDR0,
+	[1] = (struct uart_zynq *)ZYNQ_SERIAL_BASEADDR1,
+};
+
+#if !defined(CONFIG_ZYNQ_SERIAL_BAUDRATE0)
+# define CONFIG_ZYNQ_SERIAL_BAUDRATE0	CONFIG_BAUDRATE
 #endif
-#ifdef CONFIG_ZYNQ_SERIAL_BASEADDR1
-	[1] = (struct uart_zynq *)CONFIG_ZYNQ_SERIAL_BASEADDR1,
+#if !defined(CONFIG_ZYNQ_SERIAL_BAUDRATE1)
+# define CONFIG_ZYNQ_SERIAL_BAUDRATE1	CONFIG_BAUDRATE
 #endif
-};
 
 struct uart_zynq_params {
 	u32 baudrate;
-	u32 clock;
 };
 
 static struct uart_zynq_params uart_zynq_ports_param[2] = {
-#if defined(CONFIG_ZYNQ_SERIAL_BAUDRATE0) && defined(CONFIG_ZYNQ_SERIAL_CLOCK0)
 	[0].baudrate = CONFIG_ZYNQ_SERIAL_BAUDRATE0,
-	[0].clock = CONFIG_ZYNQ_SERIAL_CLOCK0,
-#endif
-#if defined(CONFIG_ZYNQ_SERIAL_BAUDRATE1) && defined(CONFIG_ZYNQ_SERIAL_CLOCK1)
 	[1].baudrate = CONFIG_ZYNQ_SERIAL_BAUDRATE1,
-	[1].clock = CONFIG_ZYNQ_SERIAL_CLOCK1,
-#endif
 };
 
 /* Set up the baud rate in gd struct */
@@ -84,7 +62,7 @@ static void uart_zynq_serial_setbrg(const int port)
 	unsigned int calc_bauderror, bdiv, bgen;
 	unsigned long calc_baud = 0;
 	unsigned long baud = uart_zynq_ports_param[port].baudrate;
-	unsigned long clock = uart_zynq_ports_param[port].clock;
+	unsigned long clock = get_uart_clk(port);
 	struct uart_zynq *regs = uart_zynq_ports[port];
 
 	/*                master clock
@@ -170,37 +148,6 @@ static int uart_zynq_serial_getc(const int port)
 	return readl(&regs->tx_rx_fifo);
 }
 
-#if !defined(CONFIG_SERIAL_MULTI)
-int serial_init(void)
-{
-	return uart_zynq_serial_init(0);
-}
-
-void serial_setbrg(void)
-{
-	uart_zynq_serial_setbrg(0);
-}
-
-void serial_putc(const char c)
-{
-	uart_zynq_serial_putc(c, 0);
-}
-
-void serial_puts(const char *s)
-{
-	uart_zynq_serial_puts(s, 0);
-}
-
-int serial_getc(void)
-{
-	return uart_zynq_serial_getc(0);
-}
-
-int serial_tstc(void)
-{
-	return uart_zynq_serial_tstc(0);
-}
-#else
 /* Multi serial device functions */
 #define DECLARE_PSSERIAL_FUNCTIONS(port) \
 	int uart_zynq##port##_init(void) \
@@ -219,8 +166,8 @@ int serial_tstc(void)
 /* Serial device descriptor */
 #define INIT_PSSERIAL_STRUCTURE(port, __name) {	\
 	  .name   = __name,			\
-	  .init   = uart_zynq##port##_init,	\
-	  .uninit = NULL,			\
+	  .start  = uart_zynq##port##_init,	\
+	  .stop   = NULL,			\
 	  .setbrg = uart_zynq##port##_setbrg,	\
 	  .getc   = uart_zynq##port##_getc,	\
 	  .tstc   = uart_zynq##port##_tstc,	\
@@ -237,11 +184,19 @@ struct serial_device uart_zynq_serial1_device =
 
 __weak struct serial_device *default_serial_console(void)
 {
+#if defined(CONFIG_ZYNQ_SERIAL_UART0)
 	if (uart_zynq_ports[0])
 		return &uart_zynq_serial0_device;
+#endif
+#if defined(CONFIG_ZYNQ_SERIAL_UART1)
 	if (uart_zynq_ports[1])
 		return &uart_zynq_serial1_device;
-
+#endif
 	return NULL;
 }
-#endif
+
+void zynq_serial_initalize(void)
+{
+	serial_register(&uart_zynq_serial0_device);
+	serial_register(&uart_zynq_serial1_device);
+}