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sf: Respect maximum SPI write size
authorSimon Glass <sjg@chromium.org>
Mon, 11 Mar 2013 06:08:06 +0000 (06:08 +0000)
committerSimon Glass <sjg@chromium.org>
Tue, 19 Mar 2013 15:45:37 +0000 (08:45 -0700)
commit1e566bc6dbcfc9f13909d5cb40dd74925bcdd579
tree225721f4a7cdf6703a4b0408b1e63be1c649cc6ftree | snapshot
parent0c456cee952f3fa5ae6f5c42f960eeaa39140b62commit | diff
sf: Respect maximum SPI write size

Some SPI flash controllers (e.g. Intel ICH) have a limit on the number of
bytes that can be in a write transaction. Support this by breaking the
writes into multiple transactions.

Signed-off-by: Simon Glass <sjg@chromium.org>
drivers/mtd/spi/spi_flash.c diff | blob | history
UBoot for KaRo TX COM modules