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ppc/p4080: Handle timebase enabling and frequency reporting
authorKumar Gala <galak@kernel.crashing.org>
Thu, 17 Sep 2009 06:52:37 +0000 (01:52 -0500)
committerKumar Gala <galak@kernel.crashing.org>
Thu, 24 Sep 2009 17:05:29 +0000 (12:05 -0500)
commit3c2a67eec8a0facc865b400caca52e7f6b7adf01
tree131a11003534635f5ae7a948ee4202e1e2d1c711tree | snapshot
parent7e4259bba4c56536760e42d32dacfb3233f216fdcommit | diff
ppc/p4080: Handle timebase enabling and frequency reporting

On CoreNet style platforms the timebase frequency is the bus frequency
defined by 16 (on PQ3 it is divide by 8).  Also on the CoreNet platforms
the core not longer controls the enabling of the timebase.  We now need
to enable the boot core's timebase via CCSR register writes.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
cpu/mpc85xx/cpu.c diff | blob | history
cpu/mpc85xx/cpu_init.c diff | blob | history
cpu/mpc85xx/fdt.c diff | blob | history
UBoot for KaRo TX COM modules