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sunxi: Cache line size definition
authorPaul Kocialkowski <contact@paulk.fr>
Sat, 16 May 2015 17:52:11 +0000 (19:52 +0200)
committerLothar Waßmann <LW@KARO-electronics.de>
Tue, 8 Sep 2015 20:43:14 +0000 (22:43 +0200)
commit3cd9f0916acc8c489065ec8136e94ef0395f9a41
treeee58e21cb960e2897d9a8ea1675ff1a14e4506bbtree | snapshot
parentecdba91c0a1616a6f7d2d06cbd2b19d02904091acommit | diff
sunxi: Cache line size definition

Sunxi platforms use ARM Cortex A8, A7 and A15 (unsupported yet) CPU cores,
which all have 64 bytes cache line size.

This is required to e.g. enable USB gadget.

Signed-off-by: Paul Kocialkowski <contact@paulk.fr>
Reviewed-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
include/configs/sunxi-common.h diff | blob | history
UBoot for KaRo TX COM modules