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ppc/8xxx: Misc DDR related fixes
authorKumar Gala <galak@kernel.crashing.org>
Thu, 10 Sep 2009 19:54:55 +0000 (14:54 -0500)
committerTom Rix <Tom.Rix@windriver.com>
Sat, 3 Oct 2009 14:04:27 +0000 (09:04 -0500)
commit6690dcc173f8de080f23a8db2d169f2ff2eec1a1
tree7a59bcfa87d3945329926828c10c1a11595f48d0tree | snapshot
parentf761439418f589e16804061edeb848c8ae497091commit | diff
ppc/8xxx: Misc DDR related fixes

* Fix setting of ESDMODE (MR1) register - the bit shifting was wrong
* Fix the format string to match size in a debug print

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
cpu/mpc8xxx/ddr/ctrl_regs.c diff | blob | history
cpu/mpc8xxx/ddr/ddr3_dimm_params.c diff | blob | history
UBoot for KaRo TX COM modules