x86: baytrail: Support multiple microcode copies
authorBin Meng <bmeng.cn@gmail.com>
Sat, 15 Aug 2015 20:37:50 +0000 (14:37 -0600)
committerLothar Waßmann <LW@KARO-electronics.de>
Thu, 10 Sep 2015 09:29:45 +0000 (11:29 +0200)
commit7b445bbd326cc87c7d0fe35cd64018e38607de82
treeefc992770e6b55f413fa5f9d0a1bd00b87015d1c
parent46210f2ddb018e973ae71197273b52055b5474c5
x86: baytrail: Support multiple microcode copies

Intel FSP has the capability to walk through the microcode blocks
which are passed as the TempRamInit() parameter from U-Boot and
finds the most appropriate microcode which is suitable for the cpu
on which it is running. Now we've seen several steppings for Intel
BayTrail series processors, adding those microcodes to the Intel
BayleyBay and MinnowMax board device tree files.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Signed-off-by: Simon Glass <sjg@chromium.org>
arch/x86/dts/bayleybay.dts
arch/x86/dts/minnowmax.dts