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arm/davinci: fix DDR2/mDDR memory controller initialization for Omap L138
authorMikhail Kshevetskiy <mikhail.kshevetskiy@gmail.com>
Mon, 9 Jul 2012 08:52:41 +0000 (08:52 +0000)
committerAlbert ARIBAUD <albert.u.boot@aribaud.net>
Sat, 1 Sep 2012 12:58:10 +0000 (14:58 +0200)
commit89473d233f0d8ef74c6aac37fe3258ef3d3efc06
treec798a414e8c103be95166def21606b5179f44c17tree | snapshot
parentc50afc1dab78a1a72bc37b60d97864e56b52cc5ccommit | diff
arm/davinci: fix DDR2/mDDR memory controller initialization for Omap L138

follow section 15.2.13.1 (Initializing Following Device Power Up or Reset) of
OMAP-L138 DSP+ARM Processor Technical Reference Manual

Signed-off-by: Mikhail Kshevetskiy <mikhail.kshevetskiy@gmail.com>
Acked-by: Christian Riesch <christian.riesch@omicron.at>
Tested-by: Christian Riesch <christian.riesch@omicron.at>
arch/arm/cpu/arm926ejs/davinci/da850_lowlevel.c diff | blob | history
arch/arm/include/asm/arch-davinci/hardware.h diff | blob | history
UBoot for KaRo TX COM modules