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fsl-ddr: Add extra cycle to turnaround times
authorDave Liu <daveliu@freescale.com>
Tue, 8 Dec 2009 03:56:48 +0000 (11:56 +0800)
committerKumar Gala <galak@kernel.crashing.org>
Tue, 27 Apr 2010 03:37:53 +0000 (22:37 -0500)
commit99bac479dd183529f4e259a0de8d31644219d487
tree2ccdc234baf44fc4dc11c4726b73d8e9e0e9189dtree | snapshot
parentf8d05e5e5888d88ab42524d699924936e8e77970commit | diff
fsl-ddr: Add extra cycle to turnaround times

Add an extra cycle turnaround time to read->write to ensure stability
at high DDR frequencies.

Signed-off-by: Dave Liu <daveliu@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
arch/powerpc/cpu/mpc8xxx/ddr/ctrl_regs.c diff | blob | history
UBoot for KaRo TX COM modules