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(parent: 8296415) | patch
serial: sh: fix internal clock source on SCIF
authorVladimir Barinov <vladimir.barinov@cogentembedded.com>
Fri, 13 Feb 2015 22:05:18 +0000 (01:05 +0300)
committerLothar Waßmann <LW@KARO-electronics.de>
Tue, 1 Sep 2015 12:05:50 +0000 (14:05 +0200)
commit9e28d3b7110b9da0d3b3d90b632fc771c5cc656d
tree08cf823010151c8f0574c7ee7ba6ea0da6091e7etree | snapshot
parent8296415a549fa1d0c2995d5d6892f5a31b81412ecommit | diff
serial: sh: fix internal clock source on SCIF

The formula to calculate SCIF BRR for R-Car H2/M2/E2 SoCs is as follows:

BRR = pclk / (64 * 2^(2n-1) * baudrate) - 1,
the prescaler is 0 due to SCSMR settings, hence n=0

Also SCSCR must be set to use internal or external clock source.

Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
drivers/serial/serial_sh.h diff | blob | history
UBoot for KaRo TX COM modules