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(parent: d707e5b) | patch
MIPS: mips32/cache.S: save return address in t9 register
authorGabor Juhos <juhosg@openwrt.org>
Thu, 13 Jun 2013 10:59:34 +0000 (12:59 +0200)
committerTom Rini <trini@ti.com>
Wed, 24 Jul 2013 13:51:06 +0000 (09:51 -0400)
commitc325916563ac67ec5f86748060c2909a9b960bee
treea98d4adeb632f03e54c4aa24760fca03732b7ddetree | snapshot
parentd707e5b713e1188556027d835a542d1fc888179dcommit | diff
MIPS: mips32/cache.S: save return address in t9 register

Synchronize the code with mips64/cache.S, in order to
allow further unifications.

Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
arch/mips/cpu/mips32/cache.S diff | blob | history
UBoot for KaRo TX COM modules