]> git.kernelconcepts.de Git - karo-tx-uboot.git/commitdiff
mpc83xx: fix serdes setup for the MPC8378E boards
authorAnton Vorontsov <avorontsov@ru.mvista.com>
Thu, 2 Oct 2008 14:31:53 +0000 (18:31 +0400)
committerKim Phillips <kim.phillips@freescale.com>
Tue, 21 Oct 2008 23:33:25 +0000 (18:33 -0500)
MPC837xE specs says that SerDes1 has:

— Two lanes running x1 SGMII at 1.25 Gbps;
— Two lanes running x1 SATA at 1.5 or 3.0 Gbps.

And for SerDes2:

— Two lanes running x1 PCI Express at 2.5 Gbps;
— One lane running x2 PCI Express at 2.5 Gbps;
— Two lanes running x1 SATA at 1.5 or 3.0 Gbps.

The spec also explicitly states that PEX options are not valid for
the SD1.

Nevertheless MPC8378 RDB and MDS boards configure the SD1 for PEX,
which is wrong to do.

Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
board/freescale/mpc837xemds/mpc837xemds.c
board/freescale/mpc837xerdb/mpc837xerdb.c

index 6c537e244453f4a805e3ac88f0a05cc741e4280f..155907ee92453bf133900e3d60324a52011bb95b 100644 (file)
@@ -44,7 +44,7 @@ int board_early_init_f(void)
                                 FSL_SERDES_CLK_100, FSL_SERDES_VDD_1V);
                break;
        case SPR_8378:
-               fsl_setup_serdes(CONFIG_FSL_SERDES1, FSL_SERDES_PROTO_PEX,
+               fsl_setup_serdes(CONFIG_FSL_SERDES2, FSL_SERDES_PROTO_PEX,
                                 FSL_SERDES_CLK_100, FSL_SERDES_VDD_1V);
                break;
        case SPR_8379:
index 18a21a197ea791c882231062104aa5ef677a1130..318a3dce710052410440f2d6e3d38d4338e2b17c 100644 (file)
@@ -148,7 +148,7 @@ int board_early_init_f(void)
                                 FSL_SERDES_CLK_100, FSL_SERDES_VDD_1V);
                break;
        case SPR_8378:
-               fsl_setup_serdes(CONFIG_FSL_SERDES1, FSL_SERDES_PROTO_PEX,
+               fsl_setup_serdes(CONFIG_FSL_SERDES2, FSL_SERDES_PROTO_PEX,
                                 FSL_SERDES_CLK_100, FSL_SERDES_VDD_1V);
                break;
        case SPR_8379: