Merge 'u-boot-atmel/master' into 'u-boot-arm/master'
authorAlbert ARIBAUD <albert.u.boot@aribaud.net>
Wed, 9 Jan 2013 19:01:48 +0000 (20:01 +0100)
committerAlbert ARIBAUD <albert.u.boot@aribaud.net>
Wed, 9 Jan 2013 19:01:48 +0000 (20:01 +0100)
597 files changed:
.gitignore
MAINTAINERS
MAKEALL
Makefile
README
arch/arm/cpu/arm1136/start.S
arch/arm/cpu/arm1176/start.S
arch/arm/cpu/arm720t/start.S
arch/arm/cpu/arm920t/start.S
arch/arm/cpu/arm925t/start.S
arch/arm/cpu/arm926ejs/davinci/reset.c
arch/arm/cpu/arm926ejs/kirkwood/mpp.c
arch/arm/cpu/arm926ejs/mxs/clock.c
arch/arm/cpu/arm926ejs/mxs/spl_boot.c
arch/arm/cpu/arm926ejs/mxs/spl_mem_init.c
arch/arm/cpu/arm926ejs/mxs/spl_power_init.c
arch/arm/cpu/arm926ejs/start.S
arch/arm/cpu/arm946es/start.S
arch/arm/cpu/arm_intcm/start.S
arch/arm/cpu/armv7/am33xx/Makefile
arch/arm/cpu/armv7/am33xx/board.c
arch/arm/cpu/armv7/am33xx/clock.c
arch/arm/cpu/armv7/am33xx/elm.c [new file with mode: 0644]
arch/arm/cpu/armv7/am33xx/mem.c [new file with mode: 0644]
arch/arm/cpu/armv7/exynos/clock.c
arch/arm/cpu/armv7/exynos/pinmux.c
arch/arm/cpu/armv7/omap-common/Makefile
arch/arm/cpu/armv7/omap-common/boot-common.c
arch/arm/cpu/armv7/omap-common/emif-common.c
arch/arm/cpu/armv7/omap3/Makefile
arch/arm/cpu/armv7/omap3/am35x_musb.c [new file with mode: 0644]
arch/arm/cpu/armv7/omap3/board.c
arch/arm/cpu/armv7/omap3/mem.c
arch/arm/cpu/armv7/omap3/sdrc.c
arch/arm/cpu/armv7/omap4/clocks.c
arch/arm/cpu/armv7/omap4/hwinit.c
arch/arm/cpu/armv7/start.S
arch/arm/cpu/ixp/start.S
arch/arm/cpu/pxa/start.S
arch/arm/cpu/s3c44b0/start.S
arch/arm/cpu/sa1100/start.S
arch/arm/include/asm/arch-am33xx/cpu.h
arch/arm/include/asm/arch-am33xx/elm.h [new file with mode: 0644]
arch/arm/include/asm/arch-am33xx/hardware.h
arch/arm/include/asm/arch-am33xx/mem.h [new file with mode: 0644]
arch/arm/include/asm/arch-am33xx/omap_gpmc.h [new file with mode: 0644]
arch/arm/include/asm/arch-am33xx/sys_proto.h
arch/arm/include/asm/arch-exynos/cpu.h
arch/arm/include/asm/arch-exynos/dwmmc.h [new file with mode: 0644]
arch/arm/include/asm/arch-kirkwood/cpu.h
arch/arm/include/asm/arch-kirkwood/mpp.h
arch/arm/include/asm/arch-mxs/clock.h
arch/arm/include/asm/arch-mxs/imx-regs.h
arch/arm/include/asm/arch-mxs/regs-clkctrl-mx28.h
arch/arm/include/asm/arch-mxs/regs-power-mx28.h [moved from arch/arm/include/asm/arch-mxs/regs-power.h with 100% similarity]
arch/arm/include/asm/arch-omap3/am35x_def.h
arch/arm/include/asm/arch-omap3/musb.h [moved from board/chromebook-x86/coreboot/coreboot_start16.S with 56% similarity]
arch/arm/include/asm/arch-omap3/sys_proto.h
arch/arm/include/asm/imx-common/mx5_video.h [new file with mode: 0644]
arch/arm/include/asm/omap_gpio.h
arch/arm/include/asm/omap_musb.h [new file with mode: 0644]
arch/arm/lib/Makefile
arch/arm/lib/board.c
arch/arm/lib/crt0.S [new file with mode: 0644]
arch/m68k/include/asm/string.h
arch/m68k/lib/board.c
arch/microblaze/lib/board.c
arch/mips/cpu/mips32/au1x00/au1x00_usb_ohci.c
arch/mips/cpu/mips32/time.c
arch/mips/cpu/mips64/start.S
arch/mips/cpu/mips64/time.c
arch/mips/include/asm/bitops.h
arch/mips/lib/board.c
arch/powerpc/config.mk
arch/powerpc/cpu/mpc5xxx/Makefile
arch/powerpc/cpu/mpc5xxx/spl_boot.c [new file with mode: 0644]
arch/powerpc/cpu/mpc5xxx/start.S
arch/powerpc/cpu/mpc5xxx/u-boot-spl.lds [moved from nand_spl/board/freescale/common.c with 52% similarity]
arch/powerpc/cpu/mpc5xxx/usb_ohci.c
arch/powerpc/cpu/mpc85xx/Makefile
arch/powerpc/cpu/mpc85xx/cmd_errata.c
arch/powerpc/cpu/mpc85xx/cpu.c
arch/powerpc/cpu/mpc85xx/cpu_init.c
arch/powerpc/cpu/mpc85xx/ddr-gen1.c
arch/powerpc/cpu/mpc85xx/ddr-gen2.c
arch/powerpc/cpu/mpc85xx/ddr-gen3.c
arch/powerpc/cpu/mpc85xx/fsl_corenet_serdes.c
arch/powerpc/cpu/mpc85xx/mp.c
arch/powerpc/cpu/mpc85xx/release.S
arch/powerpc/cpu/mpc85xx/spl_minimal.c [moved from arch/powerpc/cpu/mpc85xx/cpu_init_nand.c with 76% similarity]
arch/powerpc/cpu/mpc85xx/start.S
arch/powerpc/cpu/mpc85xx/tlb.c
arch/powerpc/cpu/mpc85xx/u-boot-spl.lds [new file with mode: 0644]
arch/powerpc/cpu/mpc86xx/ddr-8641.c
arch/powerpc/cpu/mpc8xxx/Makefile
arch/powerpc/cpu/mpc8xxx/ddr/ctrl_regs.c
arch/powerpc/cpu/mpc8xxx/ddr/util.c
arch/powerpc/cpu/mpc8xxx/fdt.c
arch/powerpc/cpu/mpc8xxx/law.c [moved from drivers/misc/fsl_law.c with 95% similarity]
arch/powerpc/cpu/ppc4xx/usb_ohci.c
arch/powerpc/include/asm/config_mpc85xx.h
arch/powerpc/include/asm/immap_83xx.h
arch/powerpc/include/asm/immap_85xx.h
arch/powerpc/include/asm/immap_86xx.h
arch/powerpc/include/asm/processor.h
arch/powerpc/include/asm/spl.h [moved from board/chromebook-x86/coreboot/coreboot_pci.c with 71% similarity]
arch/powerpc/include/asm/string.h
arch/powerpc/lib/Makefile
arch/powerpc/lib/board.c
arch/powerpc/lib/bootm.c
arch/powerpc/lib/spl.c [new file with mode: 0644]
arch/sh/include/asm/system.h
arch/sparc/include/asm/string.h
arch/sparc/lib/board.c
arch/x86/cpu/Makefile
arch/x86/cpu/coreboot/Makefile
arch/x86/cpu/coreboot/car.S [moved from arch/x86/cpu/coreboot/coreboot_car.S with 100% similarity]
arch/x86/cpu/coreboot/config.mk [moved from board/BuS/eb_cpu5282/config.mk with 78% similarity]
arch/x86/cpu/coreboot/coreboot.c [moved from board/chromebook-x86/coreboot/coreboot.c with 55% similarity]
arch/x86/cpu/coreboot/pci.c [new file with mode: 0644]
arch/x86/cpu/coreboot/sdram.c
arch/x86/cpu/coreboot/sysinfo.c [deleted file]
arch/x86/cpu/coreboot/tables.c
arch/x86/cpu/coreboot/timestamp.c [new file with mode: 0644]
arch/x86/cpu/cpu.c
arch/x86/cpu/interrupts.c
arch/x86/cpu/start.S
arch/x86/cpu/start16.S
arch/x86/cpu/timer.c [new file with mode: 0644]
arch/x86/cpu/u-boot.lds
arch/x86/dts/coreboot.dtsi [new file with mode: 0644]
arch/x86/dts/skeleton.dtsi [new file with mode: 0644]
arch/x86/include/asm/arch-coreboot/sysinfo.h
arch/x86/include/asm/arch-coreboot/tables.h
arch/x86/include/asm/arch-coreboot/timestamp.h [new file with mode: 0644]
arch/x86/include/asm/bitops.h
arch/x86/include/asm/cache.h
arch/x86/include/asm/control_regs.h [new file with mode: 0644]
arch/x86/include/asm/global_data.h
arch/x86/include/asm/gpio.h [moved from arch/nios2/include/asm/status_led.h with 68% similarity]
arch/x86/include/asm/init_helpers.h
arch/x86/include/asm/io.h
arch/x86/include/asm/msr-index.h [new file with mode: 0644]
arch/x86/include/asm/msr.h [new file with mode: 0644]
arch/x86/include/asm/mtrr.h [new file with mode: 0644]
arch/x86/include/asm/pci.h
arch/x86/include/asm/processor.h
arch/x86/include/asm/types.h
arch/x86/include/asm/u-boot-x86.h
arch/x86/include/asm/u-boot.h
arch/x86/lib/Makefile
arch/x86/lib/board.c
arch/x86/lib/init_helpers.c
arch/x86/lib/init_wrappers.c
arch/x86/lib/pcat_timer.c
arch/x86/lib/physmem.c [new file with mode: 0644]
arch/x86/lib/relocate.c
arch/x86/lib/timer.c
arch/x86/lib/video.c
arch/x86/lib/zimage.c
board/BuS/eb_cpu5282/Makefile
board/BuS/eb_cpu5282/cfm_flash.c [deleted file]
board/BuS/eb_cpu5282/cfm_flash.h [deleted file]
board/BuS/eb_cpu5282/eb_cpu5282.c
board/BuS/eb_cpu5282/flash.c [deleted file]
board/LaCie/net2big_v2/net2big_v2.c
board/LaCie/netspace_v2/netspace_v2.c
board/LaCie/wireless_space/Makefile [new file with mode: 0644]
board/LaCie/wireless_space/kwbimage.cfg [new file with mode: 0644]
board/LaCie/wireless_space/wireless_space.c [new file with mode: 0644]
board/Marvell/db64360/db64360.c
board/Marvell/db64460/db64460.c
board/Marvell/dreamplug/dreamplug.c
board/Marvell/guruplug/guruplug.c
board/Marvell/mv88f6281gtw_ge/mv88f6281gtw_ge.c
board/Marvell/openrd/openrd.c
board/Marvell/rd6281a/rd6281a.c
board/Marvell/sheevaplug/sheevaplug.c
board/Seagate/dockstar/dockstar.c
board/a3m071/Makefile [new file with mode: 0644]
board/a3m071/README [new file with mode: 0644]
board/a3m071/a3m071.c [new file with mode: 0644]
board/a3m071/mt46v16m16-75.h [new file with mode: 0644]
board/buffalo/lsxl/lsxl.c
board/chromebook-x86/coreboot/Makefile
board/chromebook-x86/coreboot/config.mk [new file with mode: 0644]
board/chromebook-x86/dts/alex.dts [new file with mode: 0644]
board/chromebook-x86/dts/link.dts [new file with mode: 0644]
board/cloudengines/pogo_e02/pogo_e02.c
board/corscience/tricorder/tricorder.c
board/d-link/dns325/dns325.c
board/davedenx/qong/qong.c
board/esd/cpci750/cpci750.c
board/esd/pmc440/cmd_pmc440.c
board/exmeritus/hww1u1a/hww1u1a.c
board/freescale/common/Makefile
board/freescale/common/ngpixis.h
board/freescale/corenet_ds/Makefile
board/freescale/corenet_ds/corenet_ds.c
board/freescale/corenet_ds/ddr.c
board/freescale/corenet_ds/eth_superhydra.c [new file with mode: 0644]
board/freescale/corenet_ds/p5040ds_ddr.c [new file with mode: 0644]
board/freescale/mpc8540ads/mpc8540ads.c
board/freescale/mpc8560ads/mpc8560ads.c
board/freescale/mpc8569mds/mpc8569mds.c
board/freescale/mx25pdk/mx25pdk.c
board/freescale/mx31pdk/mx31pdk.c
board/freescale/mx35pdk/mx35pdk.c
board/freescale/mx51evk/Makefile
board/freescale/mx51evk/mx51evk.c
board/freescale/mx51evk/mx51evk_video.c [new file with mode: 0644]
board/freescale/mx53evk/mx53evk.c
board/freescale/mx53loco/Makefile
board/freescale/mx53loco/mx53loco.c
board/freescale/mx53loco/mx53loco_video.c [new file with mode: 0644]
board/freescale/mx6qsabresd/mx6qsabresd.c
board/freescale/p1023rds/p1023rds.c
board/freescale/p1_p2_rdb_pc/Makefile
board/freescale/p1_p2_rdb_pc/ddr.c
board/freescale/p1_p2_rdb_pc/law.c
board/freescale/p1_p2_rdb_pc/p1_p2_rdb_pc.c
board/freescale/p1_p2_rdb_pc/spl_minimal.c [moved from nand_spl/board/freescale/p1_p2_rdb_pc/nand_boot.c with 93% similarity]
board/freescale/p1_p2_rdb_pc/tlb.c
board/freescale/p2020ds/p2020ds.c
board/genesi/mx51_efikamx/efikamx.c
board/gw8260/gw8260.c
board/hale/tt01/tt01.c
board/iomega/iconnect/iconnect.c
board/iomega/iconnect/iconnect.h
board/iomega/iconnect/kwbimage.cfg
board/isee/igep0020/igep0020.c
board/isee/igep0030/igep0030.c
board/karo/tk71/tk71.c
board/keymile/common/common.c
board/keymile/km_arm/km_arm.c
board/keymile/km_arm/kwbimage-memphis.cfg
board/keymile/km_arm/kwbimage.cfg
board/keymile/km_arm/kwbimage_128M16_1.cfg
board/keymile/km_arm/kwbimage_256M8_1.cfg
board/logicpd/am3517evm/am3517evm.c
board/overo/overo.c
board/prodrive/p3mx/p3mx.c
board/raidsonic/ib62x0/ib62x0.c
board/raidsonic/ib62x0/ib62x0.h
board/raidsonic/ib62x0/kwbimage.cfg
board/samsung/goni/goni.c
board/samsung/smdk5250/smdk5250.c
board/samsung/trats/trats.c
board/samsung/universal_c210/universal.c
board/sbc8548/ddr.c
board/socrates/sdram.c
board/technexion/twister/twister.c
board/teejet/mt_ventoux/mt_ventoux.c
board/ti/am335x/board.c
board/ti/am335x/mux.c
board/ti/beagle/beagle.c
board/ti/evm/evm.c
board/timll/devkit8000/devkit8000.c
board/ttcontrol/vision2/vision2.c
board/woodburn/woodburn.c
boards.cfg
common/Makefile
common/bouncebuf.c
common/cmd_bmp.c
common/cmd_bootm.c
common/cmd_gettime.c [new file with mode: 0644]
common/cmd_gpt.c [new file with mode: 0644]
common/cmd_hash.c [new file with mode: 0644]
common/cmd_i2c.c
common/cmd_io.c [new file with mode: 0644]
common/cmd_led.c
common/cmd_mmc.c
common/cmd_nand.c
common/cmd_nvedit.c
common/cmd_read.c [new file with mode: 0644]
common/cmd_sha1sum.c
common/cmd_spl.c
common/cmd_tpm.c
common/cmd_usb.c
common/console.c
common/edid.c [new file with mode: 0644]
common/env_attr.c [new file with mode: 0644]
common/env_callback.c [new file with mode: 0644]
common/env_common.c
common/env_dataflash.c
common/env_eeprom.c
common/env_fat.c
common/env_flags.c [new file with mode: 0644]
common/env_flash.c
common/env_mmc.c
common/env_nand.c
common/env_nvram.c
common/env_onenand.c
common/env_sf.c
common/fdt_support.c
common/hash.c [new file with mode: 0644]
common/image.c
common/lcd.c
common/main.c
common/spl/spl.c
common/stdio.c
common/usb.c
common/usb_kbd.c
disk/part.c
disk/part_efi.c
doc/DocBook/Makefile
doc/README.gpt [new file with mode: 0644]
doc/README.mpc85xx
doc/README.nand
doc/README.silent
doc/kwboot.1
drivers/gpio/Makefile
drivers/gpio/intel_ich6_gpio.c [new file with mode: 0644]
drivers/gpio/omap_gpio.c
drivers/i2c/designware_i2c.c
drivers/i2c/designware_i2c.h
drivers/i2c/mxc_i2c.c
drivers/i2c/mxs_i2c.c
drivers/i2c/omap24xx_i2c.c
drivers/i2c/s3c24x0_i2c.c
drivers/i2c/soft_i2c.c
drivers/misc/Makefile
drivers/misc/cbmem_console.c [new file with mode: 0644]
drivers/misc/pmic_core.c [deleted file]
drivers/mmc/Makefile
drivers/mmc/exynos_dw_mmc.c [new file with mode: 0644]
drivers/mmc/fsl_esdhc.c
drivers/mmc/mmc.c
drivers/mmc/mxsmmc.c
drivers/mmc/sdhci.c
drivers/mmc/tegra_mmc.c
drivers/mtd/nand/Makefile
drivers/mtd/nand/am335x_spl_bch.c [new file with mode: 0644]
drivers/mtd/nand/fsl_elbc_nand.c
drivers/mtd/nand/fsl_elbc_spl.c [new file with mode: 0644]
drivers/mtd/nand/fsl_ifc_nand.c
drivers/mtd/nand/mxs_nand.c
drivers/mtd/nand/nand_base.c
drivers/mtd/nand/nand_util.c
drivers/mtd/nand/omap_gpmc.c
drivers/net/cpsw.c
drivers/net/e1000.c
drivers/net/e1000.h
drivers/net/fm/Makefile
drivers/net/fm/p5040.c [new file with mode: 0644]
drivers/net/phy/marvell.c
drivers/net/phy/mv88e61xx.c
drivers/net/phy/mv88e61xx.h
drivers/net/sh_eth.c
drivers/net/sh_eth.h
drivers/pci/fsl_pci_init.c
drivers/power/Makefile
drivers/power/battery/Makefile [new file with mode: 0644]
drivers/power/battery/bat_trats.c [new file with mode: 0644]
drivers/power/fuel_gauge/Makefile [new file with mode: 0644]
drivers/power/fuel_gauge/fg_max17042.c [new file with mode: 0644]
drivers/power/pmic/Makefile [new file with mode: 0644]
drivers/power/pmic/muic_max8997.c [new file with mode: 0644]
drivers/power/pmic/pmic_max77686.c [moved from drivers/misc/pmic_max77686.c with 82% similarity]
drivers/power/pmic/pmic_max8997.c [new file with mode: 0644]
drivers/power/pmic/pmic_max8998.c [moved from drivers/misc/pmic_max8998.c with 82% similarity]
drivers/power/power_core.c [new file with mode: 0644]
drivers/power/power_dialog.c [moved from drivers/misc/pmic_dialog.c with 81% similarity]
drivers/power/power_fsl.c [moved from drivers/misc/pmic_fsl.c with 83% similarity]
drivers/power/power_i2c.c [moved from drivers/misc/pmic_i2c.c with 62% similarity]
drivers/power/power_spi.c [moved from drivers/misc/pmic_spi.c with 97% similarity]
drivers/power/twl6035.c
drivers/rtc/mc13xxx-rtc.c
drivers/serial/ns16550.c
drivers/serial/serial.c
drivers/serial/serial_ns16550.c
drivers/serial/serial_pl01x.c
drivers/serial/serial_sh.c
drivers/spi/kirkwood_spi.c
drivers/spi/omap3_spi.c
drivers/spi/omap3_spi.h
drivers/usb/gadget/config.c
drivers/usb/gadget/epautoconf.c
drivers/usb/gadget/ether.c
drivers/usb/gadget/f_dfu.c
drivers/usb/gadget/gadget_chips.h
drivers/usb/gadget/s3c_udc_otg.c
drivers/usb/gadget/usbstring.c
drivers/usb/host/ehci-hcd.c
drivers/usb/host/isp116x-hcd.c
drivers/usb/host/ohci-hcd.c
drivers/usb/host/ohci-s3c24xx.c
drivers/usb/host/r8a66597-hcd.c
drivers/usb/host/sl811-hcd.c
drivers/usb/musb-new/Makefile [new file with mode: 0644]
drivers/usb/musb-new/am35x.c [new file with mode: 0644]
drivers/usb/musb-new/linux-compat.h [new file with mode: 0644]
drivers/usb/musb-new/musb_core.c [new file with mode: 0644]
drivers/usb/musb-new/musb_core.h [new file with mode: 0644]
drivers/usb/musb-new/musb_debug.h [new file with mode: 0644]
drivers/usb/musb-new/musb_dma.h [new file with mode: 0644]
drivers/usb/musb-new/musb_dsps.c [new file with mode: 0644]
drivers/usb/musb-new/musb_gadget.c [new file with mode: 0644]
drivers/usb/musb-new/musb_gadget.h [new file with mode: 0644]
drivers/usb/musb-new/musb_gadget_ep0.c [new file with mode: 0644]
drivers/usb/musb-new/musb_host.c [new file with mode: 0644]
drivers/usb/musb-new/musb_host.h [new file with mode: 0644]
drivers/usb/musb-new/musb_io.h [new file with mode: 0644]
drivers/usb/musb-new/musb_regs.h [new file with mode: 0644]
drivers/usb/musb-new/musb_uboot.c [new file with mode: 0644]
drivers/usb/musb-new/omap2430.c [new file with mode: 0644]
drivers/usb/musb-new/omap2430.h [new file with mode: 0644]
drivers/usb/musb-new/usb-compat.h [new file with mode: 0644]
drivers/usb/musb/musb_core.h
drivers/usb/musb/musb_hcd.c
drivers/video/Makefile
drivers/video/atmel_hlcdfb.c
drivers/video/bus_vcxk.c
drivers/video/cfb_console.c
drivers/video/coreboot_fb.c [new file with mode: 0644]
drivers/video/ipu_common.c
fs/cbfs/Makefile
fs/cbfs/cbfs.c
fs/ext4/dev.c
fs/ext4/ext4_common.c
fs/ext4/ext4_journal.c
fs/ext4/ext4fs.c
fs/fs.c
fs/zfs/zfs.c
include/asm-generic/gpio.h
include/atmel_hlcdc.h
include/bouncebuf.h
include/cbfs.h
include/command.h
include/common.h
include/config_cmd_all.h
include/configs/CPCI405.h
include/configs/CPCI4052.h
include/configs/CPCI405AB.h
include/configs/CPCI405DT.h
include/configs/CRAYL1.h
include/configs/GEN860T.h
include/configs/P1010RDB.h
include/configs/P1022DS.h
include/configs/P1023RDS.h
include/configs/P2041RDB.h
include/configs/P3041DS.h
include/configs/P5020DS.h
include/configs/P5040DS.h [new file with mode: 0644]
include/configs/PK1C20.h
include/configs/TOP860.h
include/configs/a3m071.h [new file with mode: 0644]
include/configs/am335x_evm.h
include/configs/am3517_crane.h
include/configs/am3517_evm.h
include/configs/at91sam9x5ek.h
include/configs/cam_enc_4xx.h
include/configs/cm_t35.h
include/configs/coreboot.h
include/configs/corenet_ds.h
include/configs/da850evm.h
include/configs/devkit8000.h
include/configs/dig297.h
include/configs/eNET.h
include/configs/eb_cpu5282.h
include/configs/ep8260.h
include/configs/hawkboard.h
include/configs/ib62x0.h
include/configs/iconnect.h
include/configs/igep00x0.h
include/configs/imx31_litekit.h
include/configs/km/keymile-common.h
include/configs/lsxl.h
include/configs/lwmon5.h
include/configs/m28evk.h
include/configs/mcx.h
include/configs/mv-common.h
include/configs/mx25pdk.h
include/configs/mx28evk.h
include/configs/mx31ads.h
include/configs/mx31pdk.h
include/configs/mx35pdk.h
include/configs/mx51_efikamx.h
include/configs/mx51evk.h
include/configs/mx53evk.h
include/configs/mx53loco.h
include/configs/mx6qarm2.h
include/configs/mx6qsabre_common.h
include/configs/mx6qsabreauto.h
include/configs/mx6qsabrelite.h
include/configs/mx6qsabresd.h
include/configs/nios2-generic.h
include/configs/omap3_beagle.h
include/configs/omap3_evm.h
include/configs/omap3_evm_quick_nand.h
include/configs/omap3_mvblx.h
include/configs/omap3_overo.h
include/configs/omap3_pandora.h
include/configs/omap3_sdp3430.h
include/configs/omap3_zoom1.h
include/configs/omap3_zoom2.h
include/configs/p1_p2_rdb_pc.h
include/configs/qong.h
include/configs/s5p_goni.h
include/configs/s5pc210_universal.h
include/configs/sc_sps_1.h
include/configs/seaboard.h
include/configs/sequoia.h
include/configs/smdk5250.h
include/configs/socfpga_cyclone5.h
include/configs/tam3517-common.h
include/configs/tegra-common-post.h
include/configs/tegra20-common.h
include/configs/trats.h
include/configs/tricorder.h
include/configs/tt01.h
include/configs/utx8245.h
include/configs/vct.h
include/configs/ventana.h
include/configs/vision2.h
include/configs/wireless_space.h [new file with mode: 0644]
include/configs/woodburn_common.h
include/edid.h [new file with mode: 0644]
include/env_attr.h [new file with mode: 0644]
include/env_callback.h [new file with mode: 0644]
include/env_default.h
include/env_flags.h [new file with mode: 0644]
include/environment.h
include/exports.h
include/fdtdec.h
include/g_dnl.h
include/hash.h [new file with mode: 0644]
include/image.h
include/lcd.h
include/linux/byteorder/swab.h
include/linux/linux_string.h [new file with mode: 0644]
include/linux/mtd/nand.h
include/linux/string.h
include/linux/usb/ch9.h
include/linux/usb/musb.h [new file with mode: 0644]
include/nand.h
include/netdev.h
include/nios2.h
include/part.h
include/part_efi.h [moved from disk/part_efi.h with 66% similarity]
include/pci.h
include/physmem.h [new file with mode: 0644]
include/power/battery.h [moved from drivers/misc/pmic_max8997.c with 71% similarity]
include/power/fg_battery_cell_params.h [new file with mode: 0644]
include/power/max17042_fg.h [new file with mode: 0644]
include/power/max77686_pmic.h [moved from include/max77686_pmic.h with 100% similarity]
include/power/max8997_muic.h [new file with mode: 0644]
include/power/max8997_pmic.h [moved from include/max8997_pmic.h with 88% similarity]
include/power/max8998_pmic.h [moved from include/max8998_pmic.h with 100% similarity]
include/power/pmic.h [moved from include/pmic.h with 58% similarity]
include/power/power_chrg.h [new file with mode: 0644]
include/sdhci.h
include/search.h
include/sha1.h
include/sha256.h
include/status_led.h
include/stdio_dev.h
include/twl6035.h
include/usb.h
include/usb/s3c_udc.h
include/usb_defs.h
include/video.h
lib/Makefile
lib/asm-offsets.c
lib/fdtdec.c
lib/hashtable.c
lib/linux_string.c [new file with mode: 0644]
lib/lzma/LzmaDec.c
lib/lzma/LzmaDec.h
lib/lzma/Types.h
lib/lzma/history.txt
lib/lzma/lzma.txt
lib/physmem.c [new file with mode: 0644]
lib/sha1.c
lib/sha256.c
lib/string.c
lib/vsprintf.c
nand_spl/board/freescale/mpc8536ds/Makefile
nand_spl/board/freescale/mpc8569mds/Makefile
nand_spl/board/freescale/mpc8572ds/Makefile
nand_spl/board/freescale/mx31pdk/Makefile
nand_spl/board/freescale/p1010rdb/Makefile
nand_spl/board/freescale/p1010rdb/nand_boot.c
nand_spl/board/freescale/p1023rds/Makefile
nand_spl/board/freescale/p1023rds/nand_boot.c
nand_spl/board/freescale/p1_p2_rdb/Makefile
nand_spl/board/freescale/p1_p2_rdb_pc/Makefile [deleted file]
nand_spl/board/karo/tx25/Makefile
net/link_local.c
net/net.c
net/tftp.c
spl/Makefile
tools/env/Makefile
tools/env/fw_env.c
tools/fit_image.c
tools/imximage.c
tools/patman/series.py

index 1ac43f2..a163728 100644 (file)
 /u-boot.sha1
 /u-boot.dis
 /u-boot.lds
-/u-boot.lst
 /u-boot.ubl
 /u-boot.ais
 /u-boot.dtb
 /u-boot.sb
 /u-boot.geany
+/include/u-boot.lst
 
 #
 # Generated files
index e34d9f3..36b47b7 100644 (file)
@@ -7,6 +7,10 @@
 # and Cc: the <u-boot@lists.denx.de> mailing list.                     #
 #                                                                      #
 # Note: lists sorted by Maintainer Name                                        #
+# Note: These are the maintainers for specific *boards*.  The          #
+#      custodians for general architectures and subsystems can         #
+#      be found here -- http://www.denx.de/wiki/U-Boot/Custodians      #
+#                                                                      #
 #########################################################################
 
 
@@ -388,6 +392,8 @@ Ricardo Ribalda <ricardo.ribalda@uam.es>
 
 Stefan Roese <sr@denx.de>
 
+       a3m071          MPC5200
+
        P3M7448         MPC7448
 
        uc100           MPC857
@@ -800,7 +806,7 @@ Veli-Pekka Peltola <veli-pekka.peltola@bluegiga.com>
 
        apx4devkit      i.MX28
 
-Luka Perkov <uboot@lukaperkov.net>
+Luka Perkov <luka@openwrt.org>
 
        ib62x0          ARM926EJS
        iconnect        ARM926EJS
diff --git a/MAKEALL b/MAKEALL
index 84a5c92..5b06c54 100755 (executable)
--- a/MAKEALL
+++ b/MAKEALL
@@ -20,6 +20,8 @@ usage()
          -m,        --maintainers     List all targets and maintainer email
          -M,        --mails           List all targets and all affilated emails
          -C,        --check           Enable build checking
+         -n,        --continue        Continue (skip boards already built)
+         -r,        --rebuild-errors  Rebuild any boards that errored
          -h,        --help            This help output
 
        Selections by these options are logically ANDed; if the same option
@@ -52,8 +54,8 @@ usage()
        exit ${ret}
 }
 
-SHORT_OPTS="ha:c:v:s:lmMC"
-LONG_OPTS="help,arch:,cpu:,vendor:,soc:,list,maintainers,mails,check"
+SHORT_OPTS="ha:c:v:s:lmMCnr"
+LONG_OPTS="help,arch:,cpu:,vendor:,soc:,list,maintainers,mails,check,continue,rebuild-errors"
 
 # Option processing based on util-linux-2.13/getopt-parse.bash
 
@@ -73,6 +75,8 @@ SELECTED=''
 ONLY_LIST=''
 PRINT_MAINTS=''
 MAINTAINERS_ONLY=''
+CONTINUE=''
+REBUILD_ERRORS=''
 
 while true ; do
        case "$1" in
@@ -115,6 +119,12 @@ while true ; do
        -C|--check)
                CHECK='C=1'
                shift ;;
+       -n|--continue)
+               CONTINUE='y'
+               shift ;;
+       -r|--rebuild-errors)
+               REBUILD_ERRORS='y'
+               shift ;;
        -l|--list)
                ONLY_LIST='y'
                shift ;;
@@ -198,7 +208,9 @@ fi
 OUTPUT_PREFIX="${BUILD_DIR}"
 
 [ -d ${LOG_DIR} ] || mkdir "${LOG_DIR}" || exit 1
-find "${LOG_DIR}/" -type f -exec rm -f {} +
+if [ "$CONTINUE" != 'y' -a "$REBUILD_ERRORS" != 'y' ] ; then
+       find "${LOG_DIR}/" -type f -exec rm -f {} +
+fi
 
 LIST=""
 
@@ -208,6 +220,7 @@ ERR_LIST=""
 WRN_CNT=0
 WRN_LIST=""
 TOTAL_CNT=0
+SKIP_CNT=0
 CURRENT_CNT=0
 OLDEST_IDX=1
 RC=0
@@ -380,6 +393,12 @@ LIST_pxa="$(boards_by_cpu pxa)"
 
 LIST_ixp="$(boards_by_cpu ixp)"
 
+#########################################################################
+## SPEAr Systems
+#########################################################################
+
+LIST_spear="$(boards_by_soc spear)"
+
 #########################################################################
 ## ARM groups
 #########################################################################
@@ -610,6 +629,13 @@ list_target() {
 donep="${LOG_DIR}/._done_"
 skipp="${LOG_DIR}/._skip_"
 
+build_target_killed() {
+       echo "Aborted $target build."
+       # Remove the logs for this board since it was aborted
+       rm -f ${LOG_DIR}/$target.MAKELOG ${LOG_DIR}/$target.ERR
+       exit
+}
+
 build_target() {
        target=$1
        build_idx=$2
@@ -622,6 +648,7 @@ build_target() {
        if [ $BUILD_MANY == 1 ] ; then
                output_dir="${OUTPUT_PREFIX}/${target}"
                mkdir -p "${output_dir}"
+               trap build_target_killed TERM
        else
                output_dir="${OUTPUT_PREFIX}"
        fi
@@ -640,6 +667,8 @@ build_target() {
        fi
 
        if [ $BUILD_MANY == 1 ] ; then
+               trap - TERM
+
                ${MAKE} -s tidy
 
                if [ -s ${LOG_DIR}/${target}.ERR ] ; then
@@ -718,10 +747,20 @@ build_targets() {
                        : $((CURRENT_CNT += 1))
                        rm -f "${donep}${TOTAL_CNT}"
                        rm -f "${skipp}${TOTAL_CNT}"
-                       if [ $BUILD_MANY == 1 ] ; then
-                               build_target ${t} ${TOTAL_CNT} &
+                       if [ "$CONTINUE" = 'y' -a -e ${LOG_DIR}/$t.MAKELOG ] ; then
+                               : $((SKIP_CNT += 1))
+                               touch "${donep}${TOTAL_CNT}"
+                       elif [ "$REBUILD_ERRORS" = 'y' -a ! -e ${LOG_DIR}/$t.ERR ] ; then
+                               : $((SKIP_CNT += 1))
+                               touch "${donep}${TOTAL_CNT}"
                        else
-                               build_target ${t} ${TOTAL_CNT}
+                               if [ $BUILD_MANY == 1 ] ; then
+                                       build_target ${t} ${TOTAL_CNT} &
+                               else
+                                       CUR_TGT="${t}"
+                                       build_target ${t} ${TOTAL_CNT}
+                                       CUR_TGT=''
+                               fi
                        fi
                fi
 
@@ -745,7 +784,11 @@ build_targets() {
 #-----------------------------------------------------------------------
 
 kill_children() {
-       kill -- "-$1"
+       local pgid=`ps -p $$ --no-headers -o "%r" | tr -d ' '`
+       local children=`pgrep -g $pgid | grep -v $$ | grep -v $pgid`
+
+       kill $children 2> /dev/null
+       wait $children 2> /dev/null
 
        exit
 }
@@ -753,6 +796,9 @@ kill_children() {
 print_stats() {
        if [ "$ONLY_LIST" == 'y' ] ; then return ; fi
 
+       # Only count boards that completed
+       : $((TOTAL_CNT = `find ${skipp}* 2> /dev/null | wc -l`))
+
        rm -f ${donep}* ${skipp}*
 
        if [ $BUILD_MANY == 1 ] && [ -e "${OUTPUT_PREFIX}/ERR" ] ; then
@@ -762,10 +808,17 @@ print_stats() {
                WRN_LIST=`grep -riwL error ${OUTPUT_PREFIX}/ERR/`
                WRN_LIST=`for f in $WRN_LIST ; do echo -n " $(basename $f)" ; done`
                WRN_CNT=`echo $WRN_LIST | wc -w | awk '{print $1}'`
+       else
+               # Remove the logs for any board that was interrupted
+               rm -f ${LOG_DIR}/${CUR_TGT}.MAKELOG ${LOG_DIR}/${CUR_TGT}.ERR
        fi
 
+       : $((TOTAL_CNT -= ${SKIP_CNT}))
        echo ""
        echo "--------------------- SUMMARY ----------------------------"
+       if [ "$CONTINUE" = 'y' -o "$REBUILD_ERRORS" = 'y' ] ; then
+               echo "Boards skipped: ${SKIP_CNT}"
+       fi
        echo "Boards compiled: ${TOTAL_CNT}"
        if [ ${ERR_CNT} -gt 0 ] ; then
                echo "Boards with errors: ${ERR_CNT} (${ERR_LIST} )"
@@ -776,7 +829,7 @@ print_stats() {
        echo "----------------------------------------------------------"
 
        if [ $BUILD_MANY == 1 ] ; then
-               kill_children $$ &
+               kill_children
        fi
 
        exit $RC
index 8a04727..a7b6cd1 100644 (file)
--- a/Makefile
+++ b/Makefile
@@ -24,7 +24,7 @@
 VERSION = 2013
 PATCHLEVEL = 01
 SUBLEVEL =
-EXTRAVERSION = -rc1
+EXTRAVERSION = -rc2
 ifneq "$(SUBLEVEL)" ""
 U_BOOT_VERSION = $(VERSION).$(PATCHLEVEL).$(SUBLEVEL)$(EXTRAVERSION)
 else
@@ -231,8 +231,8 @@ endif
 
 OBJS  = $(CPUDIR)/start.o
 ifeq ($(CPU),x86)
-OBJS += $(CPUDIR)/start16.o
-OBJS += $(CPUDIR)/resetvec.o
+RESET_OBJS-$(CONFIG_X86_NO_RESET_VECTOR) += $(CPUDIR)/start16.o
+RESET_OBJS-$(CONFIG_X86_NO_RESET_VECTOR) += $(CPUDIR)/resetvec.o
 endif
 ifeq ($(CPU),ppc4xx)
 OBJS += $(CPUDIR)/resetvec.o
@@ -241,7 +241,7 @@ ifeq ($(CPU),mpc85xx)
 OBJS += $(CPUDIR)/resetvec.o
 endif
 
-OBJS := $(addprefix $(obj),$(OBJS))
+OBJS := $(addprefix $(obj),$(OBJS) $(RESET_OBJS-))
 
 HAVE_VENDOR_COMMON_LIB = $(if $(wildcard board/$(VENDOR)/common/Makefile),y,n)
 
@@ -293,7 +293,10 @@ LIBS-y += drivers/net/libnet.o
 LIBS-y += drivers/net/phy/libphy.o
 LIBS-y += drivers/pci/libpci.o
 LIBS-y += drivers/pcmcia/libpcmcia.o
-LIBS-y += drivers/power/libpower.o
+LIBS-y += drivers/power/libpower.o \
+       drivers/power/fuel_gauge/libfuel_gauge.o \
+       drivers/power/pmic/libpmic.o \
+       drivers/power/battery/libbattery.o
 LIBS-y += drivers/spi/libspi.o
 LIBS-y += drivers/dfu/libdfu.o
 ifeq ($(CPU),mpc83xx)
@@ -320,6 +323,7 @@ LIBS-y += drivers/usb/eth/libusb_eth.o
 LIBS-y += drivers/usb/gadget/libusb_gadget.o
 LIBS-y += drivers/usb/host/libusb_host.o
 LIBS-y += drivers/usb/musb/libusb_musb.o
+LIBS-y += drivers/usb/musb-new/libusb_musb-new.o
 LIBS-y += drivers/usb/phy/libusb_phy.o
 LIBS-y += drivers/usb/ulpi/libusb_ulpi.o
 LIBS-y += drivers/video/libvideo.o
@@ -387,12 +391,12 @@ __LIBS := $(subst $(obj),,$(LIBS)) $(subst $(obj),,$(LIBBOARD))
 ifneq ($(CONFIG_BOARD_SIZE_LIMIT),)
 BOARD_SIZE_CHECK = \
        @actual=`wc -c $@ | awk '{print $$1}'`; \
-       limit=$(CONFIG_BOARD_SIZE_LIMIT); \
+       limit=`printf "%d" $(CONFIG_BOARD_SIZE_LIMIT)`; \
        if test $$actual -gt $$limit; then \
-               echo "$@ exceeds file size limit:"; \
-               echo "  limit:  $$limit bytes"; \
-               echo "  actual: $$actual bytes"; \
-               echo "  excess: $$((actual - limit)) bytes"; \
+               echo "$@ exceeds file size limit:" >&2 ; \
+               echo "  limit:  $$limit bytes" >&2 ; \
+               echo "  actual: $$actual bytes" >&2 ; \
+               echo "  excess: $$((actual - limit)) bytes" >&2; \
                exit 1; \
        fi
 else
@@ -405,6 +409,7 @@ ALL-y += $(obj)u-boot.srec $(obj)u-boot.bin $(obj)System.map
 ALL-$(CONFIG_NAND_U_BOOT) += $(obj)u-boot-nand.bin
 ALL-$(CONFIG_ONENAND_U_BOOT) += $(obj)u-boot-onenand.bin
 ALL-$(CONFIG_SPL) += $(obj)spl/u-boot-spl.bin
+ALL-$(CONFIG_SPL) += $(obj)$(subst ",,$(CONFIG_SPL_TARGET))
 ALL-$(CONFIG_OF_SEPARATE) += $(obj)u-boot.dtb $(obj)u-boot-dtb.bin
 
 # enable combined SPL/u-boot/dtb rules for tegra
@@ -446,9 +451,18 @@ $(obj)u-boot.ldr.hex:      $(obj)u-boot.ldr
 $(obj)u-boot.ldr.srec: $(obj)u-boot.ldr
                $(OBJCOPY) ${OBJCFLAGS} -O srec $< $@ -I binary
 
+#
+# U-Boot entry point, needed for booting of full-blown U-Boot
+# from the SPL U-Boot version.
+#
+ifndef CONFIG_SYS_UBOOT_START
+CONFIG_SYS_UBOOT_START := 0
+endif
+
 $(obj)u-boot.img:      $(obj)u-boot.bin
                $(obj)tools/mkimage -A $(ARCH) -T firmware -C none \
-               -O u-boot -a $(CONFIG_SYS_TEXT_BASE) -e 0 \
+               -O u-boot -a $(CONFIG_SYS_TEXT_BASE) \
+               -e $(CONFIG_SYS_UBOOT_START) \
                -n $(shell sed -n -e 's/.*U_BOOT_VERSION//p' $(VERSION_FILE) | \
                        sed -e 's/"[     ]*$$/ for $(BOARD) board"/') \
                -d $< $@
@@ -472,14 +486,15 @@ $(obj)u-boot.sha1:        $(obj)u-boot.bin
 $(obj)u-boot.dis:      $(obj)u-boot
                $(OBJDUMP) -d $< > $@
 
-$(obj)u-boot.ubl:       $(obj)spl/u-boot-spl.bin $(obj)u-boot.bin
+$(obj)u-boot-with-spl.bin: $(obj)spl/u-boot-spl.bin $(obj)u-boot.bin
                $(OBJCOPY) ${OBJCFLAGS} --pad-to=$(PAD_TO) -O binary $(obj)spl/u-boot-spl $(obj)spl/u-boot-spl-pad.bin
-               cat $(obj)spl/u-boot-spl-pad.bin $(obj)u-boot.bin > $(obj)u-boot-ubl.bin
-               $(obj)tools/mkimage -n $(UBL_CONFIG) -T ublimage \
-               -e $(CONFIG_SYS_TEXT_BASE) -d $(obj)u-boot-ubl.bin $(obj)u-boot.ubl
-               rm $(obj)u-boot-ubl.bin
+               cat $(obj)spl/u-boot-spl-pad.bin $(obj)u-boot.bin > $@
                rm $(obj)spl/u-boot-spl-pad.bin
 
+$(obj)u-boot.ubl:       $(obj)u-boot-with-spl.bin
+               $(obj)tools/mkimage -n $(UBL_CONFIG) -T ublimage \
+               -e $(CONFIG_SYS_TEXT_BASE) -d $< $(obj)u-boot.ubl
+
 $(obj)u-boot.ais:       $(obj)spl/u-boot-spl.bin $(obj)u-boot.img
                $(obj)tools/mkimage -s -n $(if $(CONFIG_AIS_CONFIG_FILE),$(CONFIG_AIS_CONFIG_FILE),"/dev/null") \
                        -T aisimage \
@@ -496,7 +511,7 @@ $(obj)u-boot.ais:       $(obj)spl/u-boot-spl.bin $(obj)u-boot.img
 ELFTOSB_TARGET-$(CONFIG_MX28) = imx28
 
 $(obj)u-boot.sb:       $(obj)u-boot.bin $(obj)spl/u-boot-spl.bin
-               elftosb -zdf $(ELFTOSB_TARGET-y) -c $(TOPDIR)/$(CPUDIR)/$(SOC)/u-boot-$(ELFTOSB_TARGET-y).bd \
+               elftosb -zf $(ELFTOSB_TARGET-y) -c $(TOPDIR)/$(CPUDIR)/$(SOC)/u-boot-$(ELFTOSB_TARGET-y).bd \
                        -o $(obj)u-boot.sb
 
 # On x600 (SPEAr600) U-Boot is appended to U-Boot SPL.
@@ -530,6 +545,9 @@ $(obj)u-boot-$(nodtb)-tegra.bin: $(obj)spl/u-boot-spl.bin $(obj)u-boot.bin $(dtb
                rm $(obj)spl/u-boot-spl-pad.bin
 endif
 
+$(obj)u-boot-img.bin: $(obj)spl/u-boot-spl.bin $(obj)u-boot.img
+               cat $(obj)spl/u-boot-spl.bin $(obj)u-boot.img > $@
+
 ifeq ($(CONFIG_SANDBOX),y)
 GEN_UBOOT = \
                cd $(LNDIR) && $(CC) $(SYMS) -T $(obj)u-boot.lds \
@@ -639,6 +657,16 @@ checkthumb:
                echo '*** Your board is configured for THUMB mode.'; \
                false; \
        fi
+
+# GCC 3.x is reported to have problems generating the type of relocation
+# that U-Boot wants.
+# See http://lists.denx.de/pipermail/u-boot/2012-September/135156.html
+checkgcc4:
+       @if test $(call cc-version) -lt 0400; then \
+               echo -n '*** Your GCC is too old, please upgrade to GCC 4.x or newer'; \
+               false; \
+       fi
+
 #
 # Auto-generate the autoconf.mk file (which is included by all makefiles)
 #
@@ -812,7 +840,7 @@ clean:
        @rm -f $(obj)include/generated/asm-offsets.h
        @rm -f $(obj)$(CPUDIR)/$(SOC)/asm-offsets.s
        @rm -f $(TIMESTAMP_FILE) $(VERSION_FILE)
-       @$(MAKE) -C doc/DocBook/ cleandocs
+       @$(MAKE) -s -C doc/DocBook/ cleandocs
        @find $(OBJTREE) -type f \
                \( -name 'core' -o -name '*.bak' -o -name '*~' -o -name '*.su' \
                -o -name '*.o'  -o -name '*.a' -o -name '*.exe' \) -print \
diff --git a/README b/README
index 037513a..653ef6a 100644 (file)
--- a/README
+++ b/README
@@ -54,6 +54,11 @@ In case of problems see the CHANGELOG and CREDITS files to find out
 who contributed the specific port. The MAINTAINERS file lists board
 maintainers.
 
+Note: There is no CHANGELOG file in the actual U-Boot source tree;
+it can be created dynamically from the Git log using:
+
+       make CHANGELOG
+
 
 Where to get help:
 ==================
@@ -810,6 +815,8 @@ The following options need to be configured:
                CONFIG_CMD_EDITENV        edit env variable
                CONFIG_CMD_EEPROM       * EEPROM read/write support
                CONFIG_CMD_ELF          * bootelf, bootvx
+               CONFIG_CMD_ENV_CALLBACK * display details about env callbacks
+               CONFIG_CMD_ENV_FLAGS    * display details about env flags
                CONFIG_CMD_EXPORTENV    * export the environment
                CONFIG_CMD_EXT2         * ext2 command support
                CONFIG_CMD_EXT4         * ext4 command support
@@ -819,8 +826,10 @@ The following options need to be configured:
                CONFIG_CMD_FDOS         * Dos diskette Support
                CONFIG_CMD_FLASH          flinfo, erase, protect
                CONFIG_CMD_FPGA           FPGA device initialization support
+               CONFIG_CMD_GETTIME      * Get time since boot
                CONFIG_CMD_GO           * the 'go' command (exec code)
                CONFIG_CMD_GREPENV      * search environment
+               CONFIG_CMD_HASH         * calculate hash / digest
                CONFIG_CMD_HWFLOW       * RTS/CTS hw flow control
                CONFIG_CMD_I2C          * I2C serial bus support
                CONFIG_CMD_IDE          * IDE harddisk support
@@ -855,6 +864,7 @@ The following options need to be configured:
                CONFIG_CMD_PING         * send ICMP ECHO_REQUEST to network
                                          host
                CONFIG_CMD_PORTIO       * Port I/O
+               CONFIG_CMD_READ         * Read raw data from partition
                CONFIG_CMD_REGINFO      * Register dump
                CONFIG_CMD_RUN            run command in env variable
                CONFIG_CMD_SAVES        * save S record dump
@@ -1409,6 +1419,13 @@ CBFS (Coreboot Filesystem) support
                boot.  See the documentation file README.video for a
                description of this variable.
 
+               CONFIG_VIDEO_VGA
+
+               Enable the VGA video / BIOS for x86. The alternative if you
+               are using coreboot is to use the coreboot frame buffer
+               driver.
+
+
 - Keyboard Support:
                CONFIG_KEYBOARD
 
@@ -1469,7 +1486,6 @@ CBFS (Coreboot Filesystem) support
                Normally display is black on white background; define
                CONFIG_SYS_WHITE_ON_BLACK to get it inverted.
 
-
                CONFIG_LCD_ALIGNMENT
 
                Normally the LCD is page-aligned (tyically 4KB). If this is
@@ -1485,6 +1501,15 @@ CBFS (Coreboot Filesystem) support
                the console jump but can help speed up operation when scrolling
                is slow.
 
+               CONFIG_LCD_BMP_RLE8
+
+               Support drawing of RLE8-compressed bitmaps on the LCD.
+
+               CONFIG_I2C_EDID
+
+               Enables an 'i2c edid' command which can read EDID
+               information over I2C from an attached LCD display.
+
 - Splash Screen Support: CONFIG_SPLASH_SCREEN
 
                If this option is set, the environment is checked for
@@ -2178,6 +2203,11 @@ CBFS (Coreboot Filesystem) support
                serial# is unaffected by this, i. e. it remains
                read-only.]
 
+               The same can be accomplished in a more flexible way
+               for any variable by configuring the type of access
+               to allow for those variables in the ".flags" variable
+               or define CONFIG_ENV_FLAGS_LIST_STATIC.
+
 - Protected RAM:
                CONFIG_PRAM
 
@@ -2211,6 +2241,14 @@ CBFS (Coreboot Filesystem) support
                        HERMES, IP860, RPXlite, LWMON,
                        FLAGADM, TQM8260
 
+- Access to physical memory region (> 4GB)
+               Some basic support is provided for operations on memory not
+               normally accessible to U-Boot - e.g. some architectures
+               support access to more than 4GB of memory on 32-bit
+               machines using physical address extension or similar.
+               Define CONFIG_PHYSMEM to access this basic support, which
+               currently only supports clearing the memory.
+
 - Error Recovery:
                CONFIG_PANIC_HANG
 
@@ -2400,6 +2438,23 @@ CBFS (Coreboot Filesystem) support
                A better solution is to properly configure the firewall,
                but sometimes that is not allowed.
 
+- Hashing support:
+               CONFIG_CMD_HASH
+
+               This enables a generic 'hash' command which can produce
+               hashes / digests from a few algorithms (e.g. SHA1, SHA256).
+
+               CONFIG_HASH_VERIFY
+
+               Enable the hash verify command (hash -v). This adds to code
+               size a little.
+
+               CONFIG_SHA1 - support SHA1 hashing
+               CONFIG_SHA256 - support SHA256 hashing
+
+               Note: There is also a sha1sum command, which should perhaps
+               be deprecated in favour of 'hash sha1'.
+
 - Show boot progress:
                CONFIG_SHOW_BOOT_PROGRESS
 
@@ -2613,6 +2668,17 @@ FIT uImage format:
  -150  common/cmd_nand.c       Incorrect FIT image format
   151  common/cmd_nand.c       FIT image format OK
 
+- FIT image support:
+               CONFIG_FIT
+               Enable support for the FIT uImage format.
+
+               CONFIG_FIT_BEST_MATCH
+               When no configuration is explicitly selected, default to the
+               one whose fdt's compatibility field best matches that of
+               U-Boot itself. A match is considered "best" if it matches the
+               most specific compatibility entry of U-Boot's fdt's root node.
+               The order of entries in the configuration's fdt is ignored.
+
 - Standalone program support:
                CONFIG_STANDALONE_LOAD_ADDR
 
@@ -2664,6 +2730,10 @@ FIT uImage format:
                CONFIG_SPL_TEXT_BASE
                TEXT_BASE for linking the SPL binary.
 
+               CONFIG_SPL_RELOC_TEXT_BASE
+               Address to relocate to.  If unspecified, this is equal to
+               CONFIG_SPL_TEXT_BASE (i.e. no relocation is done).
+
                CONFIG_SPL_BSS_START_ADDR
                Link address for the BSS within the SPL binary.
 
@@ -2673,6 +2743,11 @@ FIT uImage format:
                CONFIG_SPL_STACK
                Adress of the start of the stack SPL will use
 
+               CONFIG_SPL_RELOC_STACK
+               Adress of the start of the stack SPL will use after
+               relocation.  If unspecified, this is equal to
+               CONFIG_SPL_STACK.
+
                CONFIG_SYS_SPL_MALLOC_START
                Starting address of the malloc pool used in SPL.
 
@@ -2688,6 +2763,9 @@ FIT uImage format:
                For ARM, enable an optional function to print more information
                about the running system.
 
+               CONFIG_SPL_INIT_MINIMAL
+               Arch init code should be built for a very small image
+
                CONFIG_SPL_LIBCOMMON_SUPPORT
                Support for common/libcommon.o in SPL binary
 
@@ -2715,8 +2793,19 @@ FIT uImage format:
                CONFIG_SPL_FAT_LOAD_PAYLOAD_NAME
                Filename to read to load U-Boot when reading from FAT
 
+               CONFIG_SPL_NAND_BASE
+               Include nand_base.c in the SPL.  Requires
+               CONFIG_SPL_NAND_DRIVERS.
+
+               CONFIG_SPL_NAND_DRIVERS
+               SPL uses normal NAND drivers, not minimal drivers.
+
+               CONFIG_SPL_NAND_ECC
+               Include standard software ECC in the SPL
+
                CONFIG_SPL_NAND_SIMPLE
-               Support for drivers/mtd/nand/libnand.o in SPL binary
+               Support for NAND boot using simple NAND drivers that
+               expose the cmd_ctrl() interface.
 
                CONFIG_SYS_NAND_5_ADDR_CYCLE, CONFIG_SYS_NAND_PAGE_COUNT,
                CONFIG_SYS_NAND_PAGE_SIZE, CONFIG_SYS_NAND_OOBSIZE,
@@ -2724,15 +2813,19 @@ FIT uImage format:
                CONFIG_SYS_NAND_ECCPOS, CONFIG_SYS_NAND_ECCSIZE,
                CONFIG_SYS_NAND_ECCBYTES
                Defines the size and behavior of the NAND that SPL uses
-               to read U-Boot with CONFIG_SPL_NAND_SIMPLE
+               to read U-Boot
 
                CONFIG_SYS_NAND_U_BOOT_OFFS
-               Location in NAND for CONFIG_SPL_NAND_SIMPLE to read U-Boot
-               from.
+               Location in NAND to read U-Boot from
+
+               CONFIG_SYS_NAND_U_BOOT_DST
+               Location in memory to load U-Boot to
+
+               CONFIG_SYS_NAND_U_BOOT_SIZE
+               Size of image to load
 
                CONFIG_SYS_NAND_U_BOOT_START
-               Location in memory for CONFIG_SPL_NAND_SIMPLE to load U-Boot
-               to.
+               Entry point in loaded image to jump to
 
                CONFIG_SYS_NAND_HW_ECC_OOBFIRST
                Define this if you need to first read the OOB and then the
@@ -2757,6 +2850,11 @@ FIT uImage format:
                CONFIG_SPL_LIBGENERIC_SUPPORT
                Support for lib/libgeneric.o in SPL binary
 
+               CONFIG_SPL_TARGET
+               Final target image containing SPL and payload.  Some SPLs
+               use an arch-specific makefile fragment instead, for
+               example if more than one image needs to be produced.
+
 Modem Support:
 --------------
 
@@ -2891,9 +2989,6 @@ Configuration Settings:
                non page size aligned address and this could cause major
                problems.
 
-- CONFIG_SYS_TFTP_LOADADDR:
-               Default load address for network file downloads
-
 - CONFIG_SYS_LOADS_BAUD_CHANGE:
                Enable temporary baudrate change while serial download
 
@@ -3035,6 +3130,49 @@ Configuration Settings:
        cases. This setting can be used to tune behaviour; see
        lib/hashtable.c for details.
 
+- CONFIG_ENV_FLAGS_LIST_DEFAULT
+- CONFIG_ENV_FLAGS_LIST_STATIC
+       Enable validation of the values given to enviroment variables when
+       calling env set.  Variables can be restricted to only decimal,
+       hexadecimal, or boolean.  If CONFIG_CMD_NET is also defined,
+       the variables can also be restricted to IP address or MAC address.
+
+       The format of the list is:
+               type_attribute = [s|d|x|b|i|m]
+               access_atribute = [a|r|o|c]
+               attributes = type_attribute[access_atribute]
+               entry = variable_name[:attributes]
+               list = entry[,list]
+
+       The type attributes are:
+               s - String (default)
+               d - Decimal
+               x - Hexadecimal
+               b - Boolean ([1yYtT|0nNfF])
+               i - IP address
+               m - MAC address
+
+       The access attributes are:
+               a - Any (default)
+               r - Read-only
+               o - Write-once
+               c - Change-default
+
+       - CONFIG_ENV_FLAGS_LIST_DEFAULT
+               Define this to a list (string) to define the ".flags"
+               envirnoment variable in the default or embedded environment.
+
+       - CONFIG_ENV_FLAGS_LIST_STATIC
+               Define this to a list (string) to define validation that
+               should be done if an entry is not found in the ".flags"
+               environment variable.  To override a setting in the static
+               list, simply add an entry for the same variable name to the
+               ".flags" variable.
+
+- CONFIG_ENV_ACCESS_IGNORE_FORCE
+       If defined, don't allow the -f switch to env set override variable
+       access flags.
+
 The following definitions that deal with the placement and management
 of environment data (variable area); in general, we support the
 following configurations:
@@ -3632,6 +3770,16 @@ Low Level (hardware related) configuration options:
                be used if available. These functions may be faster under some
                conditions but may increase the binary size.
 
+- CONFIG_X86_NO_RESET_VECTOR
+               If defined, the x86 reset vector code is excluded. You will need
+               to do this when U-Boot is running from Coreboot.
+
+- CONFIG_X86_NO_REAL_MODE
+               If defined, x86 real mode code is omitted. This assumes a
+               32-bit environment where such code is not needed. You will
+               need to do this when U-Boot is running from Coreboot.
+
+
 Freescale QE/FMAN Firmware Support:
 -----------------------------------
 
@@ -3859,6 +4007,7 @@ saveenv - save environment variables to persistent storage
 protect - enable or disable FLASH write protection
 erase  - erase FLASH memory
 flinfo - print FLASH memory information
+nand   - NAND memory operations (see doc/README.nand)
 bdinfo - print Board Info structure
 iminfo - print header information for application image
 coninfo - print console devices and informations
@@ -4125,6 +4274,36 @@ Please note that changes to some configuration parameters may take
 only effect after the next boot (yes, that's just like Windoze :-).
 
 
+Callback functions for environment variables:
+---------------------------------------------
+
+For some environment variables, the behavior of u-boot needs to change
+when their values are changed.  This functionailty allows functions to
+be associated with arbitrary variables.  On creation, overwrite, or
+deletion, the callback will provide the opportunity for some side
+effect to happen or for the change to be rejected.
+
+The callbacks are named and associated with a function using the
+U_BOOT_ENV_CALLBACK macro in your board or driver code.
+
+These callbacks are associated with variables in one of two ways.  The
+static list can be added to by defining CONFIG_ENV_CALLBACK_LIST_STATIC
+in the board configuration to a string that defines a list of
+associations.  The list must be in the following format:
+
+       entry = variable_name[:callback_name]
+       list = entry[,list]
+
+If the callback name is not specified, then the callback is deleted.
+Spaces are also allowed anywhere in the list.
+
+Callbacks can also be associated by defining the ".callbacks" variable
+with the same list format above.  Any association in ".callbacks" will
+override any association in the static list. You can define
+CONFIG_ENV_CALLBACK_LIST_DEFAULT to a list (string) to define the
+".callbacks" envirnoment variable in the default or embedded environment.
+
+
 Command Line Parsing:
 =====================
 
index 5d3b4c2..a067b8a 100644 (file)
@@ -165,13 +165,7 @@ next:
        bl  cpu_init_crit
 #endif
 
-/* Set stackpointer in internal RAM to call board_init_f */
-call_board_init_f:
-       ldr     sp, =(CONFIG_SYS_INIT_SP_ADDR)
-       bic     sp, sp, #7 /* 8-byte alignment for ABI compliance */
-       ldr     r0,=0x00000000
-
-       bl      board_init_f
+       bl      _main
 
 /*------------------------------------------------------------------------------*/
 
@@ -188,14 +182,10 @@ relocate_code:
        mov     r5, r1  /* save addr of gd */
        mov     r6, r2  /* save addr of destination */
 
-       /* Set up the stack                                                 */
-stack_setup:
-       mov     sp, r4
-
        adr     r0, _start
        cmp     r0, r6
        moveq   r9, #0          /* no relocation. relocation offset(r9) = 0 */
-       beq     clear_bss               /* skip relocation */
+       beq     relocate_done           /* skip relocation */
        mov     r1, r6                  /* r1 <- scratch for copy_loop */
        ldr     r3, _image_copy_end_ofs
        add     r2, r0, r3              /* r2 <- source end address         */
@@ -245,7 +235,15 @@ fixnext:
        add     r2, r2, #8              /* each rel.dyn entry is 8 bytes */
        cmp     r2, r3
        blo     fixloop
-       b       clear_bss
+       bx      lr
+
+#endif
+
+relocate_done:
+
+       bx      lr
+
+#ifndef CONFIG_SPL_BUILD
 
 _rel_dyn_start_ofs:
        .word __rel_dyn_start - _start
@@ -253,54 +251,13 @@ _rel_dyn_end_ofs:
        .word __rel_dyn_end - _start
 _dynsym_start_ofs:
        .word __dynsym_start - _start
-#endif
 
-clear_bss:
-#ifdef CONFIG_SPL_BUILD
-       /* No relocation for SPL */
-       ldr     r0, =__bss_start
-       ldr     r1, =__bss_end__
-#else
-       ldr     r0, _bss_start_ofs
-       ldr     r1, _bss_end_ofs
-       mov     r4, r6                  /* reloc addr */
-       add     r0, r0, r4
-       add     r1, r1, r4
 #endif
-       mov     r2, #0x00000000         /* clear                            */
-
-clbss_l:cmp    r0, r1                  /* clear loop... */
-       bhs     clbss_e                 /* if reached end of bss, exit */
-       str     r2, [r0]
-       add     r0, r0, #4
-       b       clbss_l
-clbss_e:
 
-/*
- * We are done. Do not return, instead branch to second part of board
- * initialization, now running from RAM.
- */
-#ifdef CONFIG_NAND_SPL
-       ldr     r0, _nand_boot_ofs
-       mov     pc, r0
+       .globl  c_runtime_cpu_setup
+c_runtime_cpu_setup:
 
-_nand_boot_ofs:
-       .word nand_boot
-#else
-jump_2_ram:
-       ldr     r0, _board_init_r_ofs
-       adr     r1, _start
-       add     lr, r0, r1
-       add     lr, lr, r9
-       /* setup parameters for board_init_r */
-       mov     r0, r5          /* gd_t */
-       mov     r1, r6          /* dest_addr */
-       /* jump to it ... */
-       mov     pc, lr
-
-_board_init_r_ofs:
-       .word board_init_r - _start
-#endif
+       bx      lr
 
 /*
  *************************************************************************
index 667a0e0..40df4b1 100644 (file)
@@ -224,12 +224,7 @@ skip_tcmdisable:
         */
        bl      lowlevel_init           /* go setup pll,mux,memory */
 
-/* Set stackpointer in internal RAM to call board_init_f */
-call_board_init_f:
-       ldr     sp, =(CONFIG_SYS_INIT_SP_ADDR)
-       bic     sp, sp, #7 /* 8-byte alignment for ABI compliance */
-       ldr     r0,=0x00000000
-       bl      board_init_f
+       bl      _main
 
 /*------------------------------------------------------------------------------*/
 
@@ -246,14 +241,10 @@ relocate_code:
        mov     r5, r1  /* save addr of gd */
        mov     r6, r2  /* save addr of destination */
 
-       /* Set up the stack                                                 */
-stack_setup:
-       mov     sp, r4
-
        adr     r0, _start
        cmp     r0, r6
        moveq   r9, #0          /* no relocation. relocation offset(r9) = 0 */
-       beq     clear_bss               /* skip relocation */
+       beq     relocate_done           /* skip relocation */
        mov     r1, r6                  /* r1 <- scratch for copy_loop */
        ldr     r3, _bss_start_ofs
        add     r2, r0, r3              /* r2 <- source end address         */
@@ -343,49 +334,9 @@ mmu_enable:
 skip_hw_init:
 #endif
 
-clear_bss:
-#ifndef CONFIG_SPL_BUILD
-       ldr     r0, _bss_start_ofs
-       ldr     r1, _bss_end_ofs
-       mov     r4, r6                  /* reloc addr */
-       add     r0, r0, r4
-       add     r1, r1, r4
-       mov     r2, #0x00000000         /* clear                            */
-
-clbss_l:cmp    r0, r1                  /* clear loop... */
-       bhs     clbss_e                 /* if reached end of bss, exit */
-       str     r2, [r0]
-       add     r0, r0, #4
-       b       clbss_l
-clbss_e:
-#ifndef CONFIG_NAND_SPL
-       bl coloured_LED_init
-       bl red_led_on
-#endif
-#endif
+relocate_done:
 
-/*
- * We are done. Do not return, instead branch to second part of board
- * initialization, now running from RAM.
- */
-#ifdef CONFIG_NAND_SPL
-       ldr     pc, _nand_boot
-
-_nand_boot: .word nand_boot
-#else
-       ldr     r0, _board_init_r_ofs
-       adr     r1, _start
-       add     lr, r0, r1
-       add     lr, lr, r9
-       /* setup parameters for board_init_r */
-       mov     r0, r5          /* gd_t */
-       mov     r1, r6          /* dest_addr */
-       /* jump to it ... */
-       mov     pc, lr
-
-_board_init_r_ofs:
-       .word board_init_r - _start
-#endif
+       bx      lr
 
 _rel_dyn_start_ofs:
        .word __rel_dyn_start - _start
@@ -399,6 +350,11 @@ _mmu_table_base:
        .word mmu_table
 #endif
 
+       .globl  c_runtime_cpu_setup
+c_runtime_cpu_setup:
+
+       mov     pc, lr
+
 #ifndef CONFIG_NAND_SPL
 /*
  * we assume that cache operation is done before. (eg. cleanup_before_linux())
index c2a7763..771d386 100644 (file)
@@ -147,12 +147,7 @@ reset:
        bl      cpu_init_crit
 #endif
 
-/* Set stackpointer in internal RAM to call board_init_f */
-call_board_init_f:
-       ldr     sp, =(CONFIG_SYS_INIT_SP_ADDR)
-       bic     sp, sp, #7 /* 8-byte alignment for ABI compliance */
-       ldr     r0,=0x00000000
-       bl      board_init_f
+       bl      _main
 
 /*------------------------------------------------------------------------------*/
 
@@ -169,14 +164,10 @@ relocate_code:
        mov     r5, r1  /* save addr of gd */
        mov     r6, r2  /* save addr of destination */
 
-       /* Set up the stack                                                 */
-stack_setup:
-       mov     sp, r4
-
        adr     r0, _start
        cmp     r0, r6
        moveq   r9, #0          /* no relocation. relocation offset(r9) = 0 */
-       beq     clear_bss               /* skip relocation */
+       beq     relocate_done           /* skip relocation */
        mov     r1, r6                  /* r1 <- scratch for copy_loop */
        ldr     r3, _bss_start_ofs
        add     r2, r0, r3              /* r2 <- source end address         */
@@ -228,43 +219,10 @@ fixnext:
        blo     fixloop
 #endif
 
-clear_bss:
-#ifndef CONFIG_SPL_BUILD
-       ldr     r0, _bss_start_ofs
-       ldr     r1, _bss_end_ofs
-       mov     r4, r6                  /* reloc addr */
-       add     r0, r0, r4
-       add     r1, r1, r4
-       mov     r2, #0x00000000         /* clear                            */
-
-clbss_l:cmp    r0, r1                  /* clear loop... */
-       bhs     clbss_e                 /* if reached end of bss, exit */
-       str     r2, [r0]
-       add     r0, r0, #4
-       b       clbss_l
-clbss_e:
-
-       bl coloured_LED_init
-       bl red_led_on
-#endif
+relocate_done:
 
-/*
- * We are done. Do not return, instead branch to second part of board
- * initialization, now running from RAM.
- */
-       ldr     r0, _board_init_r_ofs
-       adr     r1, _start
-       add     lr, r0, r1
-       add     lr, lr, r9
-       /* setup parameters for board_init_r */
-       mov     r0, r5          /* gd_t */
-       mov     r1, r6          /* dest_addr */
-       /* jump to it ... */
        mov     pc, lr
 
-_board_init_r_ofs:
-       .word board_init_r - _start
-
 _rel_dyn_start_ofs:
        .word __rel_dyn_start - _start
 _rel_dyn_end_ofs:
@@ -272,6 +230,11 @@ _rel_dyn_end_ofs:
 _dynsym_start_ofs:
        .word __dynsym_start - _start
 
+       .globl  c_runtime_cpu_setup
+c_runtime_cpu_setup:
+
+       mov     pc, lr
+
 /*
  *************************************************************************
  *
index 14c9156..511d21d 100644 (file)
@@ -182,12 +182,7 @@ copyex:
        bl      cpu_init_crit
 #endif
 
-/* Set stackpointer in internal RAM to call board_init_f */
-call_board_init_f:
-       ldr     sp, =(CONFIG_SYS_INIT_SP_ADDR)
-       bic     sp, sp, #7 /* 8-byte alignment for ABI compliance */
-       ldr     r0,=0x00000000
-       bl      board_init_f
+       bl      _main
 
 /*------------------------------------------------------------------------------*/
 
@@ -204,14 +199,10 @@ relocate_code:
        mov     r5, r1  /* save addr of gd */
        mov     r6, r2  /* save addr of destination */
 
-       /* Set up the stack                                                 */
-stack_setup:
-       mov     sp, r4
-
        adr     r0, _start
        cmp     r0, r6
        moveq   r9, #0          /* no relocation. relocation offset(r9) = 0 */
-       beq     clear_bss               /* skip relocation */
+       beq     relocate_done           /* skip relocation */
        mov     r1, r6                  /* r1 <- scratch for copy_loop */
        ldr     r3, _bss_start_ofs
        add     r2, r0, r3              /* r2 <- source end address         */
@@ -263,51 +254,10 @@ fixnext:
        blo     fixloop
 #endif
 
-clear_bss:
-#ifndef CONFIG_SPL_BUILD
-       ldr     r0, _bss_start_ofs
-       ldr     r1, _bss_end_ofs
-       mov     r4, r6                  /* reloc addr */
-       add     r0, r0, r4
-       add     r1, r1, r4
-       mov     r2, #0x00000000         /* clear                            */
-
-clbss_l:cmp    r0, r1                  /* clear loop... */
-       bhs     clbss_e                 /* if reached end of bss, exit */
-       str     r2, [r0]
-       add     r0, r0, #4
-       b       clbss_l
-clbss_e:
-
-       bl coloured_LED_init
-       bl red_led_on
-#endif
-
-/*
- * We are done. Do not return, instead branch to second part of board
- * initialization, now running from RAM.
- */
-#ifdef CONFIG_NAND_SPL
-       ldr     r0, _nand_boot_ofs
-       mov     pc, r0
+relocate_done:
 
-_nand_boot_ofs:
-       .word nand_boot
-#else
-       ldr     r0, _board_init_r_ofs
-       adr     r1, _start
-       add     lr, r0, r1
-       add     lr, lr, r9
-       /* setup parameters for board_init_r */
-       mov     r0, r5          /* gd_t */
-       mov     r1, r6          /* dest_addr */
-       /* jump to it ... */
        mov     pc, lr
 
-_board_init_r_ofs:
-       .word board_init_r - _start
-#endif
-
 _rel_dyn_start_ofs:
        .word __rel_dyn_start - _start
 _rel_dyn_end_ofs:
@@ -315,6 +265,11 @@ _rel_dyn_end_ofs:
 _dynsym_start_ofs:
        .word __dynsym_start - _start
 
+       .globl  c_runtime_cpu_setup
+c_runtime_cpu_setup:
+
+       mov     pc, lr
+
 /*
  *************************************************************************
  *
index 3a483f6..e8d6d71 100644 (file)
 #include <config.h>
 #include <version.h>
 
-#if defined(CONFIG_OMAP1510)
-#include <./configs/omap1510.h>
-#endif
-
 /*
  *************************************************************************
  *
@@ -176,12 +172,7 @@ poll1:
        bl  cpu_init_crit
 #endif
 
-/* Set stackpointer in internal RAM to call board_init_f */
-call_board_init_f:
-       ldr     sp, =(CONFIG_SYS_INIT_SP_ADDR)
-       bic     sp, sp, #7 /* 8-byte alignment for ABI compliance */
-       ldr     r0,=0x00000000
-       bl      board_init_f
+       bl      _main
 
 /*------------------------------------------------------------------------------*/
 
@@ -198,14 +189,10 @@ relocate_code:
        mov     r5, r1  /* save addr of gd */
        mov     r6, r2  /* save addr of destination */
 
-       /* Set up the stack                                                 */
-stack_setup:
-       mov     sp, r4
-
        adr     r0, _start
        cmp     r0, r6
        moveq   r9, #0          /* no relocation. relocation offset(r9) = 0 */
-       beq     clear_bss               /* skip relocation */
+       beq     relocate_done           /* skip relocation */
        mov     r1, r6                  /* r1 <- scratch for copy_loop */
        ldr     r3, _bss_start_ofs
        add     r2, r0, r3              /* r2 <- source end address         */
@@ -257,51 +244,10 @@ fixnext:
        blo     fixloop
 #endif
 
-clear_bss:
-#ifndef CONFIG_SPL_BUILD
-       ldr     r0, _bss_start_ofs
-       ldr     r1, _bss_end_ofs
-       mov     r4, r6                  /* reloc addr */
-       add     r0, r0, r4
-       add     r1, r1, r4
-       mov     r2, #0x00000000         /* clear                            */
-
-clbss_l:cmp    r0, r1                  /* clear loop... */
-       bhs     clbss_e                 /* if reached end of bss, exit */
-       str     r2, [r0]
-       add     r0, r0, #4
-       b       clbss_l
-clbss_e:
-
-       bl coloured_LED_init
-       bl red_led_on
-#endif
-
-/*
- * We are done. Do not return, instead branch to second part of board
- * initialization, now running from RAM.
- */
-#ifdef CONFIG_NAND_SPL
-       ldr     r0, _nand_boot_ofs
-       mov     pc, r0
+relocate_done:
 
-_nand_boot_ofs:
-       .word nand_boot
-#else
-       ldr     r0, _board_init_r_ofs
-       adr     r1, _start
-       add     lr, r0, r1
-       add     lr, lr, r9
-       /* setup parameters for board_init_r */
-       mov     r0, r5          /* gd_t */
-       mov     r1, r6          /* dest_addr */
-       /* jump to it ... */
        mov     pc, lr
 
-_board_init_r_ofs:
-       .word board_init_r - _start
-#endif
-
 _rel_dyn_start_ofs:
        .word __rel_dyn_start - _start
 _rel_dyn_end_ofs:
@@ -309,6 +255,11 @@ _rel_dyn_end_ofs:
 _dynsym_start_ofs:
        .word __dynsym_start - _start
 
+       .globl  c_runtime_cpu_setup
+c_runtime_cpu_setup:
+
+       mov     pc, lr
+
 /*
  *************************************************************************
  *
index 968fb03..80f1ce9 100644 (file)
@@ -16,7 +16,7 @@
 void reset_cpu(unsigned long a)
 {
        struct davinci_timer *const wdttimer =
-               (struct davinci_timer *)DAVINCI_TIMER1_BASE;
+               (struct davinci_timer *)DAVINCI_WDOG_BASE;
        writel(0x08, &wdttimer->tgcr);
        writel(readl(&wdttimer->tgcr) | 0x03, &wdttimer->tgcr);
        writel(0, &wdttimer->tim12);
index 03eb2de..0ba6f09 100644 (file)
@@ -31,7 +31,7 @@ static u32 kirkwood_variant(void)
 #define MPP_CTRL(i)    (KW_MPP_BASE + (i* 4))
 #define MPP_NR_REGS    (1 + MPP_MAX/8)
 
-void kirkwood_mpp_conf(u32 *mpp_list, u32 *mpp_save)
+void kirkwood_mpp_conf(const u32 *mpp_list, u32 *mpp_save)
 {
        u32 mpp_ctrl[MPP_NR_REGS];
        unsigned int variant_mask;
index bfea6ab..4ff19c3 100644 (file)
@@ -333,6 +333,8 @@ uint32_t mxc_get_clock(enum mxc_clock clk)
                return mx28_get_sspclk(MXC_SSPCLK2);
        case MXC_SSP3_CLK:
                return mx28_get_sspclk(MXC_SSPCLK3);
+       case MXC_XTAL_CLK:
+               return XTAL_FREQ_KHZ * 1000;
        }
 
        return 0;
index 8ea7c36..1b8502e 100644 (file)
@@ -50,7 +50,7 @@ void early_delay(int delay)
 }
 
 #define        MUX_CONFIG_BOOTMODE_PAD (MXS_PAD_3V3 | MXS_PAD_4MA | MXS_PAD_NOPULL)
-const iomux_cfg_t iomux_boot[] = {
+static const iomux_cfg_t iomux_boot[] = {
        MX28_PAD_LCD_D00__GPIO_1_0 | MUX_CONFIG_BOOTMODE_PAD,
        MX28_PAD_LCD_D01__GPIO_1_1 | MUX_CONFIG_BOOTMODE_PAD,
        MX28_PAD_LCD_D02__GPIO_1_2 | MUX_CONFIG_BOOTMODE_PAD,
@@ -59,7 +59,7 @@ const iomux_cfg_t iomux_boot[] = {
        MX28_PAD_LCD_D05__GPIO_1_5 | MUX_CONFIG_BOOTMODE_PAD,
 };
 
-uint8_t mxs_get_bootmode_index(void)
+static uint8_t mxs_get_bootmode_index(void)
 {
        uint8_t bootmode = 0;
        int i;
index e693145..401c513 100644 (file)
 
 #include "mxs_init.h"
 
-static uint32_t mx28_dram_vals[] = {
+static uint32_t dram_vals[] = {
+/*
+ * i.MX28 DDR2 at 200MHz
+ */
+#if defined(CONFIG_MX28)
        0x00000000, 0x00000000, 0x00000000, 0x00000000,
        0x00000000, 0x00000000, 0x00000000, 0x00000000,
        0x00000000, 0x00000000, 0x00000000, 0x00000000,
@@ -79,6 +83,9 @@ static uint32_t mx28_dram_vals[] = {
        0x06120612, 0x04320432, 0x04320432, 0x00040004,
        0x00040004, 0x00000000, 0x00000000, 0x00000000,
        0x00000000, 0x00010001
+#else
+#error Unsupported memory initialization
+#endif
 };
 
 void __mxs_adjust_memory_params(uint32_t *dram_vals)
@@ -87,17 +94,17 @@ void __mxs_adjust_memory_params(uint32_t *dram_vals)
 void mxs_adjust_memory_params(uint32_t *dram_vals)
        __attribute__((weak, alias("__mxs_adjust_memory_params")));
 
-void init_mx28_200mhz_ddr2(void)
+static void initialize_dram_values(void)
 {
        int i;
 
-       mxs_adjust_memory_params(mx28_dram_vals);
+       mxs_adjust_memory_params(dram_vals);
 
-       for (i = 0; i < ARRAY_SIZE(mx28_dram_vals); i++)
-               writel(mx28_dram_vals[i], MXS_DRAM_BASE + (4 * i));
+       for (i = 0; i < ARRAY_SIZE(dram_vals); i++)
+               writel(dram_vals[i], MXS_DRAM_BASE + (4 * i));
 }
 
-void mxs_mem_init_clock(void)
+static void mxs_mem_init_clock(void)
 {
        struct mxs_clkctrl_regs *clkctrl_regs =
                (struct mxs_clkctrl_regs *)MXS_CLKCTRL_BASE;
@@ -128,7 +135,7 @@ void mxs_mem_init_clock(void)
        early_delay(10000);
 }
 
-void mxs_mem_setup_cpu_and_hbus(void)
+static void mxs_mem_setup_cpu_and_hbus(void)
 {
        struct mxs_clkctrl_regs *clkctrl_regs =
                (struct mxs_clkctrl_regs *)MXS_CLKCTRL_BASE;
@@ -160,7 +167,7 @@ void mxs_mem_setup_cpu_and_hbus(void)
        early_delay(15000);
 }
 
-void mxs_mem_setup_vdda(void)
+static void mxs_mem_setup_vdda(void)
 {
        struct mxs_power_regs *power_regs =
                (struct mxs_power_regs *)MXS_POWER_BASE;
@@ -171,17 +178,6 @@ void mxs_mem_setup_vdda(void)
                &power_regs->hw_power_vddactrl);
 }
 
-void mxs_mem_setup_vddd(void)
-{
-       struct mxs_power_regs *power_regs =
-               (struct mxs_power_regs *)MXS_POWER_BASE;
-
-       writel((0x1c << POWER_VDDDCTRL_TRG_OFFSET) |
-               (0x7 << POWER_VDDDCTRL_BO_OFFSET_OFFSET) |
-               POWER_VDDDCTRL_LINREG_OFFSET_1STEPS_BELOW,
-               &power_regs->hw_power_vdddctrl);
-}
-
 uint32_t mxs_mem_get_size(void)
 {
        uint32_t sz, da;
@@ -229,7 +225,7 @@ void mxs_mem_init(void)
        /* Clear START bit from DRAM_CTL16 */
        clrbits_le32(MXS_DRAM_BASE + 0x40, 1);
 
-       init_mx28_200mhz_ddr2();
+       initialize_dram_values();
 
        /* Clear SREFRESH bit from DRAM_CTL17 */
        clrbits_le32(MXS_DRAM_BASE + 0x44, 1);
@@ -241,8 +237,6 @@ void mxs_mem_init(void)
        while (!(readl(MXS_DRAM_BASE + 0xe8) & (1 << 20)))
                ;
 
-       mxs_mem_setup_vddd();
-
        early_delay(10000);
 
        mxs_mem_setup_cpu_and_hbus();
index 4b917bd..be44c22 100644 (file)
@@ -30,7 +30,7 @@
 
 #include "mxs_init.h"
 
-void mxs_power_clock2xtal(void)
+static void mxs_power_clock2xtal(void)
 {
        struct mxs_clkctrl_regs *clkctrl_regs =
                (struct mxs_clkctrl_regs *)MXS_CLKCTRL_BASE;
@@ -40,7 +40,7 @@ void mxs_power_clock2xtal(void)
                &clkctrl_regs->hw_clkctrl_clkseq_set);
 }
 
-void mxs_power_clock2pll(void)
+static void mxs_power_clock2pll(void)
 {
        struct mxs_clkctrl_regs *clkctrl_regs =
                (struct mxs_clkctrl_regs *)MXS_CLKCTRL_BASE;
@@ -52,7 +52,7 @@ void mxs_power_clock2pll(void)
                        CLKCTRL_CLKSEQ_BYPASS_CPU);
 }
 
-void mxs_power_clear_auto_restart(void)
+static void mxs_power_clear_auto_restart(void)
 {
        struct mxs_rtc_regs *rtc_regs =
                (struct mxs_rtc_regs *)MXS_RTC_BASE;
@@ -85,7 +85,7 @@ void mxs_power_clear_auto_restart(void)
                ;
 }
 
-void mxs_power_set_linreg(void)
+static void mxs_power_set_linreg(void)
 {
        struct mxs_power_regs *power_regs =
                (struct mxs_power_regs *)MXS_POWER_BASE;
@@ -104,7 +104,7 @@ void mxs_power_set_linreg(void)
                        POWER_VDDIOCTRL_LINREG_OFFSET_1STEPS_BELOW);
 }
 
-int mxs_get_batt_volt(void)
+static int mxs_get_batt_volt(void)
 {
        struct mxs_power_regs *power_regs =
                (struct mxs_power_regs *)MXS_POWER_BASE;
@@ -115,12 +115,12 @@ int mxs_get_batt_volt(void)
        return volt;
 }
 
-int mxs_is_batt_ready(void)
+static int mxs_is_batt_ready(void)
 {
        return (mxs_get_batt_volt() >= 3600);
 }
 
-int mxs_is_batt_good(void)
+static int mxs_is_batt_good(void)
 {
        struct mxs_power_regs *power_regs =
                (struct mxs_power_regs *)MXS_POWER_BASE;
@@ -160,7 +160,7 @@ int mxs_is_batt_good(void)
        return 0;
 }
 
-void mxs_power_setup_5v_detect(void)
+static void mxs_power_setup_5v_detect(void)
 {
        struct mxs_power_regs *power_regs =
                (struct mxs_power_regs *)MXS_POWER_BASE;
@@ -172,7 +172,7 @@ void mxs_power_setup_5v_detect(void)
                        POWER_5VCTRL_PWRUP_VBUS_CMPS);
 }
 
-void mxs_src_power_init(void)
+static void mxs_src_power_init(void)
 {
        struct mxs_power_regs *power_regs =
                (struct mxs_power_regs *)MXS_POWER_BASE;
@@ -203,7 +203,7 @@ void mxs_src_power_init(void)
        clrbits_le32(&power_regs->hw_power_5vctrl, POWER_5VCTRL_DCDC_XFER);
 }
 
-void mxs_power_init_4p2_params(void)
+static void mxs_power_init_4p2_params(void)
 {
        struct mxs_power_regs *power_regs =
                (struct mxs_power_regs *)MXS_POWER_BASE;
@@ -227,7 +227,7 @@ void mxs_power_init_4p2_params(void)
                0x3f << POWER_5VCTRL_CHARGE_4P2_ILIMIT_OFFSET);
 }
 
-void mxs_enable_4p2_dcdc_input(int xfer)
+static void mxs_enable_4p2_dcdc_input(int xfer)
 {
        struct mxs_power_regs *power_regs =
                (struct mxs_power_regs *)MXS_POWER_BASE;
@@ -323,7 +323,7 @@ void mxs_enable_4p2_dcdc_input(int xfer)
                                POWER_CTRL_ENIRQ_VDD5V_DROOP);
 }
 
-void mxs_power_init_4p2_regulator(void)
+static void mxs_power_init_4p2_regulator(void)
 {
        struct mxs_power_regs *power_regs =
                (struct mxs_power_regs *)MXS_POWER_BASE;
@@ -407,7 +407,7 @@ void mxs_power_init_4p2_regulator(void)
        writel(POWER_CTRL_DCDC4P2_BO_IRQ, &power_regs->hw_power_ctrl_clr);
 }
 
-void mxs_power_init_dcdc_4p2_source(void)
+static void mxs_power_init_dcdc_4p2_source(void)
 {
        struct mxs_power_regs *power_regs =
                (struct mxs_power_regs *)MXS_POWER_BASE;
@@ -429,7 +429,7 @@ void mxs_power_init_dcdc_4p2_source(void)
        }
 }
 
-void mxs_power_enable_4p2(void)
+static void mxs_power_enable_4p2(void)
 {
        struct mxs_power_regs *power_regs =
                (struct mxs_power_regs *)MXS_POWER_BASE;
@@ -488,7 +488,7 @@ void mxs_power_enable_4p2(void)
                        &power_regs->hw_power_charge_clr);
 }
 
-void mxs_boot_valid_5v(void)
+static void mxs_boot_valid_5v(void)
 {
        struct mxs_power_regs *power_regs =
                (struct mxs_power_regs *)MXS_POWER_BASE;
@@ -511,7 +511,7 @@ void mxs_boot_valid_5v(void)
        mxs_power_enable_4p2();
 }
 
-void mxs_powerdown(void)
+static void mxs_powerdown(void)
 {
        struct mxs_power_regs *power_regs =
                (struct mxs_power_regs *)MXS_POWER_BASE;
@@ -520,7 +520,7 @@ void mxs_powerdown(void)
                &power_regs->hw_power_reset);
 }
 
-void mxs_batt_boot(void)
+static void mxs_batt_boot(void)
 {
        struct mxs_power_regs *power_regs =
                (struct mxs_power_regs *)MXS_POWER_BASE;
@@ -564,7 +564,7 @@ void mxs_batt_boot(void)
                0x8 << POWER_5VCTRL_CHARGE_4P2_ILIMIT_OFFSET);
 }
 
-void mxs_handle_5v_conflict(void)
+static void mxs_handle_5v_conflict(void)
 {
        struct mxs_power_regs *power_regs =
                (struct mxs_power_regs *)MXS_POWER_BASE;
@@ -600,7 +600,7 @@ void mxs_handle_5v_conflict(void)
        }
 }
 
-void mxs_5v_boot(void)
+static void mxs_5v_boot(void)
 {
        struct mxs_power_regs *power_regs =
                (struct mxs_power_regs *)MXS_POWER_BASE;
@@ -623,7 +623,7 @@ void mxs_5v_boot(void)
        mxs_handle_5v_conflict();
 }
 
-void mxs_init_batt_bo(void)
+static void mxs_init_batt_bo(void)
 {
        struct mxs_power_regs *power_regs =
                (struct mxs_power_regs *)MXS_POWER_BASE;
@@ -637,7 +637,7 @@ void mxs_init_batt_bo(void)
        writel(POWER_CTRL_ENIRQ_BATT_BO, &power_regs->hw_power_ctrl_clr);
 }
 
-void mxs_switch_vddd_to_dcdc_source(void)
+static void mxs_switch_vddd_to_dcdc_source(void)
 {
        struct mxs_power_regs *power_regs =
                (struct mxs_power_regs *)MXS_POWER_BASE;
@@ -651,7 +651,7 @@ void mxs_switch_vddd_to_dcdc_source(void)
                POWER_VDDDCTRL_DISABLE_STEPPING);
 }
 
-void mxs_power_configure_power_source(void)
+static void mxs_power_configure_power_source(void)
 {
        int batt_ready, batt_good;
        struct mxs_power_regs *power_regs =
@@ -689,7 +689,7 @@ void mxs_power_configure_power_source(void)
        mxs_switch_vddd_to_dcdc_source();
 }
 
-void mxs_enable_output_rail_protection(void)
+static void mxs_enable_output_rail_protection(void)
 {
        struct mxs_power_regs *power_regs =
                (struct mxs_power_regs *)MXS_POWER_BASE;
@@ -707,7 +707,7 @@ void mxs_enable_output_rail_protection(void)
                        POWER_VDDIOCTRL_PWDN_BRNOUT);
 }
 
-int mxs_get_vddio_power_source_off(void)
+static int mxs_get_vddio_power_source_off(void)
 {
        struct mxs_power_regs *power_regs =
                (struct mxs_power_regs *)MXS_POWER_BASE;
@@ -735,7 +735,7 @@ int mxs_get_vddio_power_source_off(void)
 
 }
 
-int mxs_get_vddd_power_source_off(void)
+static int mxs_get_vddd_power_source_off(void)
 {
        struct mxs_power_regs *power_regs =
                (struct mxs_power_regs *)MXS_POWER_BASE;
@@ -766,201 +766,115 @@ int mxs_get_vddd_power_source_off(void)
        return 0;
 }
 
-void mxs_power_set_vddio(uint32_t new_target, uint32_t new_brownout)
+struct mxs_vddx_cfg {
+       uint32_t                *reg;
+       uint8_t                 step_mV;
+       uint16_t                lowest_mV;
+       int                     (*powered_by_linreg)(void);
+       uint32_t                trg_mask;
+       uint32_t                bo_irq;
+       uint32_t                bo_enirq;
+       uint32_t                bo_offset_mask;
+       uint32_t                bo_offset_offset;
+};
+
+static const struct mxs_vddx_cfg mxs_vddio_cfg = {
+       .reg                    = &(((struct mxs_power_regs *)MXS_POWER_BASE)->
+                                       hw_power_vddioctrl),
+       .step_mV                = 50,
+       .lowest_mV              = 2800,
+       .powered_by_linreg      = mxs_get_vddio_power_source_off,
+       .trg_mask               = POWER_VDDIOCTRL_TRG_MASK,
+       .bo_irq                 = POWER_CTRL_VDDIO_BO_IRQ,
+       .bo_enirq               = POWER_CTRL_ENIRQ_VDDIO_BO,
+       .bo_offset_mask         = POWER_VDDIOCTRL_BO_OFFSET_MASK,
+       .bo_offset_offset       = POWER_VDDIOCTRL_BO_OFFSET_OFFSET,
+};
+
+static const struct mxs_vddx_cfg mxs_vddd_cfg = {
+       .reg                    = &(((struct mxs_power_regs *)MXS_POWER_BASE)->
+                                       hw_power_vdddctrl),
+       .step_mV                = 25,
+       .lowest_mV              = 800,
+       .powered_by_linreg      = mxs_get_vddd_power_source_off,
+       .trg_mask               = POWER_VDDDCTRL_TRG_MASK,
+       .bo_irq                 = POWER_CTRL_VDDD_BO_IRQ,
+       .bo_enirq               = POWER_CTRL_ENIRQ_VDDD_BO,
+       .bo_offset_mask         = POWER_VDDDCTRL_BO_OFFSET_MASK,
+       .bo_offset_offset       = POWER_VDDDCTRL_BO_OFFSET_OFFSET,
+};
+
+static void mxs_power_set_vddx(const struct mxs_vddx_cfg *cfg,
+                               uint32_t new_target, uint32_t new_brownout)
 {
        struct mxs_power_regs *power_regs =
                (struct mxs_power_regs *)MXS_POWER_BASE;
        uint32_t cur_target, diff, bo_int = 0;
        uint32_t powered_by_linreg = 0;
+       int adjust_up, tmp;
 
-       new_brownout = (new_target - new_brownout + 25) / 50;
+       new_brownout = DIV_ROUND(new_target - new_brownout, cfg->step_mV);
 
-       cur_target = readl(&power_regs->hw_power_vddioctrl);
-       cur_target &= POWER_VDDIOCTRL_TRG_MASK;
-       cur_target *= 50;       /* 50 mV step*/
-       cur_target += 2800;     /* 2800 mV lowest */
+       cur_target = readl(cfg->reg);
+       cur_target &= cfg->trg_mask;
+       cur_target *= cfg->step_mV;
+       cur_target += cfg->lowest_mV;
 
-       powered_by_linreg = mxs_get_vddio_power_source_off();
-       if (new_target > cur_target) {
+       adjust_up = new_target > cur_target;
+       powered_by_linreg = cfg->powered_by_linreg();
 
+       if (adjust_up) {
                if (powered_by_linreg) {
-                       bo_int = readl(&power_regs->hw_power_vddioctrl);
-                       clrbits_le32(&power_regs->hw_power_vddioctrl,
-                                       POWER_CTRL_ENIRQ_VDDIO_BO);
+                       bo_int = readl(cfg->reg);
+                       clrbits_le32(cfg->reg, cfg->bo_enirq);
                }
+               setbits_le32(cfg->reg, cfg->bo_offset_mask);
+       }
 
-               setbits_le32(&power_regs->hw_power_vddioctrl,
-                               POWER_VDDIOCTRL_BO_OFFSET_MASK);
-               do {
-                       if (new_target - cur_target > 100)
+       do {
+               if (abs(new_target - cur_target) > 100) {
+                       if (adjust_up)
                                diff = cur_target + 100;
                        else
-                               diff = new_target;
-
-                       diff -= 2800;
-                       diff /= 50;
-
-                       clrsetbits_le32(&power_regs->hw_power_vddioctrl,
-                               POWER_VDDIOCTRL_TRG_MASK, diff);
-
-                       if (powered_by_linreg ||
-                               (readl(&power_regs->hw_power_sts) &
-                                       POWER_STS_VDD5V_GT_VDDIO))
-                               early_delay(500);
-                       else {
-                               while (!(readl(&power_regs->hw_power_sts) &
-                                       POWER_STS_DC_OK))
-                                       ;
-
-                       }
-
-                       cur_target = readl(&power_regs->hw_power_vddioctrl);
-                       cur_target &= POWER_VDDIOCTRL_TRG_MASK;
-                       cur_target *= 50;       /* 50 mV step*/
-                       cur_target += 2800;     /* 2800 mV lowest */
-               } while (new_target > cur_target);
-
-               if (powered_by_linreg) {
-                       writel(POWER_CTRL_VDDIO_BO_IRQ,
-                               &power_regs->hw_power_ctrl_clr);
-                       if (bo_int & POWER_CTRL_ENIRQ_VDDIO_BO)
-                               setbits_le32(&power_regs->hw_power_vddioctrl,
-                                               POWER_CTRL_ENIRQ_VDDIO_BO);
-               }
-       } else {
-               do {
-                       if (cur_target - new_target > 100)
                                diff = cur_target - 100;
-                       else
-                               diff = new_target;
-
-                       diff -= 2800;
-                       diff /= 50;
-
-                       clrsetbits_le32(&power_regs->hw_power_vddioctrl,
-                               POWER_VDDIOCTRL_TRG_MASK, diff);
-
-                       if (powered_by_linreg ||
-                               (readl(&power_regs->hw_power_sts) &
-                                       POWER_STS_VDD5V_GT_VDDIO))
-                               early_delay(500);
-                       else {
-                               while (!(readl(&power_regs->hw_power_sts) &
-                                       POWER_STS_DC_OK))
-                                       ;
-
-                       }
-
-                       cur_target = readl(&power_regs->hw_power_vddioctrl);
-                       cur_target &= POWER_VDDIOCTRL_TRG_MASK;
-                       cur_target *= 50;       /* 50 mV step*/
-                       cur_target += 2800;     /* 2800 mV lowest */
-               } while (new_target < cur_target);
-       }
-
-       clrsetbits_le32(&power_regs->hw_power_vddioctrl,
-                       POWER_VDDIOCTRL_BO_OFFSET_MASK,
-                       new_brownout << POWER_VDDIOCTRL_BO_OFFSET_OFFSET);
-}
-
-void mxs_power_set_vddd(uint32_t new_target, uint32_t new_brownout)
-{
-       struct mxs_power_regs *power_regs =
-               (struct mxs_power_regs *)MXS_POWER_BASE;
-       uint32_t cur_target, diff, bo_int = 0;
-       uint32_t powered_by_linreg = 0;
-
-       new_brownout = (new_target - new_brownout + 12) / 25;
-
-       cur_target = readl(&power_regs->hw_power_vdddctrl);
-       cur_target &= POWER_VDDDCTRL_TRG_MASK;
-       cur_target *= 25;       /* 25 mV step*/
-       cur_target += 800;      /* 800 mV lowest */
-
-       powered_by_linreg = mxs_get_vddd_power_source_off();
-       if (new_target > cur_target) {
-               if (powered_by_linreg) {
-                       bo_int = readl(&power_regs->hw_power_vdddctrl);
-                       clrbits_le32(&power_regs->hw_power_vdddctrl,
-                                       POWER_CTRL_ENIRQ_VDDD_BO);
+               } else {
+                       diff = new_target;
                }
 
-               setbits_le32(&power_regs->hw_power_vdddctrl,
-                               POWER_VDDDCTRL_BO_OFFSET_MASK);
-
-               do {
-                       if (new_target - cur_target > 100)
-                               diff = cur_target + 100;
-                       else
-                               diff = new_target;
-
-                       diff -= 800;
-                       diff /= 25;
-
-                       clrsetbits_le32(&power_regs->hw_power_vdddctrl,
-                               POWER_VDDDCTRL_TRG_MASK, diff);
+               diff -= cfg->lowest_mV;
+               diff /= cfg->step_mV;
 
-                       if (powered_by_linreg ||
-                               (readl(&power_regs->hw_power_sts) &
-                                       POWER_STS_VDD5V_GT_VDDIO))
-                               early_delay(500);
-                       else {
-                               while (!(readl(&power_regs->hw_power_sts) &
-                                       POWER_STS_DC_OK))
-                                       ;
+               clrsetbits_le32(cfg->reg, cfg->trg_mask, diff);
 
+               if (powered_by_linreg ||
+                       (readl(&power_regs->hw_power_sts) &
+                               POWER_STS_VDD5V_GT_VDDIO))
+                       early_delay(500);
+               else {
+                       for (;;) {
+                               tmp = readl(&power_regs->hw_power_sts);
+                               if (tmp & POWER_STS_DC_OK)
+                                       break;
                        }
-
-                       cur_target = readl(&power_regs->hw_power_vdddctrl);
-                       cur_target &= POWER_VDDDCTRL_TRG_MASK;
-                       cur_target *= 25;       /* 25 mV step*/
-                       cur_target += 800;      /* 800 mV lowest */
-               } while (new_target > cur_target);
-
-               if (powered_by_linreg) {
-                       writel(POWER_CTRL_VDDD_BO_IRQ,
-                               &power_regs->hw_power_ctrl_clr);
-                       if (bo_int & POWER_CTRL_ENIRQ_VDDD_BO)
-                               setbits_le32(&power_regs->hw_power_vdddctrl,
-                                               POWER_CTRL_ENIRQ_VDDD_BO);
                }
-       } else {
-               do {
-                       if (cur_target - new_target > 100)
-                               diff = cur_target - 100;
-                       else
-                               diff = new_target;
 
-                       diff -= 800;
-                       diff /= 25;
+               cur_target = readl(cfg->reg);
+               cur_target &= cfg->trg_mask;
+               cur_target *= cfg->step_mV;
+               cur_target += cfg->lowest_mV;
+       } while (new_target > cur_target);
 
-                       clrsetbits_le32(&power_regs->hw_power_vdddctrl,
-                                       POWER_VDDDCTRL_TRG_MASK, diff);
-
-                       if (powered_by_linreg ||
-                               (readl(&power_regs->hw_power_sts) &
-                                       POWER_STS_VDD5V_GT_VDDIO))
-                               early_delay(500);
-                       else {
-                               while (!(readl(&power_regs->hw_power_sts) &
-                                       POWER_STS_DC_OK))
-                                       ;
-
-                       }
-
-                       cur_target = readl(&power_regs->hw_power_vdddctrl);
-                       cur_target &= POWER_VDDDCTRL_TRG_MASK;
-                       cur_target *= 25;       /* 25 mV step*/
-                       cur_target += 800;      /* 800 mV lowest */
-               } while (new_target < cur_target);
+       if (adjust_up && powered_by_linreg) {
+               writel(cfg->bo_irq, &power_regs->hw_power_ctrl_clr);
+               if (bo_int & cfg->bo_enirq)
+                       setbits_le32(cfg->reg, cfg->bo_enirq);
        }
 
-       clrsetbits_le32(&power_regs->hw_power_vdddctrl,
-                       POWER_VDDDCTRL_BO_OFFSET_MASK,
-                       new_brownout << POWER_VDDDCTRL_BO_OFFSET_OFFSET);
+       clrsetbits_le32(cfg->reg, cfg->bo_offset_mask,
+                       new_brownout << cfg->bo_offset_offset);
 }
 
-void mxs_setup_batt_detect(void)
+static void mxs_setup_batt_detect(void)
 {
        mxs_lradc_init();
        mxs_lradc_enable_batt_measurement();
@@ -982,9 +896,8 @@ void mxs_power_init(void)
        mxs_power_configure_power_source();
        mxs_enable_output_rail_protection();
 
-       mxs_power_set_vddio(3300, 3150);
-
-       mxs_power_set_vddd(1350, 1200);
+       mxs_power_set_vddx(&mxs_vddio_cfg, 3300, 3150);
+       mxs_power_set_vddx(&mxs_vddd_cfg, 1500, 1000);
 
        writel(POWER_CTRL_VDDD_BO_IRQ | POWER_CTRL_VDDA_BO_IRQ |
                POWER_CTRL_VDDIO_BO_IRQ | POWER_CTRL_VDD5V_DROOP_IRQ |
index 2188f7e..66a8b65 100644 (file)
 #include <common.h>
 #include <version.h>
 
-#if defined(CONFIG_OMAP1610)
-#include <./configs/omap1510.h>
-#elif defined(CONFIG_OMAP730)
-#include <./configs/omap730.h>
-#endif
-
 /*
  *************************************************************************
  *
@@ -198,20 +192,7 @@ reset:
        bl      cpu_init_crit
 #endif
 
-/* Set stackpointer in internal RAM to call board_init_f */
-call_board_init_f:
-#ifdef CONFIG_NAND_SPL /* deprecated, use instead CONFIG_SPL_BUILD */
-       ldr     sp, =(CONFIG_SYS_INIT_SP_ADDR)
-#else
-#ifdef CONFIG_SPL_BUILD
-       ldr     sp, =(CONFIG_SPL_STACK)
-#else
-       ldr     sp, =(CONFIG_SYS_INIT_SP_ADDR)
-#endif
-#endif
-       bic     sp, sp, #7 /* 8-byte alignment for ABI compliance */
-       ldr     r0,=0x00000000
-       bl      board_init_f
+       bl      _main
 
 /*------------------------------------------------------------------------------*/
 
@@ -229,15 +210,11 @@ relocate_code:
        mov     r5, r1  /* save addr of gd */
        mov     r6, r2  /* save addr of destination */
 
-       /* Set up the stack                                                 */
-stack_setup:
-       mov     sp, r4
-
        adr     r0, _start
        sub     r9, r6, r0              /* r9 <- relocation offset */
        cmp     r0, r6
-       moveq   r9, #0          /* no relocation. relocation offset(r9) = 0 */
-       beq     clear_bss               /* skip relocation */
+       moveq   r9, #0                  /* no relocation. offset(r9) = 0 */
+       beq     relocate_done           /* skip relocation */
        mov     r1, r6                  /* r1 <- scratch for copy loop */
        ldr     r3, _bss_start_ofs
        add     r2, r0, r3              /* r2 <- source end address         */
@@ -289,56 +266,9 @@ fixnext:
        blo     fixloop
 #endif
 
-clear_bss:
-#ifdef CONFIG_SPL_BUILD
-       /* No relocation for SPL */
-       ldr     r0, =__bss_start
-       ldr     r1, =__bss_end__
-#else
-       ldr     r0, _bss_start_ofs
-       ldr     r1, _bss_end_ofs
-       mov     r4, r6                  /* reloc addr */
-       add     r0, r0, r4
-       add     r1, r1, r4
-#endif
-       mov     r2, #0x00000000         /* clear                            */
-
-clbss_l:cmp    r0, r1                  /* clear loop... */
-       bhs     clbss_e                 /* if reached end of bss, exit */
-       str     r2, [r0]
-       add     r0, r0, #4
-       b       clbss_l
-clbss_e:
-
-#ifndef CONFIG_SPL_BUILD
-       bl coloured_LED_init
-       bl red_led_on
-#endif
-
-/*
- * We are done. Do not return, instead branch to second part of board
- * initialization, now running from RAM.
- */
-#ifdef CONFIG_NAND_SPL
-       ldr     r0, _nand_boot_ofs
-       mov     pc, r0
+relocate_done:
 
-_nand_boot_ofs:
-       .word nand_boot
-#else
-       ldr     r0, _board_init_r_ofs
-       ldr     r1, _TEXT_BASE
-       add     lr, r0, r1
-       add     lr, lr, r9
-       /* setup parameters for board_init_r */
-       mov     r0, r5          /* gd_t */
-       mov     r1, r6          /* dest_addr */
-       /* jump to it ... */
-       mov     pc, lr
-
-_board_init_r_ofs:
-       .word board_init_r - _start
-#endif
+       bx      lr
 
 _rel_dyn_start_ofs:
        .word __rel_dyn_start - _start
@@ -346,8 +276,14 @@ _rel_dyn_end_ofs:
        .word __rel_dyn_end - _start
 _dynsym_start_ofs:
        .word __dynsym_start - _start
+
 #endif
 
+       .globl  c_runtime_cpu_setup
+c_runtime_cpu_setup:
+
+       bx      lr
+
 /*
  *************************************************************************
  *
index 30e2183..a7a98a4 100644 (file)
@@ -147,12 +147,7 @@ reset:
        bl      cpu_init_crit
 #endif
 
-/* Set stackpointer in internal RAM to call board_init_f */
-call_board_init_f:
-       ldr     sp, =(CONFIG_SYS_INIT_SP_ADDR)
-       bic     sp, sp, #7 /* 8-byte alignment for ABI compliance */
-       ldr     r0,=0x00000000
-       bl      board_init_f
+       bl      _main
 
 /*------------------------------------------------------------------------------*/
 
@@ -169,14 +164,10 @@ relocate_code:
        mov     r5, r1  /* save addr of gd */
        mov     r6, r2  /* save addr of destination */
 
-       /* Set up the stack                                                 */
-stack_setup:
-       mov     sp, r4
-
        adr     r0, _start
        cmp     r0, r6
        moveq   r9, #0          /* no relocation. relocation offset(r9) = 0 */
-       beq     clear_bss               /* skip relocation */
+       beq     relocate_done           /* skip relocation */
        mov     r1, r6                  /* r1 <- scratch for copy_loop */
        ldr     r3, _bss_start_ofs
        add     r2, r0, r3              /* r2 <- source end address         */
@@ -228,46 +219,10 @@ fixnext:
        blo     fixloop
 #endif
 
-clear_bss:
-#ifndef CONFIG_SPL_BUILD
-       ldr     r0, _bss_start_ofs
-       ldr     r1, _bss_end_ofs
-       mov     r4, r6                  /* reloc addr */
-       add     r0, r0, r4
-       add     r1, r1, r4
-       mov     r2, #0x00000000         /* clear                            */
-
-clbss_l:cmp    r0, r1                  /* clear loop... */
-       bhs     clbss_e                 /* if reached end of bss, exit */
-       str     r2, [r0]
-       add     r0, r0, #4
-       b       clbss_l
-clbss_e:
-#endif
-
-/*
- * We are done. Do not return, instead branch to second part of board
- * initialization, now running from RAM.
- */
-#ifdef CONFIG_NAND_SPL
-       ldr     pc, _nand_boot
+relocate_done:
 
-_nand_boot: .word nand_boot
-#else
-       ldr     r0, _board_init_r_ofs
-       adr     r1, _start
-       add     lr, r0, r1
-       add     lr, lr, r9
-       /* setup parameters for board_init_r */
-       mov     r0, r5          /* gd_t */
-       mov     r1, r6          /* dest_addr */
-       /* jump to it ... */
        mov     pc, lr
 
-_board_init_r_ofs:
-       .word board_init_r - _start
-#endif
-
 _rel_dyn_start_ofs:
        .word __rel_dyn_start - _start
 _rel_dyn_end_ofs:
@@ -275,6 +230,11 @@ _rel_dyn_end_ofs:
 _dynsym_start_ofs:
        .word __dynsym_start - _start
 
+       .globl  c_runtime_cpu_setup
+c_runtime_cpu_setup:
+
+       mov     pc, lr
+
 /*
  *************************************************************************
  *
index a133d19..c189849 100644 (file)
@@ -143,12 +143,7 @@ reset:
        bl      cpu_init_crit
 #endif
 
-/* Set stackpointer in internal RAM to call board_init_f */
-call_board_init_f:
-       ldr     sp, =(CONFIG_SYS_INIT_SP_ADDR)
-       bic     sp, sp, #7 /* 8-byte alignment for ABI compliance */
-       ldr     r0,=0x00000000
-       bl      board_init_f
+       bl      _main
 
 /*------------------------------------------------------------------------------*/
 
@@ -165,14 +160,10 @@ relocate_code:
        mov     r5, r1  /* save addr of gd */
        mov     r6, r2  /* save addr of destination */
 
-       /* Set up the stack                                                 */
-stack_setup:
-       mov     sp, r4
-
        adr     r0, _start
        cmp     r0, r6
        moveq   r9, #0          /* no relocation. relocation offset(r9) = 0 */
-       beq     clear_bss               /* skip relocation */
+       beq     relocate_done           /* skip relocation */
        mov     r1, r6                  /* r1 <- scratch for copy_loop */
        ldr     r3, _bss_start_ofs
        add     r2, r0, r3              /* r2 <- source end address         */
@@ -224,50 +215,9 @@ fixnext:
        blo     fixloop
 #endif
 
-clear_bss:
-#ifndef CONFIG_SPL_BUILD
-       ldr     r0, _bss_start_ofs
-       ldr     r1, _bss_end_ofs
-       mov     r4, r6                  /* reloc addr */
-       add     r0, r0, r4
-       add     r1, r1, r4
-       mov     r2, #0x00000000         /* clear                            */
-
-clbss_l:cmp    r0, r1                  /* clear loop... */
-       bhs     clbss_e                 /* if reached end of bss, exit */
-       str     r2, [r0]
-       add     r0, r0, #4
-       b       clbss_l
-clbss_e:
-
-       bl coloured_LED_init
-       bl red_led_on
-#endif
+relocate_done:
 
-/*
- * We are done. Do not return, instead branch to second part of board
- * initialization, now running from RAM.
- */
-#ifdef CONFIG_NAND_SPL
-       ldr     r0, _nand_boot_ofs
-       mov     pc, r0
-
-_nand_boot_ofs:
-       .word nand_boot
-#else
-       ldr     r0, _board_init_r_ofs
-       adr     r1, _start
-       add     lr, r0, r1
-       add     lr, lr, r9
-       /* setup parameters for board_init_r */
-       mov     r0, r5          /* gd_t */
-       mov     r1, r6          /* dest_addr */
-       /* jump to it ... */
-       mov     pc, lr
-
-_board_init_r_ofs:
-       .word board_init_r - _start
-#endif
+       bx      lr
 
 _rel_dyn_start_ofs:
        .word __rel_dyn_start - _start
@@ -276,6 +226,11 @@ _rel_dyn_end_ofs:
 _dynsym_start_ofs:
        .word __dynsym_start - _start
 
+       .globl  c_runtime_cpu_setup
+c_runtime_cpu_setup:
+
+       mov     pc, lr
+
 /*
  *************************************************************************
  *
index 74875b3..70c443e 100644 (file)
@@ -18,10 +18,12 @@ LIB = $(obj)lib$(SOC).o
 
 COBJS  += clock.o
 COBJS  += sys_info.o
+COBJS  += mem.o
 COBJS  += ddr.o
 COBJS  += emif4.o
 COBJS  += board.o
 COBJS  += mux.o
+COBJS-$(CONFIG_NAND_OMAP_GPMC) += elm.o
 
 SRCS   := $(SOBJS:.o=.S) $(COBJS:.o=.c)
 OBJS   := $(addprefix $(obj),$(COBJS) $(COBJS-y) $(SOBJS))
index e4c123c..ab31326 100644 (file)
@@ -25,6 +25,7 @@
 #include <asm/arch/ddr_defs.h>
 #include <asm/arch/clock.h>
 #include <asm/arch/gpio.h>
+#include <asm/arch/mem.h>
 #include <asm/arch/mmc_host_def.h>
 #include <asm/arch/sys_proto.h>
 #include <asm/io.h>
 #include <i2c.h>
 #include <miiphy.h>
 #include <cpsw.h>
+#include <asm/errno.h>
+#include <linux/usb/ch9.h>
+#include <linux/usb/gadget.h>
+#include <linux/usb/musb.h>
+#include <asm/omap_musb.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
@@ -63,3 +69,83 @@ void setup_clocks_for_console(void)
        /* Not yet implemented */
        return;
 }
+
+/* AM33XX has two MUSB controllers which can be host or gadget */
+#if (defined(CONFIG_MUSB_GADGET) || defined(CONFIG_MUSB_HOST)) && \
+       (defined(CONFIG_AM335X_USB0) || defined(CONFIG_AM335X_USB1))
+static struct ctrl_dev *cdev = (struct ctrl_dev *)CTRL_DEVICE_BASE;
+
+/* USB 2.0 PHY Control */
+#define CM_PHY_PWRDN                   (1 << 0)
+#define CM_PHY_OTG_PWRDN               (1 << 1)
+#define OTGVDET_EN                     (1 << 19)
+#define OTGSESSENDEN                   (1 << 20)
+
+static void am33xx_usb_set_phy_power(u8 on, u32 *reg_addr)
+{
+       if (on) {
+               clrsetbits_le32(reg_addr, CM_PHY_PWRDN | CM_PHY_OTG_PWRDN,
+                               OTGVDET_EN | OTGSESSENDEN);
+       } else {
+               clrsetbits_le32(reg_addr, 0, CM_PHY_PWRDN | CM_PHY_OTG_PWRDN);
+       }
+}
+
+static struct musb_hdrc_config musb_config = {
+       .multipoint     = 1,
+       .dyn_fifo       = 1,
+       .num_eps        = 16,
+       .ram_bits       = 12,
+};
+
+#ifdef CONFIG_AM335X_USB0
+static void am33xx_otg0_set_phy_power(u8 on)
+{
+       am33xx_usb_set_phy_power(on, &cdev->usb_ctrl0);
+}
+
+struct omap_musb_board_data otg0_board_data = {
+       .set_phy_power = am33xx_otg0_set_phy_power,
+};
+
+static struct musb_hdrc_platform_data otg0_plat = {
+       .mode           = CONFIG_AM335X_USB0_MODE,
+       .config         = &musb_config,
+       .power          = 50,
+       .platform_ops   = &musb_dsps_ops,
+       .board_data     = &otg0_board_data,
+};
+#endif
+
+#ifdef CONFIG_AM335X_USB1
+static void am33xx_otg1_set_phy_power(u8 on)
+{
+       am33xx_usb_set_phy_power(on, &cdev->usb_ctrl1);
+}
+
+struct omap_musb_board_data otg1_board_data = {
+       .set_phy_power = am33xx_otg1_set_phy_power,
+};
+
+static struct musb_hdrc_platform_data otg1_plat = {
+       .mode           = CONFIG_AM335X_USB1_MODE,
+       .config         = &musb_config,
+       .power          = 50,
+       .platform_ops   = &musb_dsps_ops,
+       .board_data     = &otg1_board_data,
+};
+#endif
+#endif
+
+int arch_misc_init(void)
+{
+#ifdef CONFIG_AM335X_USB0
+       musb_register(&otg0_plat, &otg0_board_data,
+               (void *)AM335X_USB0_OTG_BASE);
+#endif
+#ifdef CONFIG_AM335X_USB1
+       musb_register(&otg1_plat, &otg1_board_data,
+               (void *)AM335X_USB1_OTG_BASE);
+#endif
+       return 0;
+}
index bc2abb6..d7d98d1 100644 (file)
@@ -40,6 +40,7 @@
 #define CLK_MODE_MASK          0xfffffff8
 #define CLK_DIV_SEL            0xFFFFFFE0
 #define CPGMAC0_IDLE           0x30000
+#define DPLL_CLKDCOLDO_GATE_CTRL        0x300
 
 const struct cm_perpll *cmper = (struct cm_perpll *)CM_PER;
 const struct cm_wkuppll *cmwkup = (struct cm_wkuppll *)CM_WKUP;
@@ -150,6 +151,16 @@ static void enable_per_clocks(void)
                ;
 #endif /* CONFIG_SERIAL6 */
 
+       /* GPMC */
+       writel(PRCM_MOD_EN, &cmper->gpmcclkctrl);
+       while (readl(&cmper->gpmcclkctrl) != PRCM_MOD_EN)
+               ;
+
+       /* ELM */
+       writel(PRCM_MOD_EN, &cmper->elmclkctrl);
+       while (readl(&cmper->elmclkctrl) != PRCM_MOD_EN)
+               ;
+
        /* MMC0*/
        writel(PRCM_MOD_EN, &cmper->mmc0clkctrl);
        while (readl(&cmper->mmc0clkctrl) != PRCM_MOD_EN)
@@ -194,6 +205,11 @@ static void enable_per_clocks(void)
        writel(PRCM_MOD_EN, &cmrtc->rtcclkctrl);
        while (readl(&cmrtc->rtcclkctrl) != PRCM_MOD_EN)
                ;
+
+       /* MUSB */
+       writel(PRCM_MOD_EN, &cmper->usb0clkctrl);
+       while (readl(&cmper->usb0clkctrl) != PRCM_MOD_EN)
+               ;
 }
 
 static void mpu_pll_config(void)
@@ -290,6 +306,8 @@ static void per_pll_config(void)
 
        while (readl(&cmwkup->idlestdpllper) != ST_DPLL_CLK)
                ;
+
+       writel(DPLL_CLKDCOLDO_GATE_CTRL, &cmwkup->clkdcoldodpllper);
 }
 
 void ddr_pll_config(unsigned int ddrpll_m)
diff --git a/arch/arm/cpu/armv7/am33xx/elm.c b/arch/arm/cpu/armv7/am33xx/elm.c
new file mode 100644 (file)
index 0000000..9eed23d
--- /dev/null
@@ -0,0 +1,212 @@
+/*
+ * (C) Copyright 2010-2011 Texas Instruments, <www.ti.com>
+ * Mansoor Ahamed <mansoor.ahamed@ti.com>
+ *
+ * BCH Error Location Module (ELM) support.
+ *
+ * NOTE:
+ * 1. Supports only continuous mode. Dont see need for page mode in uboot
+ * 2. Supports only syndrome polynomial 0. i.e. poly local variable is
+ *    always set to ELM_DEFAULT_POLY. Dont see need for other polynomial
+ *    sets in uboot
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <asm/io.h>
+#include <asm/errno.h>
+#include <asm/arch/cpu.h>
+#include <asm/arch/omap_gpmc.h>
+#include <asm/arch/elm.h>
+
+#define ELM_DEFAULT_POLY (0)
+
+struct elm *elm_cfg;
+
+/**
+ * elm_load_syndromes - Load BCH syndromes based on nibble selection
+ * @syndrome: BCH syndrome
+ * @nibbles:
+ * @poly: Syndrome Polynomial set to use
+ *
+ * Load BCH syndromes based on nibble selection
+ */
+static void elm_load_syndromes(u8 *syndrome, u32 nibbles, u8 poly)
+{
+       u32 *ptr;
+       u32 val;
+
+       /* reg 0 */
+       ptr = &elm_cfg->syndrome_fragments[poly].syndrome_fragment_x[0];
+       val = syndrome[0] | (syndrome[1] << 8) | (syndrome[2] << 16) |
+                               (syndrome[3] << 24);
+       writel(val, ptr);
+       /* reg 1 */
+       ptr = &elm_cfg->syndrome_fragments[poly].syndrome_fragment_x[1];
+       val = syndrome[4] | (syndrome[5] << 8) | (syndrome[6] << 16) |
+                               (syndrome[7] << 24);
+       writel(val, ptr);
+
+       /* BCH 8-bit with 26 nibbles (4*8=32) */
+       if (nibbles > 13) {
+               /* reg 2 */
+               ptr = &elm_cfg->syndrome_fragments[poly].syndrome_fragment_x[2];
+               val = syndrome[8] | (syndrome[9] << 8) | (syndrome[10] << 16) |
+                               (syndrome[11] << 24);
+               writel(val, ptr);
+               /* reg 3 */
+               ptr = &elm_cfg->syndrome_fragments[poly].syndrome_fragment_x[3];
+               val = syndrome[12] | (syndrome[13] << 8) |
+                       (syndrome[14] << 16) | (syndrome[15] << 24);
+               writel(val, ptr);
+       }
+
+       /* BCH 16-bit with 52 nibbles (7*8=56) */
+       if (nibbles > 26) {
+               /* reg 4 */
+               ptr = &elm_cfg->syndrome_fragments[poly].syndrome_fragment_x[4];
+               val = syndrome[16] | (syndrome[17] << 8) |
+                       (syndrome[18] << 16) | (syndrome[19] << 24);
+               writel(val, ptr);
+
+               /* reg 5 */
+               ptr = &elm_cfg->syndrome_fragments[poly].syndrome_fragment_x[5];
+               val = syndrome[20] | (syndrome[21] << 8) |
+                       (syndrome[22] << 16) | (syndrome[23] << 24);
+               writel(val, ptr);
+
+               /* reg 6 */
+               ptr = &elm_cfg->syndrome_fragments[poly].syndrome_fragment_x[6];
+               val = syndrome[24] | (syndrome[25] << 8) |
+                       (syndrome[26] << 16) | (syndrome[27] << 24);
+               writel(val, ptr);
+       }
+}
+
+/**
+ * elm_check_errors - Check for BCH errors and return error locations
+ * @syndrome: BCH syndrome
+ * @nibbles:
+ * @error_count: Returns number of errrors in the syndrome
+ * @error_locations: Returns error locations (in decimal) in this array
+ *
+ * Check the provided syndrome for BCH errors and return error count
+ * and locations in the array passed. Returns -1 if error is not correctable,
+ * else returns 0
+ */
+int elm_check_error(u8 *syndrome, u32 nibbles, u32 *error_count,
+               u32 *error_locations)
+{
+       u8 poly = ELM_DEFAULT_POLY;
+       s8 i;
+       u32 location_status;
+
+       elm_load_syndromes(syndrome, nibbles, poly);
+
+       /* start processing */
+       writel((readl(&elm_cfg->syndrome_fragments[poly].syndrome_fragment_x[6])
+                               | ELM_SYNDROME_FRAGMENT_6_SYNDROME_VALID),
+               &elm_cfg->syndrome_fragments[poly].syndrome_fragment_x[6]);
+
+       /* wait for processing to complete */
+       while ((readl(&elm_cfg->irqstatus) & (0x1 << poly)) != 0x1)
+               ;
+       /* clear status */
+       writel((readl(&elm_cfg->irqstatus) | (0x1 << poly)),
+                       &elm_cfg->irqstatus);
+
+       /* check if correctable */
+       location_status = readl(&elm_cfg->error_location[poly].location_status);
+       if (!(location_status & ELM_LOCATION_STATUS_ECC_CORRECTABLE_MASK))
+               return -1;
+
+       /* get error count */
+       *error_count = readl(&elm_cfg->error_location[poly].location_status) &
+                                       ELM_LOCATION_STATUS_ECC_NB_ERRORS_MASK;
+
+       for (i = 0; i < *error_count; i++) {
+               error_locations[i] =
+                       readl(&elm_cfg->error_location[poly].error_location_x[i]);
+       }
+
+       return 0;
+}
+
+
+/**
+ * elm_config - Configure ELM module
+ * @level: 4 / 8 / 16 bit BCH
+ *
+ * Configure ELM module based on BCH level.
+ * Set mode as continuous mode.
+ * Currently we are using only syndrome 0 and syndromes 1 to 6 are not used.
+ * Also, the mode is set only for syndrome 0
+ */
+int elm_config(enum bch_level level)
+{
+       u32 val;
+       u8 poly = ELM_DEFAULT_POLY;
+       u32 buffer_size = 0x7FF;
+
+       /* config size and level */
+       val = (u32)(level) & ELM_LOCATION_CONFIG_ECC_BCH_LEVEL_MASK;
+       val |= ((buffer_size << ELM_LOCATION_CONFIG_ECC_SIZE_POS) &
+                               ELM_LOCATION_CONFIG_ECC_SIZE_MASK);
+       writel(val, &elm_cfg->location_config);
+
+       /* config continous mode */
+       /* enable interrupt generation for syndrome polynomial set */
+       writel((readl(&elm_cfg->irqenable) | (0x1 << poly)),
+                       &elm_cfg->irqenable);
+       /* set continuous mode for the syndrome polynomial set */
+       writel((readl(&elm_cfg->page_ctrl) & ~(0x1 << poly)),
+                       &elm_cfg->page_ctrl);
+
+       return 0;
+}
+
+/**
+ * elm_reset - Do a soft reset of ELM
+ *
+ * Perform a soft reset of ELM and return after reset is done.
+ */
+void elm_reset(void)
+{
+       /* initiate reset */
+       writel((readl(&elm_cfg->sysconfig) | ELM_SYSCONFIG_SOFTRESET),
+                               &elm_cfg->sysconfig);
+
+       /* wait for reset complete and normal operation */
+       while ((readl(&elm_cfg->sysstatus) & ELM_SYSSTATUS_RESETDONE) !=
+               ELM_SYSSTATUS_RESETDONE)
+               ;
+}
+
+/**
+ * elm_init - Initialize ELM module
+ *
+ * Initialize ELM support. Currently it does only base address init
+ * and ELM reset.
+ */
+void elm_init(void)
+{
+       elm_cfg = (struct elm *)ELM_BASE;
+       elm_reset();
+}
diff --git a/arch/arm/cpu/armv7/am33xx/mem.c b/arch/arm/cpu/armv7/am33xx/mem.c
new file mode 100644 (file)
index 0000000..b8f54ab
--- /dev/null
@@ -0,0 +1,101 @@
+/*
+ * (C) Copyright 2010
+ * Texas Instruments, <www.ti.com>
+ *
+ * Author :
+ *     Mansoor Ahamed <mansoor.ahamed@ti.com>
+ *
+ * Initial Code from:
+ *     Manikandan Pillai <mani.pillai@ti.com>
+ *     Richard Woodruff <r-woodruff2@ti.com>
+ *     Syed Mohammed Khasim <khasim@ti.com>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <asm/io.h>
+#include <asm/arch/cpu.h>
+#include <asm/arch/mem.h>
+#include <asm/arch/sys_proto.h>
+#include <command.h>
+
+struct gpmc *gpmc_cfg;
+
+#if defined(CONFIG_CMD_NAND)
+static const u32 gpmc_m_nand[GPMC_MAX_REG] = {
+       M_NAND_GPMC_CONFIG1,
+       M_NAND_GPMC_CONFIG2,
+       M_NAND_GPMC_CONFIG3,
+       M_NAND_GPMC_CONFIG4,
+       M_NAND_GPMC_CONFIG5,
+       M_NAND_GPMC_CONFIG6, 0
+};
+#endif
+
+
+void enable_gpmc_cs_config(const u32 *gpmc_config, struct gpmc_cs *cs, u32 base,
+                       u32 size)
+{
+       writel(0, &cs->config7);
+       sdelay(1000);
+       /* Delay for settling */
+       writel(gpmc_config[0], &cs->config1);
+       writel(gpmc_config[1], &cs->config2);
+       writel(gpmc_config[2], &cs->config3);
+       writel(gpmc_config[3], &cs->config4);
+       writel(gpmc_config[4], &cs->config5);
+       writel(gpmc_config[5], &cs->config6);
+       /* Enable the config */
+       writel((((size & 0xF) << 8) | ((base >> 24) & 0x3F) |
+               (1 << 6)), &cs->config7);
+       sdelay(2000);
+}
+
+/*****************************************************
+ * gpmc_init(): init gpmc bus
+ * Init GPMC for x16, MuxMode (SDRAM in x32).
+ * This code can only be executed from SRAM or SDRAM.
+ *****************************************************/
+void gpmc_init(void)
+{
+       /* putting a blanket check on GPMC based on ZeBu for now */
+       gpmc_cfg = (struct gpmc *)GPMC_BASE;
+
+#ifdef CONFIG_CMD_NAND
+       const u32 *gpmc_config = NULL;
+       u32 base = 0;
+       u32 size = 0;
+#endif
+       /* global settings */
+       writel(0x00000008, &gpmc_cfg->sysconfig);
+       writel(0x00000100, &gpmc_cfg->irqstatus);
+       writel(0x00000200, &gpmc_cfg->irqenable);
+       writel(0x00000012, &gpmc_cfg->config);
+       /*
+        * Disable the GPMC0 config set by ROM code
+        */
+       writel(0, &gpmc_cfg->cs[0].config7);
+       sdelay(1000);
+
+#ifdef CONFIG_CMD_NAND
+       gpmc_config = gpmc_m_nand;
+
+       base = PISMO1_NAND_BASE;
+       size = PISMO1_NAND_SIZE;
+       enable_gpmc_cs_config(gpmc_config, &gpmc_cfg->cs[0], base, size);
+#endif
+}
index fe61f88..7459979 100644 (file)
@@ -921,6 +921,21 @@ static int exynos5_set_spi_clk(enum periph_id periph_id,
        return 0;
 }
 
+static unsigned long exynos4_get_i2c_clk(void)
+{
+       struct exynos4_clock *clk =
+               (struct exynos4_clock *)samsung_get_base_clock();
+       unsigned long sclk, aclk_100;
+       unsigned int ratio;
+
+       sclk = get_pll_clk(APLL);
+
+       ratio = (readl(&clk->div_top)) >> 4;
+       ratio &= 0xf;
+       aclk_100 = sclk / (ratio + 1);
+       return aclk_100;
+}
+
 unsigned long get_pll_clk(int pllreg)
 {
        if (cpu_is_exynos5())
@@ -941,6 +956,8 @@ unsigned long get_i2c_clk(void)
 {
        if (cpu_is_exynos5()) {
                return exynos5_get_i2c_clk();
+       } else if (cpu_is_exynos4()) {
+               return exynos4_get_i2c_clk();
        } else {
                debug("I2C clock is not set for this CPU\n");
                return 0;
index f02f441..20a4b84 100644 (file)
@@ -329,54 +329,60 @@ static int exynos5_pinmux_config(int peripheral, int flags)
        return 0;
 }
 
-static int exynos4_mmc_config(int peripheral, int flags)
+static void exynos4_i2c_config(int peripheral, int flags)
 {
-       struct exynos4_gpio_part2 *gpio2 =
-               (struct exynos4_gpio_part2 *)samsung_get_base_gpio_part2();
-       struct s5p_gpio_bank *bank, *bank_ext;
-       int i;
+       struct exynos4_gpio_part1 *gpio1 =
+               (struct exynos4_gpio_part1 *) samsung_get_base_gpio_part1();
 
        switch (peripheral) {
-       case PERIPH_ID_SDMMC0:
-               bank = &gpio2->k0;
-               bank_ext = &gpio2->k1;
+       case PERIPH_ID_I2C0:
+               s5p_gpio_cfg_pin(&gpio1->d1, 0, GPIO_FUNC(0x2));
+               s5p_gpio_cfg_pin(&gpio1->d1, 1, GPIO_FUNC(0x2));
                break;
-       case PERIPH_ID_SDMMC2:
-               bank = &gpio2->k2;
-               bank_ext = &gpio2->k3;
+       case PERIPH_ID_I2C1:
+               s5p_gpio_cfg_pin(&gpio1->d1, 2, GPIO_FUNC(0x2));
+               s5p_gpio_cfg_pin(&gpio1->d1, 3, GPIO_FUNC(0x2));
+               break;
+       case PERIPH_ID_I2C2:
+               s5p_gpio_cfg_pin(&gpio1->a0, 6, GPIO_FUNC(0x3));
+               s5p_gpio_cfg_pin(&gpio1->a0, 7, GPIO_FUNC(0x3));
+               break;
+       case PERIPH_ID_I2C3:
+               s5p_gpio_cfg_pin(&gpio1->a1, 2, GPIO_FUNC(0x3));
+               s5p_gpio_cfg_pin(&gpio1->a1, 3, GPIO_FUNC(0x3));
+               break;
+       case PERIPH_ID_I2C4:
+               s5p_gpio_cfg_pin(&gpio1->b, 2, GPIO_FUNC(0x3));
+               s5p_gpio_cfg_pin(&gpio1->b, 3, GPIO_FUNC(0x3));
+               break;
+       case PERIPH_ID_I2C5:
+               s5p_gpio_cfg_pin(&gpio1->b, 6, GPIO_FUNC(0x3));
+               s5p_gpio_cfg_pin(&gpio1->b, 7, GPIO_FUNC(0x3));
+               break;
+       case PERIPH_ID_I2C6:
+               s5p_gpio_cfg_pin(&gpio1->c1, 3, GPIO_FUNC(0x4));
+               s5p_gpio_cfg_pin(&gpio1->c1, 4, GPIO_FUNC(0x4));
+               break;
+       case PERIPH_ID_I2C7:
+               s5p_gpio_cfg_pin(&gpio1->d0, 2, GPIO_FUNC(0x3));
+               s5p_gpio_cfg_pin(&gpio1->d0, 3, GPIO_FUNC(0x3));
                break;
-       default:
-               return -1;
-       }
-       for (i = 0; i < 7; i++) {
-               if (i == 2)
-                       continue;
-               s5p_gpio_cfg_pin(bank, i,  GPIO_FUNC(0x2));
-               s5p_gpio_set_pull(bank, i, GPIO_PULL_NONE);
-               s5p_gpio_set_drv(bank, i, GPIO_DRV_4X);
-       }
-       if (flags & PINMUX_FLAG_8BIT_MODE) {
-               for (i = 3; i < 7; i++) {
-                       s5p_gpio_cfg_pin(bank_ext, i,  GPIO_FUNC(0x3));
-                       s5p_gpio_set_pull(bank_ext, i, GPIO_PULL_NONE);
-                       s5p_gpio_set_drv(bank_ext, i, GPIO_DRV_4X);
-               }
        }
-
-       return 0;
 }
 
 static int exynos4_pinmux_config(int peripheral, int flags)
 {
        switch (peripheral) {
-       case PERIPH_ID_SDMMC0:
-       case PERIPH_ID_SDMMC2:
-               return exynos4_mmc_config(peripheral, flags);
-       case PERIPH_ID_SDMMC1:
-       case PERIPH_ID_SDMMC3:
-       case PERIPH_ID_SDMMC4:
-               printf("SDMMC device %d not implemented\n", peripheral);
-               return -1;
+       case PERIPH_ID_I2C0:
+       case PERIPH_ID_I2C1:
+       case PERIPH_ID_I2C2:
+       case PERIPH_ID_I2C3:
+       case PERIPH_ID_I2C4:
+       case PERIPH_ID_I2C5:
+       case PERIPH_ID_I2C6:
+       case PERIPH_ID_I2C7:
+               exynos4_i2c_config(peripheral, flags);
+               break;
        default:
                debug("%s: invalid peripheral %d", __func__, peripheral);
                return -1;
index 1f2fa02..0efc80d 100644 (file)
@@ -25,9 +25,8 @@ include $(TOPDIR)/config.mk
 
 LIB    = $(obj)libomap-common.o
 
-SOBJS  := reset.o
-
-COBJS  := timer.o
+COBJS  := reset.o
+COBJS  += timer.o
 COBJS  += utils.o
 
 ifneq ($(CONFIG_OMAP44XX)$(CONFIG_OMAP54XX),)
index 0f19141..2b584e0 100644 (file)
@@ -21,6 +21,7 @@
 #include <asm/omap_common.h>
 #include <asm/arch/omap.h>
 #include <asm/arch/mmc_host_def.h>
+#include <asm/arch/sys_proto.h>
 
 /*
  * This is used to verify if the configuration header
index 30dcf1b..88253cf 100644 (file)
@@ -33,6 +33,8 @@
 #include <asm/utils.h>
 #include <linux/compiler.h>
 
+static int emif1_enabled = -1, emif2_enabled = -1;
+
 void set_lpmode_selfrefresh(u32 base)
 {
        struct emif_reg_struct *emif = (struct emif_reg_struct *)base;
@@ -1109,6 +1111,7 @@ void emif_post_init_config(u32 base)
 void dmm_init(u32 base)
 {
        const struct dmm_lisa_map_regs *lisa_map_regs;
+       u32 i, section, valid;
 
 #ifdef CONFIG_SYS_EMIF_PRECALCULATED_TIMING_REGS
        emif_get_dmm_regs(&lisa_map_regs);
@@ -1216,6 +1219,29 @@ void dmm_init(u32 base)
                writel(lisa_map_regs->dmm_lisa_map_0,
                        &hw_lisa_map_regs->dmm_lisa_map_0);
        }
+
+       /*
+        * EMIF should be configured only when
+        * memory is mapped on it. Using emif1_enabled
+        * and emif2_enabled variables for this.
+        */
+       emif1_enabled = 0;
+       emif2_enabled = 0;
+       for (i = 0; i < 4; i++) {
+               section = __raw_readl(DMM_BASE + i*4);
+               valid = (section & EMIF_SDRC_MAP_MASK) >>
+                       (EMIF_SDRC_MAP_SHIFT);
+               if (valid == 3) {
+                       emif1_enabled = 1;
+                       emif2_enabled = 1;
+                       break;
+               } else if (valid == 1) {
+                       emif1_enabled = 1;
+               } else if (valid == 2) {
+                       emif2_enabled = 1;
+               }
+       }
+
 }
 
 /*
@@ -1255,15 +1281,20 @@ void sdram_init(void)
                        writel(CM_DLL_CTRL_NO_OVERRIDE, &prcm->cm_dll_ctrl);
        }
 
-       do_sdram_init(EMIF1_BASE);
-       do_sdram_init(EMIF2_BASE);
-
        if (!in_sdram)
                dmm_init(DMM_BASE);
 
+       if (emif1_enabled)
+               do_sdram_init(EMIF1_BASE);
+
+       if (emif2_enabled)
+               do_sdram_init(EMIF2_BASE);
+
        if (!(in_sdram || warm_reset())) {
-               emif_post_init_config(EMIF1_BASE);
-               emif_post_init_config(EMIF2_BASE);
+               if (emif1_enabled)
+                       emif_post_init_config(EMIF1_BASE);
+               if (emif2_enabled)
+                       emif_post_init_config(EMIF2_BASE);
        }
 
        /* for the shadow registers to take effect */
index ac597be..de167ee 100644 (file)
@@ -38,6 +38,7 @@ endif
 COBJS-$(CONFIG_DRIVER_TI_EMAC) += emac.o
 COBJS-$(CONFIG_EMIF4)  += emif4.o
 COBJS-$(CONFIG_SDRC)   += sdrc.o
+COBJS-$(CONFIG_USB_MUSB_AM35X) += am35x_musb.o
 
 SRCS   := $(SOBJS:.o=.S) $(COBJS:.o=.c)
 OBJS   := $(addprefix $(obj),$(COBJS) $(COBJS-y) $(SOBJS))
diff --git a/arch/arm/cpu/armv7/omap3/am35x_musb.c b/arch/arm/cpu/armv7/omap3/am35x_musb.c
new file mode 100644 (file)
index 0000000..7183c4f
--- /dev/null
@@ -0,0 +1,75 @@
+/*
+ * This file configures the internal USB PHY in AM35X.
+ *
+ * Copyright (C) 2012 Ilya Yanok <ilya.yanok@gmail.com>
+ *
+ * Based on omap_phy_internal.c code from Linux by
+ * Hema HK <hemahk@ti.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc.
+ *
+ */
+
+#include <common.h>
+#include <asm/io.h>
+#include <asm/arch/am35x_def.h>
+
+void am35x_musb_reset(void)
+{
+       /* Reset the musb interface */
+       clrsetbits_le32(&am35x_scm_general_regs->ip_sw_reset,
+                       0, USBOTGSS_SW_RST);
+       clrsetbits_le32(&am35x_scm_general_regs->ip_sw_reset,
+                       USBOTGSS_SW_RST, 0);
+}
+
+void am35x_musb_phy_power(u8 on)
+{
+       unsigned long start = get_timer(0);
+
+       if (on) {
+               /*
+                * Start the on-chip PHY and its PLL.
+                */
+               clrsetbits_le32(&am35x_scm_general_regs->devconf2,
+                               CONF2_RESET | CONF2_PHYPWRDN | CONF2_OTGPWRDN,
+                               CONF2_PHY_PLLON);
+
+               debug("Waiting for PHY clock good...\n");
+               while (!(readl(&am35x_scm_general_regs->devconf2)
+                               & CONF2_PHYCLKGD)) {
+
+                       if (get_timer(start) > CONFIG_SYS_HZ / 10) {
+                               printf("musb PHY clock good timed out\n");
+                               break;
+                       }
+               }
+       } else {
+               /*
+                * Power down the on-chip PHY.
+                */
+               clrsetbits_le32(&am35x_scm_general_regs->devconf2,
+                               CONF2_PHY_PLLON,
+                               CONF2_PHYPWRDN | CONF2_OTGPWRDN);
+       }
+}
+
+void am35x_musb_clear_irq(void)
+{
+       clrsetbits_le32(&am35x_scm_general_regs->lvl_intr_clr,
+                       0, USBOTGSS_INT_CLR);
+       readl(&am35x_scm_general_regs->lvl_intr_clr);
+}
+
index f3cd81a..89c587e 100644 (file)
@@ -478,7 +478,7 @@ void omap3_outer_cache_disable(void)
         */
        omap3_update_aux_cr(0, 0x2);
 }
-#endif
+#endif /* !CONFIG_SYS_L2CACHE_OFF */
 
 #ifndef CONFIG_SYS_DCACHE_OFF
 void enable_caches(void)
@@ -486,4 +486,4 @@ void enable_caches(void)
        /* Enable D-cache. I-cache is already enabled in start.S */
        dcache_enable();
 }
-#endif
+#endif /* !CONFIG_SYS_DCACHE_OFF */
index 2fe5ac7..d04a5a1 100644 (file)
@@ -42,14 +42,7 @@ static const u32 gpmc_m_nand[GPMC_MAX_REG] = {
        M_NAND_GPMC_CONFIG5,
        M_NAND_GPMC_CONFIG6, 0
 };
-
-#if defined(CONFIG_ENV_IS_IN_NAND)
-#define GPMC_CS 0
-#else
-#define GPMC_CS 1
-#endif
-
-#endif
+#endif /* CONFIG_CMD_NAND */
 
 #if defined(CONFIG_CMD_ONENAND)
 static const u32 gpmc_onenand[GPMC_MAX_REG] = {
@@ -60,14 +53,7 @@ static const u32 gpmc_onenand[GPMC_MAX_REG] = {
        ONENAND_GPMC_CONFIG5,
        ONENAND_GPMC_CONFIG6, 0
 };
-
-#if defined(CONFIG_ENV_IS_IN_ONENAND)
-#define GPMC_CS 0
-#else
-#define GPMC_CS 1
-#endif
-
-#endif
+#endif /* CONFIG_CMD_ONENAND */
 
 /********************************************************
  *  mem_ok() - test used to see if timings are correct
index f6d9b97..e32bf11 100644 (file)
@@ -113,18 +113,18 @@ u32 get_sdr_cs_offset(u32 cs)
  *  - Test CS to make sure it's OK for use
  */
 static void write_sdrc_timings(u32 cs, struct sdrc_actim *sdrc_actim_base,
-               u32 mcfg, u32 ctrla, u32 ctrlb, u32 rfr_ctrl, u32 mr)
+                       struct board_sdrc_timings *timings)
 {
        /* Setup timings we got from the board. */
-       writel(mcfg, &sdrc_base->cs[cs].mcfg);
-       writel(ctrla, &sdrc_actim_base->ctrla);
-       writel(ctrlb, &sdrc_actim_base->ctrlb);
-       writel(rfr_ctrl, &sdrc_base->cs[cs].rfr_ctrl);
+       writel(timings->mcfg, &sdrc_base->cs[cs].mcfg);
+       writel(timings->ctrla, &sdrc_actim_base->ctrla);
+       writel(timings->ctrlb, &sdrc_actim_base->ctrlb);
+       writel(timings->rfr_ctrl, &sdrc_base->cs[cs].rfr_ctrl);
        writel(CMD_NOP, &sdrc_base->cs[cs].manual);
        writel(CMD_PRECHARGE, &sdrc_base->cs[cs].manual);
        writel(CMD_AUTOREFRESH, &sdrc_base->cs[cs].manual);
        writel(CMD_AUTOREFRESH, &sdrc_base->cs[cs].manual);
-       writel(mr, &sdrc_base->cs[cs].mr);
+       writel(timings->mr, &sdrc_base->cs[cs].mr);
 
        /*
         * Test ram in this bank
@@ -143,7 +143,7 @@ static void write_sdrc_timings(u32 cs, struct sdrc_actim *sdrc_actim_base,
 void do_sdrc_init(u32 cs, u32 early)
 {
        struct sdrc_actim *sdrc_actim_base0, *sdrc_actim_base1;
-       u32 mcfg, ctrla, ctrlb, rfr_ctrl, mr;
+       struct board_sdrc_timings timings;
 
        sdrc_actim_base0 = (struct sdrc_actim *)SDRC_ACTIM_CTRL0_BASE;
        sdrc_actim_base1 = (struct sdrc_actim *)SDRC_ACTIM_CTRL1_BASE;
@@ -158,7 +158,7 @@ void do_sdrc_init(u32 cs, u32 early)
         * setup CS1.
         */
 #ifdef CONFIG_SPL_BUILD
-       get_board_mem_timings(&mcfg, &ctrla, &ctrlb, &rfr_ctrl, &mr);
+       get_board_mem_timings(&timings);
 #endif
        if (early) {
                /* reset sdrc controller */
@@ -177,11 +177,9 @@ void do_sdrc_init(u32 cs, u32 early)
                writel(ENADLL | DLLPHASE_90, &sdrc_base->dlla_ctrl);
                sdelay(0x20000);
 #ifdef CONFIG_SPL_BUILD
-               write_sdrc_timings(CS0, sdrc_actim_base0, mcfg, ctrla, ctrlb,
-                               rfr_ctrl, mr);
+               write_sdrc_timings(CS0, sdrc_actim_base0, &timings);
                make_cs1_contiguous();
-               write_sdrc_timings(CS1, sdrc_actim_base1, mcfg, ctrla, ctrlb,
-                               rfr_ctrl, mr);
+               write_sdrc_timings(CS1, sdrc_actim_base1, &timings);
 #endif
 
        }
@@ -193,14 +191,12 @@ void do_sdrc_init(u32 cs, u32 early)
         * so we may be asked now to setup CS1.
         */
        if (cs == CS1) {
-               mcfg = readl(&sdrc_base->cs[CS0].mcfg),
-               rfr_ctrl = readl(&sdrc_base->cs[CS0].rfr_ctrl);
-               ctrla = readl(&sdrc_actim_base0->ctrla),
-               ctrlb = readl(&sdrc_actim_base0->ctrlb);
-               mr = readl(&sdrc_base->cs[CS0].mr);
-               write_sdrc_timings(cs, sdrc_actim_base1, mcfg, ctrla, ctrlb,
-                               rfr_ctrl, mr);
-
+               timings.mcfg = readl(&sdrc_base->cs[CS0].mcfg),
+               timings.rfr_ctrl = readl(&sdrc_base->cs[CS0].rfr_ctrl);
+               timings.ctrla = readl(&sdrc_actim_base0->ctrla);
+               timings.ctrlb = readl(&sdrc_actim_base0->ctrlb);
+               timings.mr = readl(&sdrc_base->cs[CS0].mr);
+               write_sdrc_timings(cs, sdrc_actim_base1, &timings);
        }
 }
 
index 5bd0a88..12c5803 100644 (file)
@@ -44,7 +44,7 @@
  */
 #define printf(fmt, args...)
 #define puts(s)
-#endif
+#endif /* !CONFIG_SPL_BUILD */
 
 struct omap4_prcm_regs *const prcm = (struct omap4_prcm_regs *)0x4A004100;
 
index 2c34e48..f4123aa 100644 (file)
@@ -116,7 +116,7 @@ void do_io_settings(void)
        if ((omap4_rev < OMAP4460_ES1_0) || !readl(&ctrl->control_efuse_2))
                writel(CONTROL_EFUSE_2_OVERRIDE, &ctrl->control_efuse_2);
 }
-#endif
+#endif /* CONFIG_SPL_BUILD */
 
 /* dummy fuction for omap4 */
 void config_data_eye_leveling_samples(u32 emif_base)
@@ -182,4 +182,4 @@ void v7_outer_cache_disable(void)
 {
        set_pl310_ctrl_reg(0);
 }
-#endif
+#endif /* !CONFIG_SYS_L2CACHE_OFF */
index 7df97c5..dcc1f83 100644 (file)
@@ -155,12 +155,7 @@ reset:
        bl      cpu_init_crit
 #endif
 
-/* Set stackpointer in internal RAM to call board_init_f */
-call_board_init_f:
-       ldr     sp, =(CONFIG_SYS_INIT_SP_ADDR)
-       bic     sp, sp, #7 /* 8-byte alignment for ABI compliance */
-       ldr     r0,=0x00000000
-       bl      board_init_f
+       bl      _main
 
 /*------------------------------------------------------------------------------*/
 
@@ -177,14 +172,10 @@ ENTRY(relocate_code)
        mov     r5, r1  /* save addr of gd */
        mov     r6, r2  /* save addr of destination */
 
-       /* Set up the stack                                                 */
-stack_setup:
-       mov     sp, r4
-
        adr     r0, _start
        cmp     r0, r6
        moveq   r9, #0          /* no relocation. relocation offset(r9) = 0 */
-       beq     clear_bss               /* skip relocation */
+       beq     relocate_done           /* skip relocation */
        mov     r1, r6                  /* r1 <- scratch for copy_loop */
        ldr     r3, _image_copy_end_ofs
        add     r2, r0, r3              /* r2 <- source end address         */
@@ -233,34 +224,22 @@ fixnext:
        add     r2, r2, #8              /* each rel.dyn entry is 8 bytes */
        cmp     r2, r3
        blo     fixloop
-       b       clear_bss
+
+relocate_done:
+
+       bx      lr
+
 _rel_dyn_start_ofs:
        .word __rel_dyn_start - _start
 _rel_dyn_end_ofs:
        .word __rel_dyn_end - _start
 _dynsym_start_ofs:
        .word __dynsym_start - _start
+ENDPROC(relocate_code)
 
-clear_bss:
-       ldr     r0, _bss_start_ofs
-       ldr     r1, _bss_end_ofs
-       mov     r4, r6                  /* reloc addr */
-       add     r0, r0, r4
-       add     r1, r1, r4
-       mov     r2, #0x00000000         /* clear                            */
-
-clbss_l:cmp    r0, r1                  /* clear loop... */
-       bhs     clbss_e                 /* if reached end of bss, exit */
-       str     r2, [r0]
-       add     r0, r0, #4
-       b       clbss_l
-clbss_e:
+#endif
 
-/*
- * We are done. Do not return, instead branch to second part of board
- * initialization, now running from RAM.
- */
-jump_2_ram:
+ENTRY(c_runtime_cpu_setup)
 /*
  * If I-cache is enabled invalidate it
  */
@@ -279,20 +258,9 @@ jump_2_ram:
        mcr     p15, 0, r0, c12, c0, 0  @Set VBAR
 #endif /* !Tegra20 */
 
-       ldr     r0, _board_init_r_ofs
-       adr     r1, _start
-       add     lr, r0, r1
-       add     lr, lr, r9
-       /* setup parameters for board_init_r */
-       mov     r0, r5          /* gd_t */
-       mov     r1, r6          /* dest_addr */
-       /* jump to it ... */
-       mov     pc, lr
-
-_board_init_r_ofs:
-       .word board_init_r - _start
-ENDPROC(relocate_code)
-#endif
+       bx      lr
+
+ENDPROC(c_runtime_cpu_setup)
 
 /*************************************************************************
  *
index c12f1a7..efb5a40 100644 (file)
@@ -245,12 +245,7 @@ reset:
        orr     r0,r0,#0x13
        msr     cpsr,r0
 
-/* Set initial stackpointer in SDRAM to call board_init_f */
-call_board_init_f:
-       ldr     sp, =(CONFIG_SYS_INIT_SP_ADDR)
-       bic     sp, sp, #7 /* 8-byte alignment for ABI compliance */
-       ldr     r0,=0x00000000
-       bl      board_init_f
+       bl      _main
 
 /*------------------------------------------------------------------------------*/
 
@@ -267,14 +262,10 @@ relocate_code:
        mov     r5, r1  /* save addr of gd */
        mov     r6, r2  /* save addr of destination */
 
-       /* Set up the stack                                                 */
-stack_setup:
-       mov     sp, r4
-
        adr     r0, _start
        cmp     r0, r6
        moveq   r9, #0          /* no relocation. relocation offset(r9) = 0 */
-       beq     clear_bss               /* skip relocation */
+       beq     relocate_done           /* skip relocation */
        mov     r1, r6                  /* r1 <- scratch for copy_loop */
        ldr     r3, _bss_start_ofs
        add     r2, r0, r3              /* r2 <- source end address         */
@@ -326,42 +317,9 @@ fixnext:
        blo     fixloop
 #endif
 
-clear_bss:
-#ifndef CONFIG_SPL_BUILD
-       ldr     r0, _bss_start_ofs
-       ldr     r1, _bss_end_ofs
-       mov     r4, r6                  /* reloc addr */
-       add     r0, r0, r4
-       add     r1, r1, r4
-       mov     r2, #0x00000000         /* clear                            */
-
-clbss_l:cmp    r0, r1                  /* clear loop... */
-       bhs     clbss_e                 /* if reached end of bss, exit */
-       str     r2, [r0]
-       add     r0, r0, #4
-       b       clbss_l
-clbss_e:
-
-       bl coloured_LED_init
-       bl red_led_on
-#endif
+relocate_done:
 
-/*
- * We are done. Do not return, instead branch to second part of board
- * initialization, now running from RAM.
- */
-       ldr     r0, _board_init_r_ofs
-       adr     r1, _start
-       add     lr, r0, r1
-       add     lr, lr, r9
-       /* setup parameters for board_init_r */
-       mov     r0, r5          /* gd_t */
-       mov     r1, r6          /* dest_addr */
-       /* jump to it ... */
-       mov     pc, lr
-
-_board_init_r_ofs:
-       .word board_init_r - _start
+       bx      lr
 
 _rel_dyn_start_ofs:
        .word __rel_dyn_start - _start
@@ -370,6 +328,11 @@ _rel_dyn_end_ofs:
 _dynsym_start_ofs:
        .word __dynsym_start - _start
 
+       .globl  c_runtime_cpu_setup
+c_runtime_cpu_setup:
+
+       bx      lr
+
 /****************************************************************************/
 /*                                                                         */
 /* Interrupt handling                                                      */
index 536cf5c..72af869 100644 (file)
@@ -164,12 +164,7 @@ reset:
        bl      lock_cache_for_stack
 #endif
 
-/* Set stackpointer in internal RAM to call board_init_f */
-call_board_init_f:
-       ldr     sp, =(CONFIG_SYS_INIT_SP_ADDR)
-       bic     sp, sp, #7 /* 8-byte alignment for ABI compliance */
-       ldr     r0, =0x00000000
-       bl      board_init_f
+       bl      _main
 
 /*------------------------------------------------------------------------------*/
 #ifndef CONFIG_SPL_BUILD
@@ -186,10 +181,6 @@ relocate_code:
        mov     r5, r1  /* save addr of gd */
        mov     r6, r2  /* save addr of destination */
 
-       /* Set up the stack                                                 */
-stack_setup:
-       mov     sp, r4
-
 /* Disable the Dcache RAM lock for stack now */
 #ifdef CONFIG_CPU_PXA25X
        bl      cpu_init_crit
@@ -198,7 +189,7 @@ stack_setup:
        adr     r0, _start
        cmp     r0, r6
        moveq   r9, #0          /* no relocation. relocation offset(r9) = 0 */
-       beq     clear_bss               /* skip relocation */
+       beq     relocate_done           /* skip relocation */
        mov     r1, r6                  /* r1 <- scratch for copy_loop */
        ldr     r3, _bss_start_ofs
        add     r2, r0, r3              /* r2 <- source end address         */
@@ -250,48 +241,9 @@ fixnext:
        blo     fixloop
 #endif
 
-clear_bss:
-#ifndef CONFIG_SPL_BUILD
-       ldr     r0, _bss_start_ofs
-       ldr     r1, _bss_end_ofs
-       mov     r4, r6                  /* reloc addr */
-       add     r0, r0, r4
-       add     r1, r1, r4
-       mov     r2, #0x00000000         /* clear                            */
-
-clbss_l:cmp    r0, r1                  /* clear loop... */
-       bhs     clbss_e                 /* if reached end of bss, exit */
-       str     r2, [r0]
-       add     r0, r0, #4
-       b       clbss_l
-clbss_e:
-#endif /* #ifndef CONFIG_SPL_BUILD */
+relocate_done:
 
-/*
- * We are done. Do not return, instead branch to second part of board
- * initialization, now running from RAM.
- */
-#ifdef CONFIG_ONENAND_SPL
-       ldr     r0, _onenand_boot_ofs
-       mov     pc, r0
-
-_onenand_boot_ofs:
-       .word onenand_boot
-#else
-jump_2_ram:
-       ldr     r0, _board_init_r_ofs
-       ldr     r1, _TEXT_BASE
-       add     lr, r0, r1
-       add     lr, lr, r9
-       /* setup parameters for board_init_r */
-       mov     r0, r5          /* gd_t */
-       mov     r1, r6          /* dest_addr */
-       /* jump to it ... */
-       mov     pc, lr
-
-_board_init_r_ofs:
-       .word board_init_r - _start
-#endif
+       bx      lr
 
 _rel_dyn_start_ofs:
        .word __rel_dyn_start - _start
@@ -299,7 +251,14 @@ _rel_dyn_end_ofs:
        .word __rel_dyn_end - _start
 _dynsym_start_ofs:
        .word __dynsym_start - _start
+
 #endif
+
+       .globl  c_runtime_cpu_setup
+c_runtime_cpu_setup:
+
+       bx      lr
+
 /*
  *************************************************************************
  *
index 323b923..4528c91 100644 (file)
@@ -128,12 +128,7 @@ reset:
        bl      lowlevel_init
 #endif
 
-/* Set stackpointer in internal RAM to call board_init_f */
-call_board_init_f:
-       ldr     sp, =(CONFIG_SYS_INIT_SP_ADDR)
-       bic     sp, sp, #7 /* 8-byte alignment for ABI compliance */
-       ldr     r0,=0x00000000
-       bl      board_init_f
+       bl      _main
 
 /*------------------------------------------------------------------------------*/
 
@@ -150,14 +145,10 @@ relocate_code:
        mov     r5, r1  /* save addr of gd */
        mov     r6, r2  /* save addr of destination */
 
-       /* Set up the stack                                                 */
-stack_setup:
-       mov     sp, r4
-
        adr     r0, _start
        cmp     r0, r6
        moveq   r9, #0          /* no relocation. relocation offset(r9) = 0 */
-       beq     clear_bss               /* skip relocation */
+       beq     relocate_done           /* skip relocation */
        mov     r1, r6                  /* r1 <- scratch for copy_loop */
        ldr     r3, _bss_start_ofs
        add     r2, r0, r3              /* r2 <- source end address         */
@@ -209,42 +200,9 @@ fixnext:
        blo     fixloop
 #endif
 
-clear_bss:
-#ifndef CONFIG_SPL_BUILD
-       ldr     r0, _bss_start_ofs
-       ldr     r1, _bss_end_ofs
-       mov     r4, r6                  /* reloc addr */
-       add     r0, r0, r4
-       add     r1, r1, r4
-       mov     r2, #0x00000000         /* clear                            */
-
-clbss_l:cmp    r0, r1                  /* clear loop... */
-       bhs     clbss_e                 /* if reached end of bss, exit */
-       str     r2, [r0]
-       add     r0, r0, #4
-       b       clbss_l
-clbss_e:
-
-       bl coloured_LED_init
-       bl red_led_on
-#endif
+relocate_done:
 
-/*
- * We are done. Do not return, instead branch to second part of board
- * initialization, now running from RAM.
- */
-       ldr     r0, _board_init_r_ofs
-       adr     r1, _start
-       add     lr, r0, r1
-       add     lr, lr, r9
-       /* setup parameters for board_init_r */
-       mov     r0, r5          /* gd_t */
-       mov     r1, r6          /* dest_addr */
-       /* jump to it ... */
-       mov     pc, lr
-
-_board_init_r_ofs:
-       .word board_init_r - _start
+       bx      lr
 
 _rel_dyn_start_ofs:
        .word __rel_dyn_start - _start
@@ -253,6 +211,11 @@ _rel_dyn_end_ofs:
 _dynsym_start_ofs:
        .word __dynsym_start - _start
 
+       .globl  c_runtime_cpu_setup
+c_runtime_cpu_setup:
+
+       bx      lr
+
 /*
  *************************************************************************
  *
index 1ea92d1..3144299 100644 (file)
@@ -132,12 +132,7 @@ reset:
        bl      cpu_init_crit
 #endif
 
-/* Set stackpointer in internal RAM to call board_init_f */
-call_board_init_f:
-       ldr     sp, =(CONFIG_SYS_INIT_SP_ADDR)
-       bic     sp, sp, #7 /* 8-byte alignment for ABI compliance */
-       ldr     r0,=0x00000000
-       bl      board_init_f
+       bl      _main
 
 /*------------------------------------------------------------------------------*/
 
@@ -154,14 +149,10 @@ relocate_code:
        mov     r5, r1  /* save addr of gd */
        mov     r6, r2  /* save addr of destination */
 
-       /* Set up the stack                                                 */
-stack_setup:
-       mov     sp, r4
-
        adr     r0, _start
        cmp     r0, r6
        moveq   r9, #0          /* no relocation. relocation offset(r9) = 0 */
-       beq     clear_bss               /* skip relocation */
+       beq     relocate_done           /* skip relocation */
        mov     r1, r6                  /* r1 <- scratch for copy_loop */
        ldr     r3, _bss_start_ofs
        add     r2, r0, r3              /* r2 <- source end address         */
@@ -213,40 +204,10 @@ fixnext:
        blo     fixloop
 #endif
 
-clear_bss:
-#ifndef CONFIG_SPL_BUILD
-       ldr     r0, _bss_start_ofs
-       ldr     r1, _bss_end_ofs
-       mov     r4, r6                  /* reloc addr */
-       add     r0, r0, r4
-       add     r1, r1, r4
-       mov     r2, #0x00000000         /* clear                            */
-
-clbss_l:cmp    r0, r1                  /* clear loop... */
-       bhs     clbss_e                 /* if reached end of bss, exit */
-       str     r2, [r0]
-       add     r0, r0, #4
-       b       clbss_l
-clbss_e:
-#endif
+relocate_done:
 
-/*
- * We are done. Do not return, instead branch to second part of board
- * initialization, now running from RAM.
- */
-       ldr     r0, _board_init_r_ofs
-       adr     r1, _start
-       add     lr, r0, r1
-       add     lr, lr, r9
-       /* setup parameters for board_init_r */
-       mov     r0, r5          /* gd_t */
-       mov     r1, r6          /* dest_addr */
-       /* jump to it ... */
        mov     pc, lr
 
-_board_init_r_ofs:
-       .word board_init_r - _start
-
 _rel_dyn_start_ofs:
        .word __rel_dyn_start - _start
 _rel_dyn_end_ofs:
@@ -254,6 +215,11 @@ _rel_dyn_end_ofs:
 _dynsym_start_ofs:
        .word __dynsym_start - _start
 
+       .globl  c_runtime_cpu_setup
+c_runtime_cpu_setup:
+
+       mov     pc, lr
+
 /*
  *************************************************************************
  *
index 819fd2f..16e8a80 100644 (file)
 
 #ifndef __KERNEL_STRICT_NAMES
 #ifndef __ASSEMBLY__
+struct gpmc_cs {
+       u32 config1;            /* 0x00 */
+       u32 config2;            /* 0x04 */
+       u32 config3;            /* 0x08 */
+       u32 config4;            /* 0x0C */
+       u32 config5;            /* 0x10 */
+       u32 config6;            /* 0x14 */
+       u32 config7;            /* 0x18 */
+       u32 nand_cmd;           /* 0x1C */
+       u32 nand_adr;           /* 0x20 */
+       u32 nand_dat;           /* 0x24 */
+       u8 res[8];              /* blow up to 0x30 byte */
+};
+
+struct bch_res_0_3 {
+       u32 bch_result_x[4];
+};
+
+struct gpmc {
+       u8 res1[0x10];
+       u32 sysconfig;          /* 0x10 */
+       u8 res2[0x4];
+       u32 irqstatus;          /* 0x18 */
+       u32 irqenable;          /* 0x1C */
+       u8 res3[0x20];
+       u32 timeout_control;    /* 0x40 */
+       u8 res4[0xC];
+       u32 config;             /* 0x50 */
+       u32 status;             /* 0x54 */
+       u8 res5[0x8];           /* 0x58 */
+       struct gpmc_cs cs[8];   /* 0x60, 0x90, .. */
+       u8 res6[0x14];          /* 0x1E0 */
+       u32 ecc_config;         /* 0x1F4 */
+       u32 ecc_control;        /* 0x1F8 */
+       u32 ecc_size_config;    /* 0x1FC */
+       u32 ecc1_result;        /* 0x200 */
+       u32 ecc2_result;        /* 0x204 */
+       u32 ecc3_result;        /* 0x208 */
+       u32 ecc4_result;        /* 0x20C */
+       u32 ecc5_result;        /* 0x210 */
+       u32 ecc6_result;        /* 0x214 */
+       u32 ecc7_result;        /* 0x218 */
+       u32 ecc8_result;        /* 0x21C */
+       u32 ecc9_result;        /* 0x220 */
+       u8 res7[12];            /* 0x224 */
+       u32 testmomde_ctrl;     /* 0x230 */
+       u8 res8[12];            /* 0x234 */
+       struct bch_res_0_3 bch_result_0_3[2];   /* 0x240 */
+};
+
+/* Used for board specific gpmc initialization */
+extern struct gpmc *gpmc_cfg;
+
 /* Encapsulating core pll registers */
 struct cm_wkuppll {
        unsigned int wkclkstctrl;       /* offset 0x00 */
@@ -82,7 +135,8 @@ struct cm_wkuppll {
        unsigned int clkseldpllcore;    /* offset 0x68 */
        unsigned int resv9[1];
        unsigned int idlestdpllper;     /* offset 0x70 */
-       unsigned int resv10[3];
+       unsigned int resv10[2];
+       unsigned int clkdcoldodpllper;  /* offset 0x7c */
        unsigned int divm4dpllcore;     /* offset 0x80 */
        unsigned int divm5dpllcore;     /* offset 0x84 */
        unsigned int clkmoddpllmpu;     /* offset 0x88 */
@@ -275,12 +329,16 @@ struct ctrl_stat {
 /* Control Device Register */
 struct ctrl_dev {
        unsigned int deviceid;          /* offset 0x00 */
-       unsigned int resv1[11];
+       unsigned int resv1[7];
+       unsigned int usb_ctrl0;         /* offset 0x20 */
+       unsigned int resv2;
+       unsigned int usb_ctrl1;         /* offset 0x28 */
+       unsigned int resv3;
        unsigned int macid0l;           /* offset 0x30 */
        unsigned int macid0h;           /* offset 0x34 */
        unsigned int macid1l;           /* offset 0x38 */
        unsigned int macid1h;           /* offset 0x3c */
-       unsigned int resv2[4];
+       unsigned int resv4[4];
        unsigned int miisel;            /* offset 0x50 */
 };
 #endif /* __ASSEMBLY__ */
diff --git a/arch/arm/include/asm/arch-am33xx/elm.h b/arch/arm/include/asm/arch-am33xx/elm.h
new file mode 100644 (file)
index 0000000..e80f7d4
--- /dev/null
@@ -0,0 +1,93 @@
+/*
+ * (C) Copyright 2010-2011 Texas Instruments, <www.ti.com>
+ * Mansoor Ahamed <mansoor.ahamed@ti.com>
+ *
+ * Derived from work done by Rohit Choraria <rohitkc@ti.com> for omap3
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+#ifndef __ASM_ARCH_ELM_H
+#define __ASM_ARCH_ELM_H
+/*
+ * ELM Module Registers
+ */
+
+/* ELM registers bit fields */
+#define ELM_SYSCONFIG_SOFTRESET_MASK                   (0x2)
+#define ELM_SYSCONFIG_SOFTRESET                        (0x2)
+#define ELM_SYSSTATUS_RESETDONE_MASK                   (0x1)
+#define ELM_SYSSTATUS_RESETDONE                        (0x1)
+#define ELM_LOCATION_CONFIG_ECC_BCH_LEVEL_MASK         (0x3)
+#define ELM_LOCATION_CONFIG_ECC_SIZE_MASK              (0x7FF0000)
+#define ELM_LOCATION_CONFIG_ECC_SIZE_POS               (16)
+#define ELM_SYNDROME_FRAGMENT_6_SYNDROME_VALID         (0x00010000)
+#define ELM_LOCATION_STATUS_ECC_CORRECTABLE_MASK       (0x100)
+#define ELM_LOCATION_STATUS_ECC_NB_ERRORS_MASK         (0x1F)
+
+#ifndef __ASSEMBLY__
+
+enum bch_level {
+       BCH_4_BIT = 0,
+       BCH_8_BIT,
+       BCH_16_BIT
+};
+
+
+/* BCH syndrome registers */
+struct syndrome {
+       u32 syndrome_fragment_x[7];     /* 0x400, 0x404.... 0x418 */
+       u8 res1[36];                    /* 0x41c */
+};
+
+/* BCH error status & location register */
+struct location {
+       u32 location_status;            /* 0x800 */
+       u8 res1[124];                   /* 0x804 */
+       u32 error_location_x[16];       /* 0x880.... */
+       u8 res2[64];                    /* 0x8c0 */
+};
+
+/* BCH ELM register map - do not try to allocate memmory for this structure.
+ * We have used plenty of reserved variables to fill the slots in the ELM
+ * register memory map.
+ * Directly initialize the struct pointer to ELM base address.
+ */
+struct elm {
+       u32 rev;                                /* 0x000 */
+       u8 res1[12];                            /* 0x004 */
+       u32 sysconfig;                          /* 0x010 */
+       u32 sysstatus;                          /* 0x014 */
+       u32 irqstatus;                          /* 0x018 */
+       u32 irqenable;                          /* 0x01c */
+       u32 location_config;                    /* 0x020 */
+       u8 res2[92];                            /* 0x024 */
+       u32 page_ctrl;                          /* 0x080 */
+       u8 res3[892];                           /* 0x084 */
+       struct  syndrome syndrome_fragments[8]; /* 0x400 */
+       u8 res4[512];                           /* 0x600 */
+       struct location  error_location[8];     /* 0x800 */
+};
+
+int elm_check_error(u8 *syndrome, u32 nibbles, u32 *error_count,
+               u32 *error_locations);
+int elm_config(enum bch_level level);
+void elm_reset(void);
+void elm_init(void);
+#endif /* __ASSEMBLY__ */
+#endif /* __ASM_ARCH_ELM_H */
index 5bd4bc8..6dd3296 100644 (file)
@@ -80,6 +80,9 @@
 #define DDRPHY_0_CONFIG_BASE           (CTRL_BASE + 0x1400)
 #define DDRPHY_CONFIG_BASE             DDRPHY_0_CONFIG_BASE
 
+/* GPMC Base address */
+#define GPMC_BASE                      0x50000000
+
 /* CPSW Config space */
 #define AM335X_CPSW_BASE               0x4A100000
 #define AM335X_CPSW_MDIO_BASE          0x4A101000
@@ -87,4 +90,8 @@
 /* RTC base address */
 #define AM335X_RTC_BASE                        0x44E3E000
 
+/* OTG */
+#define AM335X_USB0_OTG_BASE           0x47401000
+#define AM335X_USB1_OTG_BASE           0x47401800
+
 #endif /* __AM33XX_HARDWARE_H */
diff --git a/arch/arm/include/asm/arch-am33xx/mem.h b/arch/arm/include/asm/arch-am33xx/mem.h
new file mode 100644 (file)
index 0000000..c3bf74e
--- /dev/null
@@ -0,0 +1,83 @@
+/*
+ * (C) Copyright 2006-2008
+ * Texas Instruments, <www.ti.com>
+ *
+ * Author
+ *             Mansoor Ahamed <mansoor.ahamed@ti.com>
+ *
+ * Initial Code from:
+ *             Richard Woodruff <r-woodruff2@ti.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndef _MEM_H_
+#define _MEM_H_
+
+/*
+ * GPMC settings -
+ * Definitions is as per the following format
+ * #define <PART>_GPMC_CONFIG<x> <value>
+ * Where:
+ * PART is the part name e.g. STNOR - Intel Strata Flash
+ * x is GPMC config registers from 1 to 6 (there will be 6 macros)
+ * Value is corresponding value
+ *
+ * For every valid PRCM configuration there should be only one definition of
+ * the same. if values are independent of the board, this definition will be
+ * present in this file if values are dependent on the board, then this should
+ * go into corresponding mem-boardName.h file
+ *
+ * Currently valid part Names are (PART):
+ * M_NAND - Micron NAND
+ */
+#define GPMC_SIZE_256M         0x0
+#define GPMC_SIZE_128M         0x8
+#define GPMC_SIZE_64M          0xC
+#define GPMC_SIZE_32M          0xE
+#define GPMC_SIZE_16M          0xF
+
+#define M_NAND_GPMC_CONFIG1    0x00000800
+#define M_NAND_GPMC_CONFIG2    0x001e1e00
+#define M_NAND_GPMC_CONFIG3    0x001e1e00
+#define M_NAND_GPMC_CONFIG4    0x16051807
+#define M_NAND_GPMC_CONFIG5    0x00151e1e
+#define M_NAND_GPMC_CONFIG6    0x16000f80
+#define M_NAND_GPMC_CONFIG7    0x00000008
+
+/* max number of GPMC Chip Selects */
+#define GPMC_MAX_CS            8
+/* max number of GPMC regs */
+#define GPMC_MAX_REG           7
+
+#define PISMO1_NOR             1
+#define PISMO1_NAND            2
+#define PISMO2_CS0             3
+#define PISMO2_CS1             4
+#define PISMO1_ONENAND         5
+#define DBG_MPDB               6
+#define PISMO2_NAND_CS0                7
+#define PISMO2_NAND_CS1                8
+
+/* make it readable for the gpmc_init */
+#define PISMO1_NOR_BASE        FLASH_BASE
+#define PISMO1_NAND_BASE       CONFIG_SYS_NAND_BASE
+#define PISMO1_NAND_SIZE       GPMC_SIZE_256M
+
+#endif /* endif _MEM_H_ */
diff --git a/arch/arm/include/asm/arch-am33xx/omap_gpmc.h b/arch/arm/include/asm/arch-am33xx/omap_gpmc.h
new file mode 100644 (file)
index 0000000..572f9d0
--- /dev/null
@@ -0,0 +1,120 @@
+/*
+ * (C) Copyright 2004-2008 Texas Instruments, <www.ti.com>
+ * Rohit Choraria <rohitkc@ti.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+#ifndef __ASM_ARCH_OMAP_GPMC_H
+#define __ASM_ARCH_OMAP_GPMC_H
+
+#define GPMC_BUF_EMPTY 0
+#define GPMC_BUF_FULL  1
+
+#define ECCCLEAR       (0x1 << 8)
+#define ECCRESULTREG1  (0x1 << 0)
+#define ECCSIZE512BYTE 0xFF
+#define ECCSIZE1       (ECCSIZE512BYTE << 22)
+#define ECCSIZE0       (ECCSIZE512BYTE << 12)
+#define ECCSIZE0SEL    (0x000 << 0)
+
+/* Generic ECC Layouts */
+/* Large Page x8 NAND device Layout */
+#ifdef GPMC_NAND_ECC_LP_x8_LAYOUT
+#define GPMC_NAND_HW_ECC_LAYOUT {\
+       .eccbytes = 12,\
+       .eccpos = {1, 2, 3, 4, 5, 6, 7, 8,\
+               9, 10, 11, 12},\
+       .oobfree = {\
+               {.offset = 13,\
+                .length = 51 } } \
+}
+#endif
+
+/* Large Page x16 NAND device Layout */
+#ifdef GPMC_NAND_ECC_LP_x16_LAYOUT
+#define GPMC_NAND_HW_ECC_LAYOUT {\
+       .eccbytes = 12,\
+       .eccpos = {2, 3, 4, 5, 6, 7, 8, 9,\
+               10, 11, 12, 13},\
+       .oobfree = {\
+               {.offset = 14,\
+                .length = 50 } } \
+}
+#endif
+
+/* Small Page x8 NAND device Layout */
+#ifdef GPMC_NAND_ECC_SP_x8_LAYOUT
+#define GPMC_NAND_HW_ECC_LAYOUT {\
+       .eccbytes = 3,\
+       .eccpos = {1, 2, 3},\
+       .oobfree = {\
+               {.offset = 4,\
+                .length = 12 } } \
+}
+#endif
+
+/* Small Page x16 NAND device Layout */
+#ifdef GPMC_NAND_ECC_SP_x16_LAYOUT
+#define GPMC_NAND_HW_ECC_LAYOUT {\
+       .eccbytes = 3,\
+       .eccpos = {2, 3, 4},\
+       .oobfree = {\
+               {.offset = 5,\
+                .length = 11 } } \
+}
+#endif
+
+#define GPMC_NAND_HW_BCH4_ECC_LAYOUT {\
+       .eccbytes = 32,\
+       .eccpos = {2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15,\
+                               16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27,\
+                               28, 29, 30, 31, 32, 33},\
+       .oobfree = {\
+               {.offset = 34,\
+                .length = 30 } } \
+}
+
+#define GPMC_NAND_HW_BCH8_ECC_LAYOUT {\
+       .eccbytes = 56,\
+       .eccpos = {2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15,\
+                               16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27,\
+                               28, 29, 30, 31, 32, 33, 34, 35, 36, 37, 38, 39,\
+                               40, 41, 42, 43, 44, 45, 46, 47, 48, 49, 50, 51,\
+                               52, 53, 54, 55, 56, 57},\
+       .oobfree = {\
+               {.offset = 58,\
+                .length = 6 } } \
+}
+
+#define GPMC_NAND_HW_BCH16_ECC_LAYOUT {\
+       .eccbytes = 104,\
+       .eccpos = {2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15,\
+                               16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27,\
+                               28, 29, 30, 31, 32, 33, 34, 35, 36, 37, 38, 39,\
+                               40, 41, 42, 43, 44, 45, 46, 47, 48, 49, 50, 51,\
+                               52, 53, 54, 55, 56, 57, 58, 59, 60, 61, 62, 63,\
+                               64, 65, 66, 67, 68, 69, 70, 71, 72, 73, 74, 75,\
+                               76, 77, 78, 79, 80, 81, 82, 83, 84, 85, 86, 87,\
+                               88, 89, 90, 91, 92, 93, 94, 95, 96, 97, 98, 99,\
+                               100, 101, 102, 103, 104, 105},\
+       .oobfree = {\
+               {.offset = 106,\
+                .length = 8 } } \
+}
+#endif /* __ASM_ARCH_OMAP_GPMC_H */
index 9cf35e0..588d8de 100644 (file)
@@ -33,4 +33,7 @@ u32 get_device_type(void);
 void setup_clocks_for_console(void);
 void ddr_pll_config(unsigned int ddrpll_M);
 
+void sdelay(unsigned long);
+void gpmc_init(void);
+void omap_nand_switch_ecc(int);
 #endif
index d1b2ea8..f06af2e 100644 (file)
@@ -28,6 +28,8 @@
 #define EXYNOS4_ADDR_BASE              0x10000000
 
 /* EXYNOS4 */
+#define EXYNOS4_I2C_SPACING            0x10000
+
 #define EXYNOS4_GPIO_PART3_BASE                0x03860000
 #define EXYNOS4_PRO_ID                 0x10000000
 #define EXYNOS4_SYSREG_BASE            0x10010000
diff --git a/arch/arm/include/asm/arch-exynos/dwmmc.h b/arch/arm/include/asm/arch-exynos/dwmmc.h
new file mode 100644 (file)
index 0000000..8acdf9b
--- /dev/null
@@ -0,0 +1,36 @@
+/*
+ * (C) Copyright 2012 SAMSUNG Electronics
+ * Jaehoon Chung <jh80.chung@samsung.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ *
+ */
+
+#define DWMCI_CLKSEL           0x09C
+#define DWMCI_SHIFT_0          0x0
+#define DWMCI_SHIFT_1          0x1
+#define DWMCI_SHIFT_2          0x2
+#define DWMCI_SHIFT_3          0x3
+#define DWMCI_SET_SAMPLE_CLK(x)        (x)
+#define DWMCI_SET_DRV_CLK(x)   ((x) << 16)
+#define DWMCI_SET_DIV_RATIO(x) ((x) << 24)
+
+int exynos_dwmci_init(u32 regbase, int bus_width, int index);
+
+static inline unsigned int exynos_dwmmc_init(int index, int bus_width)
+{
+       unsigned int base = samsung_get_base_mmc() + (0x10000 * index);
+       return exynos_dwmci_init(base, bus_width, index);
+}
index 57bfe8e..009a6bb 100644 (file)
@@ -33,7 +33,7 @@
                        | (attr << 8) | (kw_winctrl_calcsize(size) << 16))
 
 #define KWGBE_PORT_SERIAL_CONTROL1_REG(_x)     \
-               ((_x ? KW_EGIGA0_BASE : KW_EGIGA1_BASE) + 0x44c)
+               ((_x ? KW_EGIGA1_BASE : KW_EGIGA0_BASE) + 0x44c)
 
 #define KW_REG_PCIE_DEVID              (KW_REG_PCIE_BASE + 0x00)
 #define KW_REG_PCIE_REVID              (KW_REG_PCIE_BASE + 0x08)