]> git.kernelconcepts.de Git - karo-tx-uboot.git/commitdiff
Merge branch 'master' of git://git.denx.de/u-boot-mpc83xx
authorWolfgang Denk <wd@denx.de>
Sat, 24 Oct 2009 20:19:46 +0000 (22:19 +0200)
committerWolfgang Denk <wd@denx.de>
Sat, 24 Oct 2009 20:19:46 +0000 (22:19 +0200)
cpu/mpc83xx/fdt.c
include/configs/sbc8349.h
include/configs/vme8349.h

index 13443cbd8795684a3b0a876563588dab7b801ecf..daf73a6e5ab164fba02beb5ea046be87b1a7c56d 100644 (file)
@@ -69,6 +69,45 @@ void ft_cpu_setup(void *blob, bd_t *bd)
     defined(CONFIG_HAS_ETH2) || defined(CONFIG_HAS_ETH3) ||\
     defined(CONFIG_HAS_ETH4) || defined(CONFIG_HAS_ETH5)
        fdt_fixup_ethernet(blob);
+#ifdef CONFIG_MPC8313
+       /*
+       * mpc8313e erratum IPIC1 swapped TSEC interrupt ID numbers on rev. 1
+       * h/w (see AN3545).  The base device tree in use has rev. 1 ID numbers,
+       * so if on Rev. 2 (and higher) h/w, we fix them up here
+       */
+       if (REVID_MAJOR(immr->sysconf.spridr) >= 2) {
+               int nodeoffset, path;
+               const char *prop;
+
+               nodeoffset = fdt_path_offset(blob, "/aliases");
+               if (nodeoffset >= 0) {
+#if defined(CONFIG_HAS_ETH0)
+                       prop = fdt_getprop(blob, nodeoffset, "ethernet0", NULL);
+                       if (prop) {
+                               u32 tmp[] = { 32, 0x8, 33, 0x8, 34, 0x8 };
+
+                               path = fdt_path_offset(blob, prop);
+                               prop = fdt_getprop(blob, path, "interrupts", 0);
+                               if (prop)
+                                       fdt_setprop(blob, path, "interrupts",
+                                                   &tmp, sizeof(tmp));
+                       }
+#endif
+#if defined(CONFIG_HAS_ETH1)
+                       prop = fdt_getprop(blob, nodeoffset, "ethernet1", NULL);
+                       if (prop) {
+                               u32 tmp[] = { 35, 0x8, 36, 0x8, 37, 0x8 };
+
+                               path = fdt_path_offset(blob, prop);
+                               prop = fdt_getprop(blob, path, "interrupts", 0);
+                               if (prop)
+                                       fdt_setprop(blob, path, "interrupts",
+                                                   &tmp, sizeof(tmp));
+                       }
+#endif
+               }
+       }
+#endif
 #endif
 
        do_fixup_by_prop_u32(blob, "device_type", "cpu", 4,
index bf7cf82d8ebb404e51348947c83ab9faefb87d11..4dea27d48309ead0c29d1816eed272c054e5d7dd 100644 (file)
 #define CONFIG_SYS_I2C1_OFFSET         0x3000
 #define CONFIG_SYS_I2C2_OFFSET         0x3100
 #define CONFIG_SYS_I2C_OFFSET          CONFIG_SYS_I2C2_OFFSET
-/* could also use CONFIG_I2C_MULTI_BUS and CONFIG_SPD_BUS_NUM... */
+/* could also use CONFIG_I2C_MULTI_BUS and CONFIG_SYS_SPD_BUS_NUM... */
 
 /* TSEC */
 #define CONFIG_SYS_TSEC1_OFFSET 0x24000
index d0690feb173dcaf32351deb3fcc1fbba103939f3..f9db73b2dcdf3fbd38d08fcfff176aa229ed449d 100644 (file)
 #define CONFIG_SYS_I2C1_OFFSET 0x3000
 #define CONFIG_SYS_I2C2_OFFSET 0x3100
 #define CONFIG_SYS_I2C_OFFSET  CONFIG_SYS_I2C1_OFFSET
-/* could also use CONFIG_I2C_MULTI_BUS and CONFIG_SPD_BUS_NUM... */
+/* could also use CONFIG_I2C_MULTI_BUS and CONFIG_SYS_SPD_BUS_NUM... */
 
 #define CONFIG_SYS_I2C_8574_ADDR2       0x20    /* I2C1, PCF8574 */