karo: tx53: fix DDR_SEL value

The current value is inappropriate for DDR3.
When adding support for the HW rev. 3 of the TX53 module that has DDR3
instead of DDR2 memory, the values for both memory type were
erroneously swapped, so that after removing DDR2 support lateron, the
wrong value was kept.

diff --git a/board/karo/tx53/lowlevel_init.S b/board/karo/tx53/lowlevel_init.S
index 21ee4d8..ceddce9 100644 (file)
--- a/board/karo/tx53/lowlevel_init.S
+++ b/board/karo/tx53/lowlevel_init.S
@@ -409,7 +409,7 @@ dcd_hdr:
        MXC_DCD_ITEM(0x53fd4020, 0xb6b12f0a)    /* CSCMR2 */
        MXC_DCD_ITEM(0x53fd4024, 0x00080b18)    /* CSCDR1 */
 
-#define DDR_SEL_VAL    2
+#define DDR_SEL_VAL    0
 #define DSE_VAL                5
 #define ODT_VAL                2