#include <config.h>
+#include <asm-offsets.h>
#include <configs/tx53.h>
+#include <linux/linkage.h>
#include <asm/arch/imx-regs.h>
#define DEBUG_LED_BIT 20
.error "DCD too large!"
.endif
dcd_end:
+ .section ".pad"
+ .section ".text"
.endm
#define MXC_DCD_CMD_WRT(type, flags) \
(tODTLon << 12) | \
(tODTLoff << 4))
-fcb_start:
- b _start
- .word 0x20424346 /* "FCB " marker */
- .word 0x01 /* FCB version number */
- .org 0x68
- .word 0x0 /* primary image starting page number */
- .word 0x0 /* secondary image starting page number */
- .org 0x78
- .word 0x0 /* DBBT start page (0 == NO DBBT) */
- .word 0 /* Bad block marker offset in main area (unused) */
- .org 0xac
- .word 0 /* BI Swap disabled */
- .word 0 /* Bad Block marker offset in spare area */
-fcb_end:
-
- .org 0x400
+ .section ".ivt"
ivt_header:
.word CPU_2_BE_32((0xd1 << 24) | (32 << 8) | 0x40)
app_start_addr:
self_ptr:
.word ivt_header
app_code_csf:
- .word 0x0
+ .word __csf_data
.word 0x0
boot_data:
- .long fcb_start
+ .long CONFIG_SYS_TEXT_BASE
image_len:
- .long __uboot_img_end - fcb_start
+ .long __uboot_img_len
plugin:
.word 0
ivt_end:
MXC_DCD_ITEM(CCM_BASE_ADDR + REG_CCGR1, 0x000fffcf)
MXC_DCD_ITEM(CCM_BASE_ADDR + REG_CCGR2, 0x033c0000)
MXC_DCD_ITEM(CCM_BASE_ADDR + REG_CCGR3, 0x000000ff)
+#ifdef CONFIG_SECURE_BOOT
+ /* enable Sahara */
+ MXC_DCD_ITEM(CCM_BASE_ADDR + REG_CCGR4, 0x0000c000)
+#else
MXC_DCD_ITEM(CCM_BASE_ADDR + REG_CCGR4, 0x00000000)
+#endif
MXC_DCD_ITEM(CCM_BASE_ADDR + REG_CCGR5, 0x00fff033)
MXC_DCD_ITEM(CCM_BASE_ADDR + REG_CCGR6, 0x0f00030f)
MXC_DCD_ITEM(CCM_BASE_ADDR + REG_CCGR7, 0xfff00000)
. = 0x00000000;
.text :
{
+ __uboot_img_start = .;
+ . = 0x400;
+ __ivt_start = .;
+ KEEP(*(.ivt*))
+ . = 0x1000;
+ __ivt_end = .;
*(.__image_copy_start)
*(.vectors)
CPUDIR/start.o (.text*)
- . = 0x400;
- KEEP(BOARDDIR/lowlevel_init.o (.text*))
*(.text*)
- }
-
-#if defined(CONFIG_ARMV7_NONSEC) || defined(CONFIG_ARMV7_VIRT) || defined(CONFIG_ARMV7_PSCI)
-
-#ifndef CONFIG_ARMV7_SECURE_BASE
-#define CONFIG_ARMV7_SECURE_BASE
-#endif
-
- .__secure_start : {
- . = ALIGN(0x1000);
- *(.__secure_start)
- }
-
- .secure_text CONFIG_ARMV7_SECURE_BASE :
- AT(ADDR(.__secure_start) + SIZEOF(.__secure_start))
- {
- *(._secure.text)
- }
-
- . = LOADADDR(.__secure_start) +
- SIZEOF(.__secure_start) +
- SIZEOF(.secure_text);
-
- __secure_end_lma = .;
- .__secure_end : AT(__secure_end_lma) {
- *(.__secure_end)
- LONG(0x1d1071c); /* Must output something to reset LMA */
- }
-#endif
+ } = 0xadde01f0
. = ALIGN(4);
.rodata : { *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) }
. = ALIGN(4);
.data : {
*(.data*)
+ . = ALIGN(4);
}
- . = ALIGN(4);
.u_boot_list : {
KEEP(*(SORT(.u_boot_list*)));
}
*(.__rel_dyn_end)
}
- /* Workaround for an apparent bug in i.MX53 ROM Code,
- * that skips loading the last block if it doesn't
- * end on a 4KiB boundary.
- */
+ .pad :
+ {
+ /* Workaround for a bug in i.MX53 ROM Code,
+ * which skips loading the last block if it doesn't
+ * end on a 4KiB boundary.
+ */
+ *(.pad)
+ . = ALIGN(4096);
+ } = 0x01f0adde
+
+ _image_binary_end = . + (__ivt_end - __uboot_img_start);
- . = ALIGN(4096);
.uboot_img_end :
{
- *(.__uboot_img_end)
+ KEEP(*(.__uboot_img_end))
}
- _image_binary_end = .;
+ . = CONFIG_SYS_TEXT_BASE + 0x70000;
+ .csf_data :
+ {
+ *(.__csf_data)
+ . = . + 0x2000;
+ }
+ __uboot_img_len = . - __uboot_img_start;
/*
* Compiler-generated __bss_start and __bss_end, see arch/arm/lib/bss.c
}
.dynsym _image_binary_end : { *(.dynsym) }
- .dynbss : { *(.dynbss) }
- .dynstr : { *(.dynstr*) }
- .dynamic : { *(.dynamic*) }
- .plt : { *(.plt*) }
- .interp : { *(.interp*) }
- .gnu.hash : { *(.gnu.hash) }
- .gnu : { *(.gnu*) }
- .ARM.exidx : { *(.ARM.exidx*) }
- .gnu.linkonce.armexidx : { *(.gnu.linkonce.armexidx.*) }
+ /DISCARD/ : { *(.debug*) }
+ /DISCARD/ : { *(.note*) }
+ /DISCARD/ : { *(.comment*) }
+ /DISCARD/ : { *(.dynbss) }
+ /DISCARD/ : { *(.dynstr*) }
+ /DISCARD/ : { *(.dynamic*) }
+ /DISCARD/ : { *(.plt*) }
+ /DISCARD/ : { *(.interp*) }
+ /DISCARD/ : { *(.gnu.hash) }
+ /DISCARD/ : { *(.gnu*) }
+ /DISCARD/ : { *(.ARM.exidx*) }
+ /DISCARD/ : { *(.gnu.linkonce.armexidx.*) }
}