mx6: clock: use setup_gpmi_io_clk() to change nfc clk divider for CONFIG_NAND_MXS

diff --git a/arch/arm/cpu/armv7/mx6/clock.c b/arch/arm/cpu/armv7/mx6/clock.c
index 9e76adc8089c2e68a86cb7966dfbf7e14fbc3a19..c3c9c5e6512ba13ebacd96181056e915db9e14da 100644 (file)
--- a/arch/arm/cpu/armv7/mx6/clock.c
+++ b/arch/arm/cpu/armv7/mx6/clock.c
@@ -698,8 +698,12 @@ static int set_nfc_clk(u32 ref, u32 freq_khz)
        if ((cs2cdr & CS2CDR_ENFC_MASK) != nfc_val) {
                debug("changing cs2cdr from %08x to %08x\n", cs2cdr,
                        (cs2cdr & ~CS2CDR_ENFC_MASK) | nfc_val);
        if ((cs2cdr & CS2CDR_ENFC_MASK) != nfc_val) {
                debug("changing cs2cdr from %08x to %08x\n", cs2cdr,
                        (cs2cdr & ~CS2CDR_ENFC_MASK) | nfc_val);

+#ifdef CONFIG_NAND_MXS
+               setup_gpmi_io_clk(nfc_val);
+#else

                __raw_writel((cs2cdr & ~CS2CDR_ENFC_MASK) | nfc_val,
                        &imx_ccm->cs2cdr);
                __raw_writel((cs2cdr & ~CS2CDR_ENFC_MASK) | nfc_val,
                        &imx_ccm->cs2cdr);

+#endif

        } else {
                debug("Leaving cs2cdr unchanged [%08x]\n", cs2cdr);
        }
        } else {
                debug("Leaving cs2cdr unchanged [%08x]\n", cs2cdr);
        }