Merge branch 'tx28-update-2016-02-03' into karo-tx6
authorLothar Waßmann <LW@KARO-electronics.de>
Thu, 18 Feb 2016 17:37:47 +0000 (18:37 +0100)
committerLothar Waßmann <LW@KARO-electronics.de>
Thu, 18 Feb 2016 17:37:47 +0000 (18:37 +0100)
board/karo/tx28/tx28.c
board/karo/tx48/tx48.c
board/karo/tx51/tx51.c
board/karo/tx53/tx53.c
board/karo/tx6/flash.c
board/karo/tx6/tx6qdl.c
board/karo/tx6/tx6ul.c
board/karo/tx6/tx6ul_ll_init.S
common/lcd.c
drivers/net/fec_mxc.c
include/configs/tx6.h

index 25d61c2..1089d4f 100644 (file)
@@ -401,14 +401,12 @@ static const struct gpio stk5_gpios[] = {
 };
 
 #ifdef CONFIG_LCD
-static ushort tx28_cmap[256];
 vidinfo_t panel_info = {
        /* set to max. size supported by SoC */
        .vl_col = 1600,
        .vl_row = 1200,
 
        .vl_bpix = LCD_COLOR32,    /* Bits per pixel, 0: 1bpp, 1: 2bpp, 2: 4bpp, 3: 8bpp ... */
-       .cmap = tx28_cmap,
 };
 
 static struct fb_videomode tx28_fb_modes[] = {
index e89dda8..7383738 100644 (file)
@@ -162,14 +162,12 @@ static const struct gpio stk5v5_gpios[] = {
 };
 
 #ifdef CONFIG_LCD
-static u16 tx48_cmap[256];
 vidinfo_t panel_info = {
        /* set to max. size supported by SoC */
        .vl_col = 1366,
        .vl_row = 768,
 
        .vl_bpix = LCD_COLOR32,    /* Bits per pixel, 0: 1bpp, 1: 2bpp, 2: 4bpp, 3: 8bpp ... */
-       .cmap = tx48_cmap,
 };
 
 static struct lcd_ctrl_config lcd_cfg = {
index 586663c..00f8262 100644 (file)
@@ -548,14 +548,12 @@ static const struct gpio stk5_gpios[] = {
 };
 
 #ifdef CONFIG_LCD
-static u16 tx51_cmap[256];
 vidinfo_t panel_info = {
        /* set to max. size supported by SoC */
        .vl_col = 1600,
        .vl_row = 1200,
 
        .vl_bpix = LCD_COLOR32,    /* Bits per pixel, 0: 1bpp, 1: 2bpp, 2: 4bpp, 3: 8bpp ... */
-       .cmap = tx51_cmap,
 };
 
 static struct fb_videomode tx51_fb_modes[] = {
index 082d2bd..11b071e 100644 (file)
@@ -762,14 +762,12 @@ static const struct gpio stk5_gpios[] = {
 };
 
 #ifdef CONFIG_LCD
-static u16 tx53_cmap[256];
 vidinfo_t panel_info = {
        /* set to max. size supported by SoC */
        .vl_col = 1600,
        .vl_row = 1200,
 
        .vl_bpix = LCD_COLOR32,    /* Bits per pixel, 0: 1bpp, 1: 2bpp, 2: 4bpp, 3: 8bpp ... */
-       .cmap = tx53_cmap,
 };
 
 static struct fb_videomode tx53_fb_modes[] = {
index cda315a..c46d28b 100644 (file)
@@ -386,7 +386,7 @@ static int tx6_prog_uboot(void *addr, int start_block, int skip,
        if (doit) {
                actual = size;
                ret = nand_write_skip_bad(mtd, prg_start, &actual, NULL,
-                                       prg_length, addr, WITH_DROP_FFS);
+                                       prg_length, addr, 0);
                if (ret) {
                        printf("Failed to program flash: %d\n", ret);
                        return ret;
index c21f1c4..a232461 100644 (file)
@@ -803,14 +803,12 @@ static const struct gpio stk5_gpios[] = {
 };
 
 #ifdef CONFIG_LCD
-static u16 tx6_cmap[256];
 vidinfo_t panel_info = {
        /* set to max. size supported by SoC */
        .vl_col = 1920,
        .vl_row = 1080,
 
        .vl_bpix = LCD_COLOR32,    /* Bits per pixel, 0: 1bpp, 1: 2bpp, 2: 4bpp, 3: 8bpp ... */
-       .cmap = tx6_cmap,
 };
 
 static struct fb_videomode tx6_fb_modes[] = {
@@ -1378,7 +1376,6 @@ static void tx6qdl_set_cpu_clock(void)
 
 int board_late_init(void)
 {
-       int ret = 0;
        const char *baseboard;
 
        debug("%s@%d: \n", __func__, __LINE__);
@@ -1423,7 +1420,8 @@ int board_late_init(void)
        } else {
                printf("WARNING: Unsupported baseboard: '%s'\n",
                        baseboard);
-               ret = -EINVAL;
+               if (!had_ctrlc())
+                       return -EINVAL;
        }
 
 exit:
@@ -1431,7 +1429,7 @@ exit:
 
        gpio_set_value(TX6_RESET_OUT_GPIO, 1);
        clear_ctrlc();
-       return ret;
+       return 0;
 }
 
 #ifdef CONFIG_SERIAL_TAG
index b8e29be..b8ff2c8 100644 (file)
 #define TX6UL_FEC_RST_GPIO             IMX_GPIO_NR(5, 6)
 #define TX6UL_FEC_PWR_GPIO             IMX_GPIO_NR(5, 7)
 #define TX6UL_FEC_INT_GPIO             IMX_GPIO_NR(5, 5)
+
+#define TX6UL_FEC2_RST_GPIO            IMX_GPIO_NR(4, 28)
+#define TX6UL_FEC2_INT_GPIO            IMX_GPIO_NR(4, 27)
+
 #define TX6UL_LED_GPIO                 IMX_GPIO_NR(5, 9)
 
 #define TX6UL_LCD_PWR_GPIO             IMX_GPIO_NR(5, 4)
@@ -127,7 +131,9 @@ static const iomux_v3_cfg_t const tx6ul_enet1_pads[] = {
        MX6_PAD_ENET1_TX_EN__ENET1_TX_EN | MUX_PAD_CTRL(TX6_ENET_PAD_CTRL),
        MX6_PAD_ENET1_TX_DATA1__ENET1_TDATA01 | MUX_PAD_CTRL(TX6_ENET_PAD_CTRL),
        MX6_PAD_ENET1_TX_DATA0__ENET1_TDATA00 | MUX_PAD_CTRL(TX6_ENET_PAD_CTRL),
+};
 
+static const iomux_v3_cfg_t const tx6ul_enet2_pads[] = {
        MX6_PAD_ENET2_TX_CLK__ENET2_REF_CLK2 | MUX_CFG_SION |
                                MUX_PAD_CTRL(PAD_CTL_SPEED_HIGH |
                                PAD_CTL_DSE_48ohm |
@@ -148,8 +154,10 @@ static const iomux_v3_cfg_t const tx6ul_enet1_pads[] = {
 
 static const iomux_v3_cfg_t const tx6_i2c_gpio_pads[] = {
        /* internal I2C */
-       MX6_PAD_SNVS_TAMPER1__GPIO5_IO01 | MUX_CFG_SION | MUX_PAD_CTRL(TX6_I2C_PAD_CTRL),
-       MX6_PAD_SNVS_TAMPER0__GPIO5_IO00 | MUX_CFG_SION | MUX_PAD_CTRL(TX6_I2C_PAD_CTRL),
+       MX6_PAD_SNVS_TAMPER1__GPIO5_IO01 | MUX_CFG_SION |
+                       MUX_PAD_CTRL(TX6_I2C_PAD_CTRL),
+       MX6_PAD_SNVS_TAMPER0__GPIO5_IO00 | MUX_CFG_SION |
+                       MUX_PAD_CTRL(TX6_I2C_PAD_CTRL),
 };
 
 static const struct gpio const tx6ul_gpios[] = {
@@ -162,10 +170,16 @@ static const struct gpio const tx6ul_gpios[] = {
        { TX6UL_FEC_INT_GPIO, GPIOFLAG_INPUT, "FEC PHY INT", },
 };
 
+static const struct gpio const tx6ul_fec2_gpios[] = {
+       { TX6UL_FEC2_RST_GPIO, GPIOFLAG_OUTPUT_INIT_LOW, "FEC2 PHY RESET", },
+       { TX6UL_FEC2_INT_GPIO, GPIOFLAG_INPUT, "FEC2 PHY INT", },
+};
+
 #define GPIO_DR 0
 #define GPIO_DIR 4
 #define GPIO_PSR 8
 
+/* run with default environment */
 static void tx6_i2c_recover(void)
 {
        int i;
@@ -578,6 +592,12 @@ int board_mmc_init(bd_t *bis)
 
        debug("%s@%d: \n", __func__, __LINE__);
 
+#ifndef CONFIG_ENV_IS_IN_MMC
+       if (!(gd->flags & GD_FLG_ENV_READY)) {
+               printf("deferred ...");
+               return 0;
+       }
+#endif
        for (i = 0; i < ARRAY_SIZE(tx6ul_esdhc_cfg); i++) {
                struct mmc *mmc;
                struct tx6_esdhc_cfg *cfg = &tx6ul_esdhc_cfg[i];
@@ -609,70 +629,11 @@ int board_mmc_init(bd_t *bis)
 }
 #endif /* CONFIG_CMD_MMC */
 
-#ifdef CONFIG_FEC_MXC
-
-#ifndef ETH_ALEN
-#define ETH_ALEN 6
-#endif
-
-int board_eth_init(bd_t *bis)
-{
-       int ret;
-
-       debug("%s@%d: \n", __func__, __LINE__);
-
-       /* delay at least 21ms for the PHY internal POR signal to deassert */
-       udelay(22000);
-
-       imx_iomux_v3_setup_multiple_pads(tx6ul_enet1_pads,
-                                       ARRAY_SIZE(tx6ul_enet1_pads));
-
-       /* Deassert RESET to the external phy */
-       gpio_set_value(TX6UL_FEC_RST_GPIO, 1);
-
-       if (getenv("ethaddr")) {
-               ret = fecmxc_initialize_multi(bis, 0, -1, ENET_BASE_ADDR);
-               if (ret) {
-                       printf("failed to initialize FEC0: %d\n", ret);
-                       return ret;
-               }
-       }
-       if (getenv("eth1addr")) {
-               ret = fecmxc_initialize_multi(bis, 1, -1, ENET2_BASE_ADDR);
-               if (ret) {
-                       printf("failed to initialize FEC1: %d\n", ret);
-                       return ret;
-               }
-       }
-       return 0;
-}
-
-static void tx6_init_mac(void)
-{
-       u8 mac[ETH_ALEN];
-
-       imx_get_mac_from_fuse(0, mac);
-       if (!is_valid_ethaddr(mac)) {
-               printf("No valid MAC address programmed\n");
-               return;
-       }
-
-       printf("MAC addr from fuse: %pM\n", mac);
-       eth_setenv_enetaddr("ethaddr", mac);
-
-       imx_get_mac_from_fuse(1, mac);
-       eth_setenv_enetaddr("eth1addr", mac);
-}
-#else
-static inline void tx6_init_mac(void)
-{
-}
-#endif /* CONFIG_FEC_MXC */
-
 enum {
        LED_STATE_INIT = -1,
        LED_STATE_OFF,
        LED_STATE_ON,
+       LED_STATE_ERR,
 };
 
 static inline int calc_blink_rate(void)
@@ -690,13 +651,24 @@ void show_activity(int arg)
        static int led_state = LED_STATE_INIT;
        static int blink_rate;
        static ulong last;
+       int ret;
 
-       if (led_state == LED_STATE_INIT) {
+       switch (led_state) {
+       case LED_STATE_ERR:
+               return;
+
+       case LED_STATE_INIT:
                last = get_timer(0);
-               gpio_set_value(TX6UL_LED_GPIO, 1);
-               led_state = LED_STATE_ON;
+               ret = gpio_set_value(TX6UL_LED_GPIO, 1);
+               if (ret)
+                       led_state = LED_STATE_ERR;
+               else
+                       led_state = LED_STATE_ON;
                blink_rate = calc_blink_rate();
-       } else {
+               break;
+
+       case LED_STATE_ON:
+       case LED_STATE_OFF:
                if (get_timer(last) > blink_rate) {
                        blink_rate = calc_blink_rate();
                        last = get_timer_masked();
@@ -707,6 +679,7 @@ void show_activity(int arg)
                        }
                        led_state = 1 - led_state;
                }
+               break;
        }
 }
 
@@ -720,41 +693,35 @@ static const iomux_v3_cfg_t stk5_pads[] = {
 
        /* TSC200x PEN IRQ */
        MX6_PAD_JTAG_TMS__GPIO1_IO11 | MUX_PAD_CTRL(TX6_GPIO_IN_PAD_CTRL),
-#if 0
+
        /* EDT-FT5x06 Polytouch panel */
-       MX6_PAD_NAND_CS2__GPIO6_IO15 | MUX_PAD_CTRL(TX6_GPIO_IN_PAD_CTRL), /* IRQ */
-       MX6_PAD_EIM_A16__GPIO2_IO22 | MUX_PAD_CTRL(TX6_GPIO_OUT_PAD_CTRL), /* RESET */
-       MX6_PAD_EIM_A17__GPIO2_IO21 | MUX_PAD_CTRL(TX6_GPIO_OUT_PAD_CTRL), /* WAKE */
+       MX6_PAD_SNVS_TAMPER2__GPIO5_IO02 | MUX_PAD_CTRL(TX6_GPIO_IN_PAD_CTRL), /* IRQ */
+       MX6_PAD_SNVS_TAMPER3__GPIO5_IO03 | MUX_PAD_CTRL(TX6_GPIO_OUT_PAD_CTRL), /* RESET */
+       MX6_PAD_SNVS_TAMPER8__GPIO5_IO08 | MUX_PAD_CTRL(TX6_GPIO_OUT_PAD_CTRL), /* WAKE */
 
        /* USBH1 */
-       MX6_PAD_EIM_D31__GPIO3_IO31 | MUX_PAD_CTRL(TX6_GPIO_OUT_PAD_CTRL), /* VBUSEN */
-       MX6_PAD_EIM_D30__GPIO3_IO30 | MUX_PAD_CTRL(TX6_GPIO_IN_PAD_CTRL), /* OC */
+       MX6_PAD_GPIO1_IO02__USB_OTG2_PWR | MUX_PAD_CTRL(TX6_GPIO_OUT_PAD_CTRL), /* VBUSEN */
+       MX6_PAD_GPIO1_IO03__USB_OTG2_OC | MUX_PAD_CTRL(TX6_GPIO_IN_PAD_CTRL), /* OC */
+
        /* USBOTG */
-       MX6_PAD_EIM_D23__GPIO3_IO23 | MUX_PAD_CTRL(TX6_GPIO_IN_PAD_CTRL), /* USBOTG ID */
-       MX6_PAD_GPIO_7__GPIO1_IO07 | MUX_PAD_CTRL(TX6_GPIO_OUT_PAD_CTRL), /* VBUSEN */
-       MX6_PAD_GPIO_8__GPIO1_IO08 | MUX_PAD_CTRL(TX6_GPIO_IN_PAD_CTRL), /* OC */
-#endif
+       MX6_PAD_UART3_CTS_B__GPIO1_IO26 | MUX_PAD_CTRL(TX6_GPIO_OUT_PAD_CTRL), /* VBUSEN */
+       MX6_PAD_UART3_RTS_B__GPIO1_IO27 | MUX_PAD_CTRL(TX6_GPIO_IN_PAD_CTRL), /* OC */
 };
 
 static const struct gpio stk5_gpios[] = {
        { TX6UL_LED_GPIO, GPIOFLAG_OUTPUT_INIT_LOW, "HEARTBEAT LED", },
 
-       { IMX_GPIO_NR(3, 23), GPIOFLAG_INPUT, "USBOTG ID", },
-       { IMX_GPIO_NR(1, 8), GPIOFLAG_INPUT, "USBOTG OC", },
-       { IMX_GPIO_NR(1, 7), GPIOFLAG_OUTPUT_INIT_LOW, "USBOTG VBUS enable", },
-       { IMX_GPIO_NR(3, 30), GPIOFLAG_INPUT, "USBH1 OC", },
-       { IMX_GPIO_NR(3, 31), GPIOFLAG_OUTPUT_INIT_LOW, "USBH1 VBUS enable", },
+       { IMX_GPIO_NR(1, 27), GPIOFLAG_INPUT, "USBOTG OC", },
+       { IMX_GPIO_NR(1, 26), GPIOFLAG_OUTPUT_INIT_LOW, "USBOTG VBUS enable", },
 };
 
 #ifdef CONFIG_LCD
-static u16 tx6_cmap[256];
 vidinfo_t panel_info = {
        /* set to max. size supported by SoC */
        .vl_col = 4096,
        .vl_row = 1024,
 
        .vl_bpix = LCD_COLOR32,    /* Bits per pixel, 0: 1bpp, 1: 2bpp, 2: 4bpp, 3: 8bpp ... */
-       .cmap = tx6_cmap,
 };
 
 static struct fb_videomode tx6_fb_modes[] = {
@@ -933,47 +900,14 @@ static int lcd_backlight_polarity(void)
        return lcd_bl_polarity;
 }
 
-void lcd_enable(void)
-{
-       /* HACK ALERT:
-        * global variable from common/lcd.c
-        * Set to 0 here to prevent messages from going to LCD
-        * rather than serial console
-        */
-       lcd_is_enabled = 0;
-
-       if (lcd_enabled) {
-               karo_load_splashimage(1);
-
-               debug("Switching LCD on\n");
-               gpio_set_value(TX6UL_LCD_PWR_GPIO, 1);
-               udelay(100);
-               gpio_set_value(TX6UL_LCD_RST_GPIO, 1);
-               udelay(300000);
-               gpio_set_value(TX6UL_LCD_BACKLIGHT_GPIO,
-                       lcd_backlight_polarity());
-       }
-}
-
-void lcd_disable(void)
-{
-       if (lcd_enabled) {
-               printf("Disabling LCD\n");
-               panel_info.vl_row = 0;
-               lcd_enabled = 0;
-       }
-}
-
 static const iomux_v3_cfg_t stk5_lcd_pads[] = {
-#if 1
+#ifdef CONFIG_LCD
        /* LCD RESET */
-       MX6_PAD_LCD_RESET__LCDIF_RESET,
+       MX6_PAD_LCD_RESET__GPIO3_IO04 | MUX_PAD_CTRL(TX6_GPIO_OUT_PAD_CTRL),
        /* LCD POWER_ENABLE */
        MX6_PAD_SNVS_TAMPER4__GPIO5_IO04 | MUX_PAD_CTRL(TX6_GPIO_OUT_PAD_CTRL),
        /* LCD Backlight (PWM) */
        MX6_PAD_NAND_DQS__GPIO4_IO16 | MUX_PAD_CTRL(TX6_GPIO_OUT_PAD_CTRL),
-#endif
-#ifdef CONFIG_LCD
        /* Display */
        MX6_PAD_LCD_DATA00__LCDIF_DATA00,
        MX6_PAD_LCD_DATA01__LCDIF_DATA01,
@@ -1012,6 +946,38 @@ static const struct gpio stk5_lcd_gpios[] = {
        { TX6UL_LCD_BACKLIGHT_GPIO, GPIOFLAG_OUTPUT_INIT_HIGH, "LCD BACKLIGHT", },
 };
 
+/* run with valid env from NAND/eMMC */
+void lcd_enable(void)
+{
+       /* HACK ALERT:
+        * global variable from common/lcd.c
+        * Set to 0 here to prevent messages from going to LCD
+        * rather than serial console
+        */
+       lcd_is_enabled = 0;
+
+       if (lcd_enabled) {
+               karo_load_splashimage(1);
+
+               debug("Switching LCD on\n");
+               gpio_set_value(TX6UL_LCD_PWR_GPIO, 1);
+               udelay(100);
+               gpio_set_value(TX6UL_LCD_RST_GPIO, 1);
+               udelay(300000);
+               gpio_set_value(TX6UL_LCD_BACKLIGHT_GPIO,
+                       lcd_backlight_polarity());
+       }
+}
+
+static void lcd_disable(void)
+{
+       if (lcd_enabled) {
+               printf("Disabling LCD\n");
+               panel_info.vl_row = 0;
+               lcd_enabled = 0;
+       }
+}
+
 void lcd_ctrl_init(void *lcdbase)
 {
        int color_depth = 24;
@@ -1205,6 +1171,20 @@ void lcd_ctrl_init(void *lcdbase)
 #define lcd_enabled 0
 #endif /* CONFIG_LCD */
 
+#ifndef CONFIG_ENV_IS_IN_MMC
+static void tx6_mmc_init(void)
+{
+       puts("MMC:   ");
+       if (board_mmc_init(gd->bd) < 0)
+               cpu_mmc_init(gd->bd);
+       print_mmc_devices(',');
+}
+#else
+static inline void tx6_mmc_init(void)
+{
+}
+#endif
+
 static void stk5_board_init(void)
 {
        int ret;
@@ -1215,14 +1195,15 @@ static void stk5_board_init(void)
                return;
        }
        imx_iomux_v3_setup_multiple_pads(stk5_pads, ARRAY_SIZE(stk5_pads));
-debug("%s@%d: \n", __func__, __LINE__);
+       debug("%s@%d: \n", __func__, __LINE__);
 }
 
 static void stk5v3_board_init(void)
 {
-debug("%s@%d: \n", __func__, __LINE__);
+       debug("%s@%d: \n", __func__, __LINE__);
        stk5_board_init();
-debug("%s@%d: \n", __func__, __LINE__);
+       debug("%s@%d: \n", __func__, __LINE__);
+       tx6_mmc_init();
 }
 
 static void stk5v5_board_init(void)
@@ -1230,6 +1211,7 @@ static void stk5v5_board_init(void)
        int ret;
 
        stk5_board_init();
+       tx6_mmc_init();
 
        ret = gpio_request_one(IMX_GPIO_NR(3, 5), GPIOFLAG_OUTPUT_INIT_HIGH,
                        "Flexcan Transceiver");
@@ -1265,7 +1247,6 @@ static void tx6ul_set_cpu_clock(void)
 
 int board_late_init(void)
 {
-       int ret = 0;
        const char *baseboard;
 
        debug("%s@%d: \n", __func__, __LINE__);
@@ -1307,21 +1288,108 @@ int board_late_init(void)
                        printf("WARNING: Unsupported STK5 board rev.: %s\n",
                                baseboard + 4);
                }
+       } else if (strncmp(baseboard, "ulmb-", 5) == 0) {
+                       const char *otg_mode = getenv("otg_mode");
+
+                       if (otg_mode && strcmp(otg_mode, "host") == 0) {
+                               printf("otg_mode='%s' is incompatible with baseboard %s; setting to 'none'\n",
+                                       otg_mode, baseboard);
+                               setenv("otg_mode", "none");
+                       }
+                       stk5_board_init();
        } else {
                printf("WARNING: Unsupported baseboard: '%s'\n",
                        baseboard);
-               ret = -EINVAL;
+               if (!had_ctrlc())
+                       return -EINVAL;
        }
 
 exit:
-debug("%s@%d: \n", __func__, __LINE__);
-       tx6_init_mac();
-debug("%s@%d: \n", __func__, __LINE__);
+       debug("%s@%d: \n", __func__, __LINE__);
 
        clear_ctrlc();
-       return ret;
+       return 0;
+}
+
+#ifdef CONFIG_FEC_MXC
+
+#ifndef ETH_ALEN
+#define ETH_ALEN 6
+#endif
+
+static void tx6_init_mac(void)
+{
+       u8 mac[ETH_ALEN];
+       const char *baseboard = getenv("baseboard");
+
+       imx_get_mac_from_fuse(0, mac);
+       if (!is_valid_ethaddr(mac)) {
+               printf("No valid MAC address programmed\n");
+               return;
+       }
+       printf("MAC addr from fuse: %pM\n", mac);
+       if (!getenv("ethaddr"))
+               eth_setenv_enetaddr("ethaddr", mac);
+
+       if (!baseboard || strncmp(baseboard, "stk5", 4) == 0) {
+               setenv("eth1addr", NULL);
+               return;
+       }
+       if (getenv("eth1addr"))
+               return;
+       imx_get_mac_from_fuse(1, mac);
+       eth_setenv_enetaddr("eth1addr", mac);
 }
 
+int board_eth_init(bd_t *bis)
+{
+       int ret;
+
+       tx6_init_mac();
+
+       /* delay at least 21ms for the PHY internal POR signal to deassert */
+       udelay(22000);
+
+       imx_iomux_v3_setup_multiple_pads(tx6ul_enet1_pads,
+                                       ARRAY_SIZE(tx6ul_enet1_pads));
+
+       /* Deassert RESET to the external phys */
+       gpio_set_value(TX6UL_FEC_RST_GPIO, 1);
+
+       if (getenv("ethaddr")) {
+               ret = fecmxc_initialize_multi(bis, 0, 0, ENET_BASE_ADDR);
+               if (ret) {
+                       printf("failed to initialize FEC0: %d\n", ret);
+                       return ret;
+               }
+       }
+       if (getenv("eth1addr")) {
+               ret = gpio_request_array(tx6ul_fec2_gpios,
+                                       ARRAY_SIZE(tx6ul_fec2_gpios));
+               if (ret < 0) {
+                       printf("Failed to request tx6ul_fec2_gpios: %d\n", ret);
+               }
+               imx_iomux_v3_setup_multiple_pads(tx6ul_enet2_pads,
+                                               ARRAY_SIZE(tx6ul_enet2_pads));
+
+               writel(0x00100000, 0x020c80e4); /* assert ENET2_125M_EN */
+
+               /* Minimum PHY reset duration */
+               udelay(100);
+               gpio_set_value(TX6UL_FEC2_RST_GPIO, 1);
+               /* Wait for PHY internal POR to finish */
+               udelay(22000);
+
+               ret = fecmxc_initialize_multi(bis, 1, 2, ENET2_BASE_ADDR);
+               if (ret) {
+                       printf("failed to initialize FEC1: %d\n", ret);
+                       return ret;
+               }
+       }
+       return 0;
+}
+#endif /* CONFIG_FEC_MXC */
+
 #ifdef CONFIG_SERIAL_TAG
 void get_board_serial(struct tag_serialnr *serialnr)
 {
index c587d75..299e469 100644 (file)
@@ -510,7 +510,7 @@ ivt_end:
 #define IOMUXC_SW_PAD_CTL_PAD_DRAM_RESET       0x020e0288
 
 #define IOMUXC_SW_PAD_CTL_PAD_ENET1_TX_CLK     0x020e0368
-#define IOMUXC_SW_PAD_CTL_PAD_ENET2_TX_CLK     0x020e037c
+#define IOMUXC_SW_PAD_CTL_PAD_ENET2_TX_CLK     0x020e0388
 #define IOMUXC_SW_PAD_CTL_PAD_NAND_RE_B                0x020e0404
 #define IOMUXC_SW_PAD_CTL_PAD_NAND_WE_B                0x020e0408
 #define IOMUXC_SW_PAD_CTL_PAD_NAND_DATA00      0x020e040c
@@ -548,9 +548,9 @@ dcd_hdr:
        MXC_DCD_ITEM(IOMUXC_SW_PAD_CTL_PAD_SNVS_TAMPER1, 0x0000f0b9)
        /* ENET_REF_CLK */
        MXC_DCD_ITEM(IOMUXC_SW_MUX_CTL_PAD_ENET1_TX_CLK, 0x00000014)
-       MXC_DCD_ITEM(IOMUXC_SW_PAD_CTL_PAD_ENET1_TX_CLK, 0x000010b0)
+       MXC_DCD_ITEM(IOMUXC_SW_PAD_CTL_PAD_ENET1_TX_CLK, 0x000000b1)
        MXC_DCD_ITEM(IOMUXC_SW_MUX_CTL_PAD_ENET2_TX_CLK, 0x00000014)
-       MXC_DCD_ITEM(IOMUXC_SW_PAD_CTL_PAD_ENET2_TX_CLK, 0x000010b0)
+       MXC_DCD_ITEM(IOMUXC_SW_PAD_CTL_PAD_ENET2_TX_CLK, 0x000000b1)
        MXC_DCD_ITEM(IOMUXC_ENET1_REF_CLK1_SELECT_INPUT, 2)
        MXC_DCD_ITEM(IOMUXC_ENET2_REF_CLK2_SELECT_INPUT, 2)
        /* ETN PHY nRST */
@@ -598,9 +598,10 @@ dcd_hdr:
        MXC_DCD_ITEM(0x020c80b0, 0)
        MXC_DCD_ITEM(0x020c80c0, 1)
        MXC_DCD_ITEM(0x020c80a0, 0x0010201b) /* set video PLL to 648MHz */
+
        /* IOMUX: */
        MXC_DCD_ITEM(IOMUXC_GPR0, 0x00000000)
-       MXC_DCD_ITEM(IOMUXC_GPR1, 0x0f460005) /* default: 0x0f400005 ENET1_TX_CLK output */
+       MXC_DCD_ITEM(IOMUXC_GPR1, 0x0f460005) /* default: 0x0f400005 ENET[12]_TX_CLK output */
        MXC_DCD_ITEM(IOMUXC_GPR2, 0x00000000)
        MXC_DCD_ITEM(IOMUXC_GPR3, 0x00000fff)
        MXC_DCD_ITEM(IOMUXC_GPR4, 0x00000100)
index 23c5021..eb37ecd 100644 (file)
@@ -418,17 +418,18 @@ static inline void lcd_logo_plot(int x, int y) {}
 static void splash_align_axis(int *axis, unsigned long panel_size,
                                        unsigned long picture_size)
 {
-       unsigned long panel_picture_delta = panel_size - picture_size;
-       unsigned long axis_alignment;
+       int panel_picture_delta = panel_size - picture_size;
+       int axis_alignment;
 
        if (*axis == BMP_ALIGN_CENTER)
                axis_alignment = panel_picture_delta / 2;
+       else if (abs(*axis) > (int)panel_size)
+               axis_alignment = panel_size;
        else if (*axis < 0)
                axis_alignment = panel_picture_delta + *axis + 1;
        else
                return;
-
-       *axis = max(0, (int)axis_alignment);
+       *axis = axis_alignment;
 }
 #endif
 
@@ -621,7 +622,7 @@ int lcd_display_bitmap(ulong bmp_image, int x, int y)
        hdr_size = get_unaligned_le16(&bmp->header.size);
        debug("hdr_size=%d, bmp_bpix=%d\n", hdr_size, bmp_bpix);
 
-       colors = 1 << bmp_bpix;
+       colors = 1ULL << bmp_bpix;
 
        bpix = NBITS(panel_info.vl_bpix);
 
@@ -636,16 +637,14 @@ int lcd_display_bitmap(ulong bmp_image, int x, int y)
         * We support displaying 8bpp BMPs on 16bpp LCDs
         * and displaying 24bpp BMPs on 32bpp LCDs
         * */
-       if (bpix != bmp_bpix &&
-           !(bmp_bpix == 8 && bpix == 16) &&
-           !(bmp_bpix == 24 && bpix == 32)) {
+       if (bpix < bmp_bpix) {
                printf ("Error: %d bit/pixel mode, but BMP has %d bit/pixel\n",
                        bpix, get_unaligned_le16(&bmp->header.bit_count));
                return 1;
        }
 
-       debug("Display-bmp: %lu x %lu  with %llu colors, display %d\n",
-               width, height, colors, NBITS(bmp_bpix));
+       debug("Display-bmp: %lu x %lu  with %llu colors, display %llu\n",
+               width, height, colors, 1ULL << bpix);
 
        if (bmp_bpix == 8)
                lcd_set_cmap(bmp, colors);
@@ -658,11 +657,21 @@ int lcd_display_bitmap(ulong bmp_image, int x, int y)
 #endif /* CONFIG_SPLASH_SCREEN_ALIGN */
        bmap = (uchar *)bmp + get_unaligned_le32(&bmp->header.data_offset);
 
-       if ((x + width) > pwidth)
+       if (x < 0) {
+               width += x;
+               bmap += -x * bmp_bpix / 8;
+               x = 0;
+       }
+       if ((x + width) > pwidth) {
                width = pwidth - x;
+       }
+       if (y < 0) {
+               height += y;
+               y = 0;
+       }
        if ((y + height) > panel_info.vl_row) {
+               bmap += (y + height - panel_info.vl_row) * bmp_bpix / 8 * padded_width;
                height = panel_info.vl_row - y;
-               bmap += (panel_info.vl_row - y) * padded_width;
        }
 
        fb   = (uchar *)(lcd_base +
@@ -689,9 +698,9 @@ int lcd_display_bitmap(ulong bmp_image, int x, int y)
                for (i = 0; i < height; ++i) {
                        WATCHDOG_RESET();
                        for (j = 0; j < width; j++) {
-                               if (bpix != 16) {
+                               if (bpix == 8) {
                                        fb_put_byte(&fb, &bmap);
-                               } else {
+                               } else if (bpix == 16) {
                                        struct bmp_color_table_entry *entry;
                                        uint val;
 
@@ -704,17 +713,27 @@ int lcd_display_bitmap(ulong bmp_image, int x, int y)
                                                        entry->red >> 3 << 11;
                                        }
                                        *(uint16_t *)fb = val;
-                                       bmap++;
                                        fb += sizeof(uint16_t) / sizeof(*fb);
+                               } else if (bpix == 32) {
+                                       uint32_t *fb32 = (uint32_t *)fb;
+                                       struct bmp_color_table_entry *entry;
+                                       uint val;
+
+                                       if (cmap_base) {
+                                               val = cmap_base[*bmap];
+                                       } else {
+                                               entry = &palette[*bmap];
+                                               val = entry->blue |
+                                                       entry->green << 8 |
+                                                       entry->red << 16;
+                                       }
+                                       *fb32 = val;
+                                       fb += sizeof(uint32_t) / sizeof(*fb);
                                }
+                               bmap++;
                        }
-                       if (bpix > 8) {
-                               bmap += padded_width - width;
-                               fb   -= width * bpix / 8 + lcd_line_length;
-                       } else {
-                               bmap += padded_width;
-                               fb -= lcd_line_length;
-                       }
+                       bmap += padded_width - width;
+                       fb   -= width * bpix / 8 + lcd_line_length;
                }
                break;
        }
@@ -730,7 +749,7 @@ int lcd_display_bitmap(ulong bmp_image, int x, int y)
                }
                break;
 #endif /* CONFIG_BMP_16BPP */
-#if defined(CONFIG_BMP_24BMP)
+#if defined(CONFIG_BMP_24BPP)
        case 24:
                for (i = 0; i < height; ++i) {
                        for (j = 0; j < width; j++) {
@@ -739,6 +758,7 @@ int lcd_display_bitmap(ulong bmp_image, int x, int y)
                                *(fb++) = *(bmap++);
                                *(fb++) = 0;
                        }
+                       bmap += (padded_width - width) * 3;
                        fb -= lcd_line_length + width * (bpix / 8);
                }
                break;
@@ -759,6 +779,9 @@ int lcd_display_bitmap(ulong bmp_image, int x, int y)
                }
                break;
 #endif /* CONFIG_BMP_32BPP */
+       default:
+               printf("Logo with %ubpp on %ubpp display not supported\n",
+                       bmp_bpix, bpix);
        };
 
        lcd_sync();
index 3d0ffe4..9c27889 100644 (file)
@@ -1091,12 +1091,14 @@ int fecmxc_initialize_multi(bd_t *bd, int dev_id, int phy_id, uint32_t addr)
 #endif
        int ret;
 
-#ifdef CONFIG_SOC_MX28
+#if defined(CONFIG_SOC_MX28)
        /*
         * The i.MX28 has two ethernet interfaces, but they are not equal.
         * Only the first one can access the MDIO bus.
         */
        base_mii = MXS_ENET0_BASE;
+#elif defined(FEC_MDIO_BASE_ADDR)
+       base_mii = FEC_MDIO_BASE_ADDR;
 #else
        base_mii = addr;
 #endif
@@ -1105,12 +1107,14 @@ int fecmxc_initialize_multi(bd_t *bd, int dev_id, int phy_id, uint32_t addr)
        if (!bus)
                return -ENOMEM;
 #ifdef CONFIG_PHYLIB
-       phydev = phy_find_by_mask(bus, phy_id < 0 ? 0xff : (1 << phy_id),
+       static u8 phy_mask = 0xff;
+       phydev = phy_find_by_mask(bus, phy_id < 0 ? phy_mask : (1 << phy_id),
                                PHY_INTERFACE_MODE_RGMII);
        if (!phydev) {
                free(bus);
                return -ENOMEM;
        }
+       phy_mask &= ~(1 << phydev->addr);
        ret = fec_probe(bd, dev_id, addr, bus, phydev);
 #else
        ret = fec_probe(bd, dev_id, addr, bus, phy_id);
index 276e6ef..e87efb2 100644 (file)
 #ifndef CONFIG_SOC_MX6UL
 #define CONFIG_FEC_MXC_PHYADDR         0
 #define IMX_FEC_BASE                   ENET_BASE_ADDR
+#else
+#define FEC_MDIO_BASE_ADDR             ENET_BASE_ADDR
 #endif
 #define CONFIG_FEC_XCV_TYPE            RMII
 #endif