]> git.kernelconcepts.de Git - karo-tx-uboot.git/commitdiff
Merge branch 'u-boot/master' into u-boot-arm/master
authorAlbert ARIBAUD <albert.u.boot@aribaud.net>
Thu, 25 Jul 2013 15:57:46 +0000 (17:57 +0200)
committerAlbert ARIBAUD <albert.u.boot@aribaud.net>
Thu, 25 Jul 2013 15:57:46 +0000 (17:57 +0200)
arch/arm/cpu/armv7/highbank/timer.c
arch/arm/include/asm/arch-armv7/systimer.h
arch/arm/lib/board.c
board/altera/socfpga/Makefile [moved from board/altera/socfpga_cyclone5/Makefile with 100% similarity]
board/altera/socfpga/socfpga_cyclone5.c [moved from board/altera/socfpga_cyclone5/socfpga_cyclone5.c with 100% similarity]
board/highbank/highbank.c
boards.cfg
drivers/net/calxedaxgmac.c
include/configs/highbank.h

index 792a828cbf18b167e9e47ca1772bbe6c18325538..b61cd69bc61b3cebb3f2a821b322a1bac6da6a8a 100644 (file)
@@ -15,7 +15,7 @@
 
 #undef SYSTIMER_BASE
 #define SYSTIMER_BASE          0xFFF34000      /* Timer 0 and 1 base   */
-#define SYSTIMER_RATE          150000000
+#define SYSTIMER_RATE          (150000000 / 256)
 
 static ulong timestamp;
 static ulong lastinc;
@@ -29,11 +29,11 @@ int timer_init(void)
        /*
         * Setup timer0
         */
+       writel(0, &systimer_base->timer0control);
        writel(SYSTIMER_RELOAD, &systimer_base->timer0load);
        writel(SYSTIMER_RELOAD, &systimer_base->timer0value);
-       writel(SYSTIMER_EN | SYSTIMER_32BIT, &systimer_base->timer0control);
-
-       reset_timer_masked();
+       writel(SYSTIMER_EN | SYSTIMER_32BIT | SYSTIMER_PRESC_256,
+               &systimer_base->timer0control);
 
        return 0;
 
@@ -113,5 +113,5 @@ ulong get_timer_masked(void)
 
 ulong get_tbclk(void)
 {
-       return CONFIG_SYS_HZ;
+       return SYSTIMER_RATE;
 }
index b86ab691f2a17f6aab9abc325f068a6026b2703a..a0412bd340c87f4389e60dc279cbda5211fa5c3c 100644 (file)
@@ -14,6 +14,8 @@
 #define SYSTIMER_RELOAD                0xFFFFFFFF
 #define SYSTIMER_EN            (1 << 7)
 #define SYSTIMER_32BIT         (1 << 1)
+#define SYSTIMER_PRESC_16      (1 << 2)
+#define SYSTIMER_PRESC_256     (1 << 3)
 
 struct systimer {
        u32 timer0load;         /* 0x00 */
index 9c72a5353fe2cdd865f9896e915a45a89ecec5fb..34f50b08a5cd8ae9a284cd776b9628b231e48fa3 100644 (file)
@@ -435,6 +435,7 @@ void board_init_f(ulong bootflag)
        addr_sp += 128; /* leave 32 words for abort-stack   */
        gd->irq_sp = addr_sp;
 #endif
+       interrupt_init();
 
        debug("New Stack Pointer is: %08lx\n", addr_sp);
 
@@ -636,8 +637,6 @@ void board_init_r(gd_t *id, ulong dest_addr)
        misc_init_r();
 #endif
 
-        /* set up exceptions */
-       interrupt_init();
        /* enable exceptions */
        enable_interrupts();
 
index 8cdcea8aaca54f548738bf7503245a6d51053c21..4b272c780e101477074a85bb317f8cfc0671fa08 100644 (file)
 #include <asm/sizes.h>
 #include <asm/io.h>
 
+#define HB_AHCI_BASE                   0xffe08000
+
 #define HB_SREG_A9_PWR_REQ             0xfff3cf00
 #define HB_SREG_A9_BOOT_SRC_STAT       0xfff3cf04
+#define HB_SREG_A9_PWRDOM_STAT         0xfff3cf20
+
 #define HB_PWR_SUSPEND                 0
 #define HB_PWR_SOFT_RESET              1
 #define HB_PWR_HARD_RESET              2
 #define HB_PWR_SHUTDOWN                        3
 
+#define PWRDOM_STAT_SATA               0x80000000
+#define PWRDOM_STAT_PCI                        0x40000000
+#define PWRDOM_STAT_EMMC               0x20000000
+
 DECLARE_GLOBAL_DATA_PTR;
 
 /*
@@ -43,13 +51,17 @@ int board_eth_init(bd_t *bis)
        return rc;
 }
 
+#ifdef CONFIG_MISC_INIT_R
 int misc_init_r(void)
 {
        char envbuffer[16];
        u32 boot_choice;
+       u32 reg = readl(HB_SREG_A9_PWRDOM_STAT);
 
-       ahci_init(0xffe08000);
-       scsi_scan(1);
+       if (reg & PWRDOM_STAT_SATA) {
+               ahci_init(HB_AHCI_BASE);
+               scsi_scan(1);
+       }
 
        boot_choice = readl(HB_SREG_A9_BOOT_SRC_STAT) & 0xff;
        sprintf(envbuffer, "bootcmd%d", boot_choice);
@@ -61,6 +73,7 @@ int misc_init_r(void)
 
        return 0;
 }
+#endif
 
 int dram_init(void)
 {
@@ -74,6 +87,22 @@ void dram_init_banksize(void)
        gd->bd->bi_dram[0].size =  PHYS_SDRAM_1_SIZE;
 }
 
+#if defined(CONFIG_OF_BOARD_SETUP)
+void ft_board_setup(void *fdt, bd_t *bd)
+{
+       static const char disabled[] = "disabled";
+       u32 reg = readl(HB_SREG_A9_PWRDOM_STAT);
+
+       if (!(reg & PWRDOM_STAT_SATA))
+               do_fixup_by_compat(fdt, "calxeda,hb-ahci", "status",
+                       disabled, sizeof(disabled), 1);
+
+       if (!(reg & PWRDOM_STAT_EMMC))
+               do_fixup_by_compat(fdt, "calxeda,hb-sdhci", "status",
+                       disabled, sizeof(disabled), 1);
+}
+#endif
+
 void reset_cpu(ulong addr)
 {
        writel(HB_PWR_HARD_RESET, HB_SREG_A9_PWR_REQ);
index 944ed4cf05b13d19180caf4e439f5e1d303f0bba..94261da1c1c9a4d0f3e8a0f860a1da9d9eaf9291 100644 (file)
@@ -337,7 +337,7 @@ kzm9g                        arm         armv7       kzm9g               kmc
 armadillo-800eva             arm         armv7       armadillo-800eva    atmark-techno  rmobile
 zynq                         arm         armv7       zynq                xilinx         zynq
 zynq_dcc                     arm         armv7       zynq                xilinx         zynq        zynq:ZYNQ_DCC
-socfpga_cyclone5                arm         armv7          socfpga_cyclone5    altera              socfpga
+socfpga_cyclone5                arm         armv7          socfpga    altera               socfpga
 actux1_4_16                  arm         ixp         actux1              -              -           actux1:FLASH2X2
 actux1_4_32                  arm         ixp         actux1              -              -           actux1:FLASH2X2,RAM_32MB
 actux1_8_16                  arm         ixp         actux1              -              -           actux1:FLASH1X8
index 2c617105f5711de4e67f9f330075a12edbe0f22f..ff94865c5da038422b1b919670fa233b411d6f5a 100644 (file)
@@ -390,7 +390,7 @@ static int xgmac_init(struct eth_device *dev, bd_t * bis)
        /* set flow control parameters and store and forward mode */
        value = (FIFO_MINUS_12K << XGMAC_CORE_OMR_RFD_SHIFT) |
                (FIFO_MINUS_4K << XGMAC_CORE_OMR_RFA_SHIFT) |
-               XGMAC_CORE_OMR_EFC | XGMAC_CORE_OMR_TSF | XGMAC_CORE_OMR_RSF;
+               XGMAC_CORE_OMR_EFC | XGMAC_CORE_OMR_TSF;
        writel(value, &regs->core_opmode);
 
        /* enable pause frames */
index e7459c179ba1b582934c7e689ce37479dcc3511a..a5743d63df5174f8e9baceb0c7f2df45993a276a 100644 (file)
@@ -7,14 +7,18 @@
 #ifndef __CONFIG_H
 #define __CONFIG_H
 
+#define CONFIG_SYS_DCACHE_OFF
 #define CONFIG_L2_OFF
+#define CONFIG_SYS_THUMB_BUILD
 
 #define CONFIG_SYS_NO_FLASH
 #define CFG_HZ                         1000
 #define CONFIG_SYS_HZ                  CFG_HZ
 
 #define CONFIG_OF_LIBFDT
+#define CONFIG_OF_BOARD_SETUP
 #define CONFIG_FIT
+#define CONFIG_SUPPORT_RAW_INITRD
 #define CONFIG_SYS_BOOTMAPSZ           (16 << 20)
 
 /*
@@ -27,7 +31,7 @@
 #define CONFIG_PL01x_PORTS             { (void *)(0xFFF36000) }
 #define CONFIG_CONS_INDEX              0
 
-#define CONFIG_BAUDRATE                        38400
+#define CONFIG_BAUDRATE                        115200
 
 #define CONFIG_BOOTCOUNT_LIMIT
 #define CONFIG_SYS_BOOTCOUNT_SINGLEWORD
@@ -43,6 +47,7 @@
                                        CONFIG_SYS_SCSI_MAX_LUN)
 
 #define CONFIG_DOS_PARTITION
+#define CONFIG_EFI_PARTITION
 
 #define CONFIG_CALXEDA_XGMAC
 
 #include <config_cmd_default.h>
 
 #define CONFIG_CMD_BDI
+#define CONFIG_CMD_BOOTZ
 #define CONFIG_CMD_DHCP
 #define CONFIG_CMD_ELF
 #define CONFIG_CMD_MEMORY
 #define CONFIG_CMD_LOADS
 #define CONFIG_CMD_SCSI
 #define CONFIG_CMD_EXT2
+#define CONFIG_CMD_EXT4
+#define CONFIG_CMD_FAT
 #define CONFIG_CMD_PXE
 #define CONFIG_MENU
 
 #define CONFIG_BOOTDELAY               2
+#define CONFIG_BOOT_RETRY_TIME         -1
+#define CONFIG_RESET_TO_RETRY
+#define CONFIG_AUTOBOOT_KEYED
+#define CONFIG_AUTOBOOT_PROMPT "Autobooting in %d seconds...\nPress <s> to stop or <d> to delay\n", bootdelay
+
 /*
  * Miscellaneous configurable options
  */
 #define CONFIG_CMDLINE_EDITING
 #define CONFIG_AUTO_COMPLETE
 #define CONFIG_SYS_LONGHELP            /* undef to save memory          */
-#define CONFIG_SYS_CBSIZE              256     /* Console I/O Buffer Size */
+#define CONFIG_SYS_CBSIZE              1024    /* Console I/O Buffer Size */
 #define CONFIG_SYS_MAXARGS             16      /* max number of cmd args */
 #define CONFIG_SYS_BARGSIZE            CONFIG_SYS_CBSIZE
 #define CONFIG_SYS_PROMPT              "Highbank #"
+#define CONFIG_SYS_HUSH_PARSER
 /* Print Buffer Size */
 #define CONFIG_SYS_PBSIZE              (CONFIG_SYS_CBSIZE + \
                                         sizeof(CONFIG_SYS_PROMPT)+16)
 
 #define CONFIG_SYS_LOAD_ADDR           0x800000
+#define CONFIG_SYS_64BIT_LBA
+
 
 /*-----------------------------------------------------------------------
  * Physical Memory Map