karo: tx6: change drive strength of Ethernet related pads to improve EMC

EMC measurements have revealed excessive noise at multiples of the
50MHz ethernet reference clock on TX6 modules. Changing the drive
strength of the ENET_REF_CLK pad vastly reduces this noise and
improves the signal waveform substanitally.

On TXUL also the MDC and MDIO pads contribute to this noise, since
they are routed off-board for connecting an optional second ethernet
PHY. Adjusting the drive strength for those pads on the TXUL modules
also improves the signal quality and reduces EMI.

diff --git a/board/karo/tx6/tx6qdl.c b/board/karo/tx6/tx6qdl.c
index 8300076658ff7b10bf756ca82a5d8fe818b21de6..b4a6fa9390f4e03340ac3335785d270612c03922 100644 (file)
--- a/board/karo/tx6/tx6qdl.c
+++ b/board/karo/tx6/tx6qdl.c
@@ -71,7 +71,7 @@ char __csf_data[0] __attribute__((section(".__csf_data")));
 #define TX6_FEC_PAD_CTRL       MUX_PAD_CTRL(PAD_CTL_PUS_100K_UP |      \
                                             PAD_CTL_SPEED_MED |        \
                                             PAD_CTL_DSE_40ohm |        \
-                                            PAD_CTL_SRE_FAST)
+                                            PAD_CTL_SRE_SLOW)
 #define TX6_GPIO_PAD_CTRL      MUX_PAD_CTRL(PAD_CTL_PUS_22K_UP |       \
                                             PAD_CTL_SPEED_MED |        \
                                             PAD_CTL_DSE_34ohm |        \
@@ -121,7 +121,10 @@ static const iomux_v3_cfg_t const tx6qdl_fec_pads[] = {
        /* FEC functions */
        MX6_PAD_ENET_MDC__ENET_MDC | TX6_FEC_PAD_CTRL,
        MX6_PAD_ENET_MDIO__ENET_MDIO | TX6_FEC_PAD_CTRL,
-       MX6_PAD_GPIO_16__ENET_REF_CLK | TX6_FEC_PAD_CTRL,
+       MX6_PAD_GPIO_16__ENET_REF_CLK | MUX_PAD_CTRL(PAD_CTL_PUS_100K_UP |
+                                                    PAD_CTL_SPEED_LOW |
+                                                    PAD_CTL_DSE_80ohm |
+                                                    PAD_CTL_SRE_SLOW),
        MX6_PAD_ENET_RX_ER__ENET_RX_ER | TX6_FEC_PAD_CTRL,
        MX6_PAD_ENET_CRS_DV__ENET_RX_EN | TX6_FEC_PAD_CTRL,
        MX6_PAD_ENET_RXD1__ENET_RX_DATA1 | TX6_FEC_PAD_CTRL,

diff --git a/board/karo/tx6/tx6ul.c b/board/karo/tx6/tx6ul.c
index d97b26b733954989ef1bfbe0956e6a5a465aba3a..5606cbf432dbdd64fcf714f6b2c16be6ce3e7d89 100644 (file)
--- a/board/karo/tx6/tx6ul.c
+++ b/board/karo/tx6/tx6ul.c
@@ -86,7 +86,7 @@ char __csf_data[0] __attribute__((section(".__csf_data")));
                                        PAD_CTL_DSE_34ohm |             \
                                        PAD_CTL_SPEED_MED)
 #define TX6UL_ENET_PAD_CTRL    MUX_PAD_CTRL(PAD_CTL_SPEED_HIGH |       \
-                                       PAD_CTL_DSE_48ohm |             \
+                                       PAD_CTL_DSE_120ohm |            \
                                        PAD_CTL_PUS_100K_UP |           \
                                        PAD_CTL_SRE_FAST)
 #define TX6UL_GPIO_OUT_PAD_CTRL        MUX_PAD_CTRL(PAD_CTL_SPEED_LOW |        \
@@ -124,15 +124,15 @@ static const iomux_v3_cfg_t const tx6ul_pads[] = {
 
 static const iomux_v3_cfg_t const tx6ul_enet1_pads[] = {
        /* FEC functions */
-       MX6_PAD_GPIO1_IO07__ENET1_MDC | MUX_PAD_CTRL(PAD_CTL_DSE_48ohm |
-                                                    PAD_CTL_SPEED_MED),
+       MX6_PAD_GPIO1_IO07__ENET1_MDC | MUX_PAD_CTRL(PAD_CTL_DSE_120ohm |
+                                                    PAD_CTL_SPEED_LOW),
        MX6_PAD_GPIO1_IO06__ENET1_MDIO | MUX_PAD_CTRL(PAD_CTL_PUS_100K_UP |
-                                                     PAD_CTL_DSE_48ohm |
-                                                     PAD_CTL_SPEED_MED),
-       MX6_PAD_ENET1_TX_CLK__ENET1_REF_CLK1 | MUX_CFG_SION |
-                                       MUX_PAD_CTRL(PAD_CTL_SPEED_MED |
-                                                    PAD_CTL_DSE_40ohm |
-                                                    PAD_CTL_SRE_FAST),
+                                                     PAD_CTL_DSE_120ohm |
+                                                     PAD_CTL_SPEED_LOW),
+       MX6_PAD_ENET1_TX_CLK__ENET1_REF_CLK1 | MUX_PAD_CTRL(PAD_CTL_SPEED_LOW |
+                                                    PAD_CTL_DSE_80ohm |
+                                                    PAD_CTL_SRE_SLOW),
+
        MX6_PAD_ENET1_RX_ER__ENET1_RX_ER | TX6UL_ENET_PAD_CTRL,
        MX6_PAD_ENET1_RX_EN__ENET1_RX_EN | TX6UL_ENET_PAD_CTRL,
        MX6_PAD_ENET1_RX_DATA1__ENET1_RDATA01 | TX6UL_ENET_PAD_CTRL,
@@ -143,10 +143,9 @@ static const iomux_v3_cfg_t const tx6ul_enet1_pads[] = {
 };
 
 static const iomux_v3_cfg_t const tx6ul_enet2_pads[] = {
-       MX6_PAD_ENET2_TX_CLK__ENET2_REF_CLK2 | MUX_CFG_SION |
-                                       MUX_PAD_CTRL(PAD_CTL_SPEED_HIGH |
-                                                    PAD_CTL_DSE_48ohm |
-                                                    PAD_CTL_SRE_FAST),
+       MX6_PAD_ENET2_TX_CLK__ENET2_REF_CLK2 | MUX_PAD_CTRL(PAD_CTL_SPEED_LOW |
+                                                           PAD_CTL_DSE_80ohm |
+                                                           PAD_CTL_SRE_SLOW),
        MX6_PAD_ENET2_RX_ER__ENET2_RX_ER | TX6UL_ENET_PAD_CTRL,
        MX6_PAD_ENET2_RX_EN__ENET2_RX_EN | TX6UL_ENET_PAD_CTRL,
        MX6_PAD_ENET2_RX_DATA1__ENET2_RDATA01 | TX6UL_ENET_PAD_CTRL,