/*
* Memory configuration options
*/
-#define CONFIG_NR_DRAM_BANKS 1 /* 1 bank of SDRAM */
+#define CONFIG_NR_DRAM_BANKS 0x1 /* 1 bank of SDRAM */
#define PHYS_SDRAM_1 0x40000000 /* SDRAM Bank #1 */
#define CONFIG_STACKSIZE SZ_64K
#define CONFIG_SYS_MALLOC_LEN SZ_4M
#define CONFIG_SYS_NAND_U_BOOT_OFFS CONFIG_SYS_NAND_BLOCK_SIZE
#define CONFIG_CMD_NAND_TRIMFFS
#define CONFIG_SYS_MXS_DMA_CHANNEL 4
-#define CONFIG_SYS_NAND_MAX_CHIPS 1
-#define CONFIG_SYS_MAX_NAND_DEVICE 1
+#define CONFIG_SYS_NAND_MAX_CHIPS 0x1
+#define CONFIG_SYS_MAX_NAND_DEVICE 0x1
#define CONFIG_SYS_NAND_5_ADDR_CYCLE
#define CONFIG_SYS_NAND_USE_FLASH_BBT
#define CONFIG_SYS_NAND_BASE 0x00000000
* Memory configuration options
*/
#define CONFIG_SYS_SDRAM_DDR3
-#define CONFIG_NR_DRAM_BANKS 1 /* 1 bank of SDRAM */
+#define CONFIG_NR_DRAM_BANKS 0x1 /* '1' would be converted to 'y' by define2mk.sed */
#define PHYS_SDRAM_1 0x80000000 /* SDRAM Bank #1 */
#define CONFIG_MAX_RAM_BANK_SIZE SZ_1G
#define CONFIG_SYS_NAND_ECCSIZE 512
#define CONFIG_SYS_NAND_ECCBYTES 14
#define CONFIG_CMD_NAND_TRIMFFS
-#define CONFIG_SYS_NAND_MAX_CHIPS 1
+#define CONFIG_SYS_NAND_MAX_CHIPS 0x1
#define CONFIG_SYS_NAND_MAXBAD 20 /* Max. number of bad blocks guaranteed by manufacturer */
-#define CONFIG_SYS_MAX_NAND_DEVICE 1
+#define CONFIG_SYS_MAX_NAND_DEVICE 0x1
#define CONFIG_SYS_NAND_5_ADDR_CYCLE
#define CONFIG_SYS_NAND_USE_FLASH_BBT
#ifdef CONFIG_ENV_IS_IN_NAND
#define CONFIG_MXC_NAND_IP_REGS_BASE NFC_BASE_ADDR
#define CONFIG_MXC_NAND_HWECC
#define CONFIG_CMD_NAND_TRIMFFS
-#define CONFIG_SYS_NAND_MAX_CHIPS 1
-#define CONFIG_SYS_MAX_NAND_DEVICE 1
+#define CONFIG_SYS_NAND_MAX_CHIPS 0x1
+#define CONFIG_SYS_MAX_NAND_DEVICE 0x1
#define CONFIG_SYS_NAND_5_ADDR_CYCLE
#define CONFIG_SYS_NAND_USE_FLASH_BBT
#ifdef CONFIG_ENV_IS_IN_NAND
#define CONFIG_MXC_NAND_IP_REGS_BASE NFC_BASE_ADDR
#define CONFIG_MXC_NAND_HWECC
#define CONFIG_CMD_NAND_TRIMFFS
-#define CONFIG_SYS_NAND_MAX_CHIPS 1
-#define CONFIG_SYS_MAX_NAND_DEVICE 1
+#define CONFIG_SYS_NAND_MAX_CHIPS 0x1
+#define CONFIG_SYS_MAX_NAND_DEVICE 0x1
#define CONFIG_SYS_NAND_5_ADDR_CYCLE
#define CONFIG_SYS_NAND_USE_FLASH_BBT
#ifdef CONFIG_ENV_IS_IN_NAND
/*
* Memory configuration options
*/
-#define CONFIG_NR_DRAM_BANKS 1 /* # of SDRAM banks */
+#define CONFIG_NR_DRAM_BANKS 0x1 /* # of SDRAM banks */
#define PHYS_SDRAM_1 0x10000000 /* Base address of bank 1 */
#ifdef CONFIG_SYS_SDRAM_BUS_WIDTH
#define PHYS_SDRAM_1_WIDTH CONFIG_SYS_SDRAM_BUS_WIDTH
#define CONFIG_APBH_DMA_BURST8
#define CONFIG_CMD_NAND_TRIMFFS
#define CONFIG_SYS_MXS_DMA_CHANNEL 4
-#define CONFIG_SYS_MAX_FLASH_BANKS 1
-#define CONFIG_SYS_NAND_MAX_CHIPS 1
-#define CONFIG_SYS_MAX_NAND_DEVICE 1
+#define CONFIG_SYS_MAX_FLASH_BANKS 0x1
+#define CONFIG_SYS_NAND_MAX_CHIPS 0x1
+#define CONFIG_SYS_MAX_NAND_DEVICE 0x1
#define CONFIG_SYS_NAND_5_ADDR_CYCLE
#define CONFIG_SYS_NAND_USE_FLASH_BBT
#define CONFIG_SYS_NAND_BASE 0x00000000
*/
#ifdef CONFIG_ENV_IS_IN_MMC
#define CONFIG_SYS_MMC_ENV_DEV 0
-#define CONFIG_SYS_MMC_ENV_PART 1
+#define CONFIG_SYS_MMC_ENV_PART 0x1
#define CONFIG_DYNAMIC_MMC_DEVNO
#endif /* CONFIG_ENV_IS_IN_MMC */
#else