/MLO*
/SPL
/System.map
-/u-boot
-/u-boot.hex
-/u-boot.imx
-/u-boot-with-spl.imx
-/u-boot-with-nand-spl.imx
-/u-boot.map
-/u-boot.srec
-/u-boot.ldr
-/u-boot.ldr.hex
-/u-boot.ldr.srec
-/u-boot.img
-/u-boot.kwb
-/u-boot.sha1
-/u-boot.dis
-/u-boot.lds
-/u-boot.ubl
-/u-boot.ais
-/u-boot.sb
+/u-boot*
#
# git files that we don't want to ignore even it they are dot-files
--- /dev/null
+#
+# Kbuild for top-level directory of U-Boot
+# This file takes care of the following:
+# 1) Generate generic-asm-offsets.h
+# 2) Generate asm-offsets.h
+
+#####
+# 1) Generate generic-asm-offsets.h
+
+generic-offsets-file := include/generated/generic-asm-offsets.h
+
+always := $(generic-offsets-file)
+targets := $(generic-offsets-file) lib/asm-offsets.s
+
+quiet_cmd_generic-offsets = GEN $@
+define cmd_generic-offsets
+ (set -e; \
+ echo "#ifndef __GENERIC_ASM_OFFSETS_H__"; \
+ echo "#define __GENERIC_ASM_OFFSETS_H__"; \
+ echo "/*"; \
+ echo " * DO NOT MODIFY."; \
+ echo " *"; \
+ echo " * This file was generated by Kbuild"; \
+ echo " *"; \
+ echo " */"; \
+ echo ""; \
+ sed -ne $(sed-y) $<; \
+ echo ""; \
+ echo "#endif" ) > $@
+endef
+
+# We use internal kbuild rules to avoid the "is up to date" message from make
+lib/asm-offsets.s: lib/asm-offsets.c FORCE
+ $(Q)mkdir -p $(dir $@)
+ $(call if_changed_dep,cc_s_c)
+
+$(obj)/$(generic-offsets-file): lib/asm-offsets.s Kbuild
+ $(Q)mkdir -p $(dir $@)
+ $(call cmd,generic-offsets)
+
+#####
+# 2) Generate asm-offsets.h
+#
+
+ifneq ($(wildcard $(srctree)/$(CPUDIR)/$(SOC)/asm-offsets.c),)
+offsets-file := include/generated/asm-offsets.h
+endif
+
+always += $(offsets-file)
+targets += $(offsets-file)
+targets += $(CPUDIR)/$(SOC)/asm-offsets.s
+
+
+# Default sed regexp - multiline due to syntax constraints
+define sed-y
+ "/^->/{s:->#\(.*\):/* \1 */:; \
+ s:^->\([^ ]*\) [\$$#]*\([-0-9]*\) \(.*\):#define \1 \2 /* \3 */:; \
+ s:^->\([^ ]*\) [\$$#]*\([^ ]*\) \(.*\):#define \1 \2 /* \3 */:; \
+ s:->::; p;}"
+endef
+
+CFLAGS_asm-offsets.o := -DDO_DEPS_ONLY
+
+quiet_cmd_offsets = GEN $@
+define cmd_offsets
+ (set -e; \
+ echo "#ifndef __ASM_OFFSETS_H__"; \
+ echo "#define __ASM_OFFSETS_H__"; \
+ echo "/*"; \
+ echo " * DO NOT MODIFY."; \
+ echo " *"; \
+ echo " * This file was generated by Kbuild"; \
+ echo " *"; \
+ echo " */"; \
+ echo ""; \
+ sed -ne $(sed-y) $<; \
+ echo ""; \
+ echo "#endif" ) > $@
+endef
+
+# We use internal kbuild rules to avoid the "is up to date" message from make
+$(CPUDIR)/$(SOC)/asm-offsets.s: $(CPUDIR)/$(SOC)/asm-offsets.c FORCE
+ $(Q)mkdir -p $(dir $@)
+ $(call if_changed_dep,cc_s_c)
+
+$(obj)/$(offsets-file): $(CPUDIR)/$(SOC)/asm-offsets.s
+ $(call cmd,offsets)
#########################################################################
-TIMESTAMP_FILE = include/generated/timestamp_autogenerated.h
-VERSION_FILE = include/generated/version_autogenerated.h
-
HOSTARCH := $(shell uname -m | \
sed -e s/i.86/x86/ \
-e s/sun4u/sparc64/ \
-fno-builtin -ffreestanding
KBUILD_AFLAGS := -D__ASSEMBLY__
-U_BOOT_VERSION = $(VERSION)$(if $(PATCHLEVEL),.$(PATCHLEVEL)$(if $(SUBLEVEL),.$(SUBLEVEL)))$(EXTRAVERSION)
+# Read UBOOTRELEASE from include/config/uboot.release (if it exists)
+UBOOTRELEASE = $(shell cat include/config/uboot.release 2> /dev/null)
+UBOOTVERSION = $(VERSION)$(if $(PATCHLEVEL),.$(PATCHLEVEL)$(if $(SUBLEVEL),.$(SUBLEVEL)))$(EXTRAVERSION)
-export VERSION PATCHLEVEL SUBLEVEL U_BOOT_VERSION
+export VERSION PATCHLEVEL SUBLEVEL UBOOTRELEASE UBOOTVERSION
export ARCH CPU BOARD VENDOR SOC
export CONFIG_SHELL HOSTCC HOSTCFLAGS HOSTLDFLAGS CROSS_COMPILE AS LD CC
export CPP AR NM LDR STRIP OBJCOPY OBJDUMP
# Detect when mixed targets is specified, and make a second invocation
# of make so .config is not included in this case either (for *config).
+version_h := include/generated/version_autogenerated.h
+timestamp_h := include/generated/timestamp_autogenerated.h
+
no-dot-config-targets := clean clobber mrproper distclean \
- cscope TAGS %tags help %docs check% coccicheck \
- backup
+ help %docs check% coccicheck \
+ ubootversion backup
config-targets := 0
mixed-targets := 0
$(error "System not configured - see README")
endif
-ifeq ($(__HAVE_ARCH_GENERIC_BOARD),)
-ifneq ($(CONFIG_SYS_GENERIC_BOARD),)
-$(error Your architecture does not support generic board. \
-Please undefined CONFIG_SYS_GENERIC_BOARD in your board config file)
-endif
-endif
-
# If board code explicitly specified LDSCRIPT or CONFIG_SYS_LDSCRIPT, use
# that (or fail if absent). Otherwise, search for a linker script in a
# standard location.
#LDSCRIPT := $(TOPDIR)/board/$(BOARDDIR)/u-boot.lds.debug
ifdef CONFIG_SYS_LDSCRIPT
# need to strip off double quotes
- LDSCRIPT := $(CONFIG_SYS_LDSCRIPT:"%"=%)
+ LDSCRIPT := $(srctree)/$(CONFIG_SYS_LDSCRIPT:"%"=%)
endif
endif
# We don't expect a Makefile here
LDSCRIPT_MAKEFILE_DIR =
endif
- ifeq ($(wildcard $(LDSCRIPT)),)
-$(error could not find linker script)
- endif
endif
else
KBUILD_AFLAGS += -g
# Report stack usage if supported
-KBUILD_CFLAGS += $(call cc-option,-fstack-usage)
+ifeq ($(shell $(CONFIG_SHELL) $(srctree)/scripts/gcc-stack-usage.sh $(CC)),y)
+ KBUILD_CFLAGS += -fstack-usage
+endif
KBUILD_CFLAGS += $(call cc-option,-Wno-format-nonliteral)
cpp_flags := $(KBUILD_CPPFLAGS) $(CPPFLAGS) $(UBOOTINCLUDE) $(NOSTDINC_FLAGS)
c_flags := $(KBUILD_CFLAGS) $(cpp_flags)
-.PHONY : $(VERSION_FILE) $(TIMESTAMP_FILE)
-
#########################################################################
# U-Boot objects....order is important (i.e. start must be first)
ALL-$(CONFIG_SPL) += spl/u-boot-spl.bin
ALL-$(CONFIG_SPL_FRAMEWORK) += u-boot.img
ALL-$(CONFIG_TPL) += tpl/u-boot-tpl.bin
-ALL-$(CONFIG_OF_SEPARATE) += u-boot-dtb.bin
+ALL-$(CONFIG_OF_SEPARATE) += u-boot.dtb u-boot-dtb.bin
ifneq ($(CONFIG_SPL_TARGET),)
ALL-$(CONFIG_SPL) += $(CONFIG_SPL_TARGET:"%"=%)
endif
endif
endif
-LDFLAGS_u-boot += -T u-boot.lds $(LDFLAGS_FINAL)
+LDFLAGS_u-boot += $(LDFLAGS_FINAL)
ifneq ($(CONFIG_SYS_TEXT_BASE),)
LDFLAGS_u-boot += -Ttext $(CONFIG_SYS_TEXT_BASE)
endif
+quiet_cmd_objcopy = OBJCOPY $@
+cmd_objcopy = $(OBJCOPY) $(OBJCOPYFLAGS) $(OBJCOPYFLAGS_$(@F)) $< $@
+
+quiet_cmd_mkimage = UIMAGE $@
+cmd_mkimage = $(objtree)/tools/mkimage $(MKIMAGEFLAGS_$(@F)) -d $< $@ \
+ $(if $(KBUILD_VERBOSE:1=), >/dev/null)
+
+quiet_cmd_cat = CAT $@
+cmd_cat = cat $(filter-out $(PHONY), $^) > $@
+
+append = cat $(filter-out $< $(PHONY), $^) >> $@
+
+quiet_cmd_pad_cat = CAT $@
+cmd_pad_cat = $(cmd_objcopy) && $(append) || rm -f $@
+
all: $(ALL-y)
PHONY += dtbs
dtbs dts/dt.dtb: checkdtc u-boot
$(Q)$(MAKE) $(build)=dts dtbs
-u-boot-dtb.bin: u-boot.bin dts/dt.dtb
- cat $^ >$@
+u-boot-dtb.bin: u-boot.bin dts/dt.dtb FORCE
+ $(call if_changed,cat)
-u-boot.hex: u-boot
- $(OBJCOPY) ${OBJCFLAGS} -O ihex $< $@
+quiet_cmd_copy = COPY $@
+ cmd_copy = cp $< $@
-u-boot.srec: u-boot
- $(OBJCOPY) ${OBJCFLAGS} -O srec $< $@
+u-boot.dtb: dts/dt.dtb
+ $(call cmd,copy)
-u-boot.bin: u-boot
- $(OBJCOPY) ${OBJCFLAGS} -O binary $< $@
- $(call DO_STATIC_RELA,$<,$@,$(CONFIG_SYS_TEXT_BASE))
- $(BOARD_SIZE_CHECK)
+OBJCOPYFLAGS_u-boot.hex := -O ihex
+
+OBJCOPYFLAGS_u-boot.srec := -O srec
+
+u-boot.hex u-boot.srec: u-boot FORCE
+ $(call if_changed,objcopy)
+
+OBJCOPYFLAGS_u-boot.bin := -O binary
+
+u-boot.bin: u-boot FORCE
+ $(call if_changed,objcopy)
+ $(call DO_STATIC_RELA,$<,$@,$(CONFIG_SYS_TEXT_BASE))
+ $(BOARD_SIZE_CHECK)
u-boot.ldr: u-boot
$(CREATE_LDR_ENV)
$(LDR) -T $(CONFIG_BFIN_CPU) -c $@ $< $(LDR_FLAGS)
$(BOARD_SIZE_CHECK)
-u-boot.ldr.hex: u-boot.ldr
- $(OBJCOPY) ${OBJCFLAGS} -O ihex $< $@ -I binary
+OBJCOPYFLAGS_u-boot.ldr.hex := -I binary -O ihex
-u-boot.ldr.srec: u-boot.ldr
- $(OBJCOPY) ${OBJCFLAGS} -O srec $< $@ -I binary
+OBJCOPYFLAGS_u-boot.ldr.srec := -I binary -O srec
+
+u-boot.ldr.hex u-boot.ldr.srec: u-boot.ldr FORCE
+ $(call if_changed,objcopy)
#
# U-Boot entry point, needed for booting of full-blown U-Boot
CONFIG_SYS_UBOOT_START := 0
endif
-u-boot.img: u-boot.bin
- tools/mkimage -A $(ARCH) -T firmware -C none \
- -O u-boot -a $(CONFIG_SYS_TEXT_BASE) \
- -e $(CONFIG_SYS_UBOOT_START) \
- -n $(shell sed -n -e 's/.*U_BOOT_VERSION//p' $(VERSION_FILE) | \
- sed -e 's/"[ ]*$$/ for $(BOARD) board"/') \
- -d $< $@
+MKIMAGEFLAGS_u-boot.img = -A $(ARCH) -T firmware -C none -O u-boot \
+ -a $(CONFIG_SYS_TEXT_BASE) -e $(CONFIG_SYS_UBOOT_START) \
+ -n "U-Boot $(UBOOTRELEASE) for $(BOARD) board"
-u-boot.imx: u-boot.bin
- $(MAKE) $(build)=arch/arm/imx-common $(objtree)/u-boot.imx
+MKIMAGEFLAGS_u-boot.kwb = -n $(CONFIG_SYS_KWD_CONFIG) -T kwbimage \
+ -a $(CONFIG_SYS_TEXT_BASE) -e $(CONFIG_SYS_TEXT_BASE)
-u-boot.kwb: u-boot.bin
- tools/mkimage -n $(CONFIG_SYS_KWD_CONFIG) -T kwbimage \
- -a $(CONFIG_SYS_TEXT_BASE) -e $(CONFIG_SYS_TEXT_BASE) -d $< $@
+MKIMAGEFLAGS_u-boot.pbl = -n $(CONFIG_SYS_FSL_PBL_RCW) \
+ -R $(CONFIG_SYS_FSL_PBL_PBI) -T pblimage
-u-boot.pbl: u-boot.bin
- tools/mkimage -n $(CONFIG_SYS_FSL_PBL_RCW) \
- -R $(CONFIG_SYS_FSL_PBL_PBI) -T pblimage \
- -d $< $@
+u-boot.img u-boot.kwb u-boot.pbl: u-boot.bin FORCE
+ $(call if_changed,mkimage)
+
+u-boot.imx: u-boot.bin
+ $(Q)$(MAKE) $(build)=arch/arm/imx-common $@
u-boot.sha1: u-boot.bin
tools/ubsha1 u-boot.bin
u-boot.dis: u-boot
$(OBJDUMP) -d $< > $@
-# $@ is output, $(1) and $(2) are inputs, $(3) is padded intermediate,
-# $(4) is pad-to
-SPL_PAD_APPEND = \
- $(OBJCOPY) ${OBJCFLAGS} --pad-to=$(4) -I binary -O binary \
- $(1) $(3); \
- cat $(3) $(2) > $@; \
- rm $(3)
-
ifdef CONFIG_TPL
SPL_PAYLOAD := tpl/u-boot-with-tpl.bin
else
SPL_PAYLOAD := u-boot.bin
endif
-u-boot-with-spl.bin: spl/u-boot-spl.bin $(SPL_PAYLOAD)
- $(call SPL_PAD_APPEND,$<,$(SPL_PAYLOAD),spl/u-boot-spl-pad.bin,$(CONFIG_SPL_PAD_TO))
+OBJCOPYFLAGS_u-boot-with-spl.bin = -I binary -O binary \
+ --pad-to=$(CONFIG_SPL_PAD_TO)
+u-boot-with-spl.bin: spl/u-boot-spl.bin $(SPL_PAYLOAD) FORCE
+ $(call if_changed,pad_cat)
-tpl/u-boot-with-tpl.bin: tpl/u-boot-tpl.bin u-boot.bin
- $(call SPL_PAD_APPEND,$<,u-boot.bin,tpl/u-boot-tpl-pad.bin,$(CONFIG_TPL_PAD_TO))
+OBJCOPYFLAGS_u-boot-with-tpl.bin = -I binary -O binary \
+ --pad-to=$(CONFIG_TPL_PAD_TO)
+tpl/u-boot-with-tpl.bin: tpl/u-boot-tpl.bin u-boot.bin FORCE
+ $(call if_changed,pad_cat)
-u-boot-with-spl.imx: spl/u-boot-spl.bin u-boot.bin
- $(MAKE) $(build)=arch/arm/imx-common \
- $(OBJTREE)/u-boot-with-spl.imx
+SPL: spl/u-boot-spl.bin FORCE
+ $(Q)$(MAKE) $(build)=arch/arm/imx-common $@
-u-boot-with-nand-spl.imx: spl/u-boot-spl.bin u-boot.bin
- $(MAKE) $(build)=arch/arm/imx-common \
- $(OBJTREE)/u-boot-with-nand-spl.imx
+u-boot-with-spl.imx u-boot-with-nand-spl.imx: SPL u-boot.bin FORCE
+ $(Q)$(MAKE) $(build)=arch/arm/imx-common $@
-u-boot.ubl: u-boot-with-spl.bin
- tools/mkimage -n $(UBL_CONFIG) -T ublimage \
- -e $(CONFIG_SYS_TEXT_BASE) -d $< u-boot.ubl
+MKIMAGEFLAGS_u-boot.ubl = -n $(UBL_CONFIG) -T ublimage -e $(CONFIG_SYS_TEXT_BASE)
-u-boot.ais: spl/u-boot-spl.bin u-boot.img
- tools/mkimage -s -n $(if $(CONFIG_AIS_CONFIG_FILE),$(srctree)/$(CONFIG_AIS_CONFIG_FILE:"%"=%),"/dev/null") \
- -T aisimage \
- -e $(CONFIG_SPL_TEXT_BASE) \
- -d spl/u-boot-spl.bin \
- spl/u-boot-spl.ais
- $(OBJCOPY) ${OBJCFLAGS} -I binary \
- --pad-to=$(CONFIG_SPL_MAX_SIZE) -O binary \
- spl/u-boot-spl.ais spl/u-boot-spl-pad.ais
- cat spl/u-boot-spl-pad.ais u-boot.img > u-boot.ais
+u-boot.ubl: u-boot-with-spl.bin FORCE
+ $(call if_changed,mkimage)
+MKIMAGEFLAGS_u-boot-spl.ais = -s -n $(if $(CONFIG_AIS_CONFIG_FILE), \
+ $(srctree)/$(CONFIG_AIS_CONFIG_FILE:"%"=%),"/dev/null") \
+ -T aisimage -e $(CONFIG_SPL_TEXT_BASE)
+spl/u-boot-spl.ais: spl/u-boot-spl.bin FORCE
+ $(call if_changed,mkimage)
-u-boot.sb: u-boot.bin spl/u-boot-spl.bin
- $(MAKE) $(build)=$(CPUDIR)/$(SOC)/ $(OBJTREE)/u-boot.sb
+OBJCOPYFLAGS_u-boot.ais = -I binary -O binary --pad-to=$(CONFIG_SPL_MAX_SIZE)
+u-boot.ais: spl/u-boot-spl.ais u-boot.img FORCE
+ $(call if_changed,pad_cat)
+
+u-boot.sb: u-boot.bin spl/u-boot-spl.bin
+ $(Q)$(MAKE) $(build)=arch/arm/cpu/arm926ejs/mxs $(objtree)/u-boot.sb
# On x600 (SPEAr600) U-Boot is appended to U-Boot SPL.
# Both images are created using mkimage (crc etc), so that the ROM
# SPL image (with mkimage header) and not the binary. Otherwise the resulting image
# which is loaded/copied by the ROM bootloader to SRAM doesn't fit.
# The resulting image containing both U-Boot images is called u-boot.spr
-u-boot.spr: u-boot.img spl/u-boot-spl.bin
- tools/mkimage -A $(ARCH) -T firmware -C none \
- -a $(CONFIG_SPL_TEXT_BASE) -e $(CONFIG_SPL_TEXT_BASE) -n XLOADER \
- -d spl/u-boot-spl.bin $@
- $(OBJCOPY) -I binary -O binary \
- --pad-to=$(CONFIG_SPL_PAD_TO) --gap-fill=0xff $@
- cat u-boot.img >> $@
+MKIMAGEFLAGS_u-boot-spl.img = -A $(ARCH) -T firmware -C none \
+ -a $(CONFIG_SPL_TEXT_BASE) -e $(CONFIG_SPL_TEXT_BASE) -n XLOADER
+spl/u-boot-spl.img: spl/u-boot-spl.bin FORCE
+ $(call if_changed,mkimage)
+
+OBJCOPYFLAGS_u-boot.spr = -I binary -O binary --pad-to=$(CONFIG_SPL_PAD_TO) \
+ --gap-fill=0xff
+u-boot.spr: spl/u-boot-spl.img u-boot.img FORCE
+ $(call if_changed,pad_cat)
ifneq ($(CONFIG_TEGRA),)
-u-boot-nodtb-tegra.bin: spl/u-boot-spl.bin u-boot.bin
- $(OBJCOPY) ${OBJCFLAGS} --pad-to=$(CONFIG_SYS_TEXT_BASE) -O binary spl/u-boot-spl spl/u-boot-spl-pad.bin
- cat spl/u-boot-spl-pad.bin u-boot.bin > $@
- rm spl/u-boot-spl-pad.bin
+OBJCOPYFLAGS_u-boot-nodtb-tegra.bin = -O binary --pad-to=$(CONFIG_SYS_TEXT_BASE)
+u-boot-nodtb-tegra.bin: spl/u-boot-spl u-boot.bin FORCE
+ $(call if_changed,pad_cat)
ifeq ($(CONFIG_OF_SEPARATE),y)
-u-boot-dtb-tegra.bin: u-boot-nodtb-tegra.bin dts/dt.dtb
- cat $^ > $@
+u-boot-dtb-tegra.bin: u-boot-nodtb-tegra.bin dts/dt.dtb FORCE
+ $(call if_changed,cat)
endif
endif
-u-boot-img.bin: spl/u-boot-spl.bin u-boot.img
- cat spl/u-boot-spl.bin u-boot.img > $@
+u-boot-img.bin: spl/u-boot-spl.bin u-boot.img FORCE
+ $(call if_changed,cat)
# PPC4xx needs the SPL at the end of the image, since the reset vector
# is located at 0xfffffffc. So we can't use the "u-boot-img.bin" target
# and need to introduce a new build target with the full blown U-Boot
# at the start padded up to the start of the SPL image. And then concat
# the SPL image to the end.
-u-boot-img-spl-at-end.bin: spl/u-boot-spl.bin u-boot.img
- $(OBJCOPY) -I binary -O binary --pad-to=$(CONFIG_UBOOT_PAD_TO) \
- --gap-fill=0xff u-boot.img $@
- cat spl/u-boot-spl.bin >> $@
+
+OBJCOPYFLAGS_u-boot-img-spl-at-end.bin := -I binary -O binary \
+ --pad-to=$(CONFIG_UBOOT_PAD_TO) --gap-fill=0xff
+u-boot-img-spl-at-end.bin: u-boot.img spl/u-boot-spl.bin FORCE
+ $(call if_changed,pad_cat)
# Create a new ELF from a raw binary file. This is useful for arm64
# where static relocation needs to be performed on the raw binary,
--defsym=_start=$(CONFIG_SYS_TEXT_BASE) \
-Ttext=$(CONFIG_SYS_TEXT_BASE)
-ifeq ($(CONFIG_SANDBOX),y)
-GEN_UBOOT = \
- $(CC) $(SYMS) -T u-boot.lds \
- -Wl,--start-group $(u-boot-main) -Wl,--end-group \
- $(PLATFORM_LIBS) -Wl,-Map -Wl,u-boot.map -o u-boot
-else
-GEN_UBOOT = \
- $(LD) $(LDFLAGS) $(LDFLAGS_$(@F)) \
- $(u-boot-init) \
- --start-group $(u-boot-main) --end-group $(PLATFORM_LIBS) \
- -Map u-boot.map -o u-boot
-endif
+# Rule to link u-boot
+# May be overridden by arch/$(ARCH)/config.mk
+quiet_cmd_u-boot__ ?= LD $@
+ cmd_u-boot__ ?= $(LD) $(LDFLAGS) $(LDFLAGS_u-boot) -o $@ \
+ -T u-boot.lds $(u-boot-init) \
+ --start-group $(u-boot-main) --end-group \
+ $(PLATFORM_LIBS) -Map u-boot.map
u-boot: $(u-boot-init) $(u-boot-main) u-boot.lds
- $(GEN_UBOOT)
+ $(call if_changed,u-boot__)
ifeq ($(CONFIG_KALLSYMS),y)
- smap=`$(call SYSTEM_MAP,u-boot) | \
- awk '$$2 ~ /[tTwW]/ {printf $$1 $$3 "\\\\000"}'` ; \
- $(CC) $(c_flags) -DSYSTEM_MAP="\"$${smap}\"" \
- -c $(srctree)/common/system_map.c -o common/system_map.o
- $(GEN_UBOOT) common/system_map.o
+ smap=`$(call SYSTEM_MAP,u-boot) | \
+ awk '$$2 ~ /[tTwW]/ {printf $$1 $$3 "\\\\000"}'` ; \
+ $(CC) $(c_flags) -DSYSTEM_MAP="\"$${smap}\"" \
+ -c $(srctree)/common/system_map.c -o common/system_map.o
+ $(call cmd,u-boot__) common/system_map.o
endif
# The actual objects are generated when descending,
# Error messages still appears in the original language
PHONY += $(u-boot-dirs)
-$(u-boot-dirs): depend prepare scripts
+$(u-boot-dirs): prepare scripts
$(Q)$(MAKE) $(build)=$@
-tools: $(TIMESTAMP_FILE) $(VERSION_FILE)
+tools: prepare
# The "tools" are needed early
$(filter-out tools, $(u-boot-dirs)): tools
# The "examples" conditionally depend on U-Boot (say, when USE_PRIVATE_LIBGCC
# is "yes"), so compile examples after U-Boot is compiled.
examples: $(filter-out examples, $(u-boot-dirs))
+define filechk_uboot.release
+ echo "$(UBOOTVERSION)$$($(CONFIG_SHELL) $(srctree)/scripts/setlocalversion $(srctree))"
+endef
+
+# Store (new) UBOOTRELEASE string in include/config/uboot.release
+include/config/uboot.release: Makefile FORCE
+ $(call filechk,uboot.release)
+
+
# Things we need to do before we recursively start building the kernel
# or the modules are listed in "prepare".
# A multi level approach is used. prepareN is processed before prepareN-1.
# prepare3 is used to check if we are building in a separate output directory,
# and if so do:
# 1) Check that make has not been executed in the kernel src $(srctree)
-prepare3:
+prepare3: include/config/uboot.release
ifneq ($(KBUILD_SRC),)
@$(kecho) ' Using $(srctree) as source for u-boot'
$(Q)if [ -f $(srctree)/include/config.mk ]; then \
# prepare2 creates a makefile if using a separate output directory
prepare2: prepare3 outputmakefile
-prepare1: prepare2
- @:
+prepare1: prepare2 $(version_h) $(timestamp_h)
+ifeq ($(__HAVE_ARCH_GENERIC_BOARD),)
+ifeq ($(CONFIG_SYS_GENERIC_BOARD),y)
+ @echo >&2 " Your architecture does not support generic board."
+ @echo >&2 " Please undefine CONFIG_SYS_GENERIC_BOARD in your board config file."
+ @/bin/false
+endif
+endif
+ifeq ($(wildcard $(LDSCRIPT)),)
+ @echo >&2 " Could not find linker script."
+ @/bin/false
+endif
archprepare: prepare1 scripts_basic
prepare0: archprepare FORCE
- @:
+ $(Q)$(MAKE) $(build)=.
# All the preparing..
prepare: prepare0
+# Generate some files
+# ---------------------------------------------------------------------------
+
+define filechk_version.h
+ (echo \#define PLAIN_VERSION \"$(UBOOTRELEASE)\"; \
+ echo \#define U_BOOT_VERSION \"U-Boot \" PLAIN_VERSION; \
+ echo \#define CC_VERSION_STRING \"$$($(CC) --version | head -n 1)\"; \
+ echo \#define LD_VERSION_STRING \"$$($(LD) --version | head -n 1)\"; )
+endef
+
+define filechk_timestamp.h
+ (LC_ALL=C date +'#define U_BOOT_DATE "%b %d %C%y"'; \
+ LC_ALL=C date +'#define U_BOOT_TIME "%T"')
+endef
+
+$(version_h): $(srctree)/Makefile FORCE
+ $(call filechk,version.h)
+
+$(timestamp_h): $(srctree)/Makefile FORCE
+ $(call filechk,timestamp.h)
+
#
# Auto-generate the autoconf.mk file (which is included by all makefiles)
#
include/autoconf.mk: include/config.h
$(call cmd,autoconf)
-u-boot.lds: $(LDSCRIPT) depend
- $(CPP) $(cpp_flags) $(LDPPFLAGS) -ansi -D__ASSEMBLY__ -P - <$< >$@
+# ---------------------------------------------------------------------------
+
+PHONY += depend dep
+depend dep:
+ @echo '*** Warning: make $@ is unnecessary now.'
-nand_spl: $(TIMESTAMP_FILE) $(VERSION_FILE) depend prepare
- $(MAKE) $(build)=nand_spl/board/$(BOARDDIR) all
+# ---------------------------------------------------------------------------
+quiet_cmd_cpp_lds = LDS $@
+cmd_cpp_lds = $(CPP) $(cpp_flags) $(LDPPFLAGS) -ansi -D__ASSEMBLY__ \
+ -x assembler-with-cpp -P -o $@ $<
-u-boot-nand.bin: nand_spl u-boot.bin
- cat nand_spl/u-boot-spl-16k.bin u-boot.bin > u-boot-nand.bin
+u-boot.lds: $(LDSCRIPT) prepare FORCE
+ $(call if_changed,cpp_lds)
-spl/u-boot-spl.bin: tools depend prepare
- $(MAKE) obj=spl -f $(srctree)/spl/Makefile all
+PHONY += nand_spl
+nand_spl: prepare
+ $(Q)$(MAKE) $(build)=nand_spl/board/$(BOARDDIR) all
-tpl/u-boot-tpl.bin: tools depend prepare
- $(MAKE) obj=tpl -f $(srctree)/spl/Makefile all CONFIG_TPL_BUILD=y
+nand_spl/u-boot-spl-16k.bin: nand_spl
+ @:
-# Explicitly make _depend in subdirs containing multiple targets to prevent
-# parallel sub-makes creating .depend files simultaneously.
-depend dep: $(TIMESTAMP_FILE) $(VERSION_FILE) \
- include/generated/generic-asm-offsets.h \
- include/generated/asm-offsets.h
+u-boot-nand.bin: nand_spl/u-boot-spl-16k.bin u-boot.bin FORCE
+ $(call if_changed,cat)
+
+spl/u-boot-spl.bin: spl/u-boot-spl
+ @:
+spl/u-boot-spl: tools prepare
+ $(Q)$(MAKE) obj=spl -f $(srctree)/spl/Makefile all
+
+tpl/u-boot-tpl.bin: tools prepare
+ $(Q)$(MAKE) obj=tpl -f $(srctree)/spl/Makefile all CONFIG_TPL_BUILD=y
TAG_SUBDIRS := $(u-boot-dirs) include
FIND := find
FINDFLAGS := -L
-PHONY += checkstack
-
-checkstack:
- $(OBJDUMP) -d u-boot $$(find . -name u-boot-spl) | \
- $(PERL) $(src)/scripts/checkstack.pl $(ARCH)
-
tags ctags:
ctags -w -o ctags `$(FIND) $(FINDFLAGS) $(TAG_SUBDIRS) \
-name '*.[chS]' -print`
false; \
fi
-quiet_cmd_offsets = GEN $@
- cmd_offsets = $(srctree)/tools/scripts/make-asm-offsets $< $@
-
-include/generated/generic-asm-offsets.h: lib/asm-offsets.s
- $(call cmd,offsets)
-
-quiet_cmd_asm-offsets.s = CC $@
- cmd_asm-offsets.s = mkdir -p lib; \
- $(CC) -DDO_DEPS_ONLY \
- $(c_flags) $(CFLAGS_$(BCURDIR)/$(@F)) $(CFLAGS_$(BCURDIR)) \
- -o $@ $< -c -S
-
-lib/asm-offsets.s: $(srctree)/lib/asm-offsets.c include/config.h
- $(call cmd,asm-offsets.s)
-
-include/generated/asm-offsets.h: $(CPUDIR)/$(SOC)/asm-offsets.s
- $(call cmd,offsets)
-
-quiet_cmd_soc_asm-offsets.s = CC $@
- cmd_soc_asm-offsets.s = mkdir -p $(CPUDIR)/$(SOC); \
- if [ -f $(srctree)/$(CPUDIR)/$(SOC)/asm-offsets.c ];then \
- $(CC) -DDO_DEPS_ONLY \
- $(c_flags) $(CFLAGS_$(BCURDIR)/$(@F)) $(CFLAGS_$(BCURDIR)) \
- -o $@ $(srctree)/$(CPUDIR)/$(SOC)/asm-offsets.c -c -S; \
- else \
- touch $@; \
- fi
-
-$(CPUDIR)/$(SOC)/asm-offsets.s: include/config.h
- $(call cmd,soc_asm-offsets.s)
-
#########################################################################
# ARM relocations should all be R_ARM_RELATIVE (32-bit) or
false; \
fi
-$(VERSION_FILE):
- @mkdir -p $(dir $(VERSION_FILE))
- @( localvers='$(shell $(TOPDIR)/scripts/setlocalversion $(TOPDIR))' ; \
- printf '#define PLAIN_VERSION "%s%s"\n' \
- "$(U_BOOT_VERSION)" "$${localvers}" ; \
- printf '#define U_BOOT_VERSION "U-Boot %s%s"\n' \
- "$(U_BOOT_VERSION)" "$${localvers}" ; \
- ) > $@.tmp
- @( printf '#define CC_VERSION_STRING "%s"\n' \
- '$(shell $(CC) --version | head -n 1)' )>> $@.tmp
- @( printf '#define LD_VERSION_STRING "%s"\n' \
- '$(shell $(LD) -v | head -n 1)' )>> $@.tmp
- @cmp -s $@ $@.tmp && rm -f $@.tmp || mv -f $@.tmp $@
-
-$(TIMESTAMP_FILE):
- @mkdir -p $(dir $(TIMESTAMP_FILE))
- @LC_ALL=C date +'#define U_BOOT_DATE "%b %d %C%y"' > $@.tmp
- @LC_ALL=C date +'#define U_BOOT_TIME "%T"' >> $@.tmp
- @cmp -s $@ $@.tmp && rm -f $@.tmp || mv -f $@.tmp $@
-
-env: depend scripts_basic
+env: scripts_basic
$(Q)$(MAKE) $(build)=tools/$@
tools-all: HOST_TOOLS_ALL=y
CLOBBER_DIRS += $(patsubst %,spl/%, $(filter-out Makefile, \
$(shell ls -1 spl 2>/dev/null))) \
tpl
-CLOBBER_FILES += u-boot* MLO MLO* SPL System.map nand_spl/u-boot*
+CLOBBER_FILES += u-boot* MLO* SPL System.map nand_spl/u-boot*
# Directories & files removed with 'make mrproper'
MRPROPER_DIRS += include/config include/generated
F=`basename $(TOPDIR)` ; cd .. ; \
gtar --force-local -zcvf `LC_ALL=C date "+$$F-%Y-%m-%d-%T.tar.gz"` $$F
+help:
+ @echo 'Cleaning targets:'
+ @echo ' clean - Remove most generated files but keep the config and'
+ @echo ' necessities for testing u-boot'
+ @echo ' clobber - Remove most generated files but keep the config'
+ @echo ' mrproper - Remove all generated files + config + various backup files'
+ @echo ' distclean - mrproper + remove editor backup and patch files'
+ @echo ''
+# uncomment after adding Kconfig feature
+# @echo 'Configuration targets:'
+# @$(MAKE) -f $(srctree)/scripts/kconfig/Makefile help
+# @echo ''
+ @echo 'Other generic targets:'
+ @echo ' all - Build all necessary images depending on configuration'
+ @echo ' u-boot - Build the bare u-boot'
+ @echo ' dir/ - Build all files in dir and below'
+ @echo ' dir/file.[oisS] - Build specified target only'
+ @echo ' dir/file.lst - Build specified mixed source/assembly target only'
+ @echo ' (requires a recent binutils and recent build (System.map))'
+ @echo ' tags/TAGS - Generate tags file for editors'
+ @echo ' cscope - Generate cscope index'
+ @echo ' ubootrelease - Output the release version string'
+ @echo ' ubootversion - Output the version stored in Makefile'
+ @echo ''
+ @echo 'Static analysers'
+ @echo ' checkstack - Generate a list of stack hogs'
+ @echo ''
+ @echo 'Documentation targets:'
+ @$(MAKE) -f $(srctree)/doc/DocBook/Makefile dochelp
+ @echo ''
+ @echo ' make V=0|1 [targets] 0 => quiet build (default), 1 => verbose build'
+ @echo ' make V=2 [targets] 2 => give reason for rebuild of target'
+ @echo ' make O=dir [targets] Locate all output files in "dir", including .config'
+ @echo ' make C=1 [targets] Check all c source with $$CHECK (sparse by default)'
+ @echo ' make C=2 [targets] Force check of all c source with $$CHECK'
+ @echo ' make RECORDMCOUNT_WARN=1 [targets] Warn about ignored mcount sections'
+ @echo ' make W=n [targets] Enable extra gcc checks, n=1,2,3 where'
+ @echo ' 1: warnings which may be relevant and do not occur too often'
+ @echo ' 2: warnings which occur quite often but may still be relevant'
+ @echo ' 3: more obscure warnings, can most likely be ignored'
+ @echo ' Multiple levels can be combined with W=12 or W=123'
+ @echo ''
+ @echo 'Execute "make" or "make all" to build all targets marked with [*] '
+ @echo 'For further info see the ./README file'
+
# Documentation targets
# ---------------------------------------------------------------------------
endif #ifeq ($(config-targets),1)
endif #ifeq ($(mixed-targets),1)
+PHONY += checkstack ubootrelease ubootversion
+
+checkstack:
+ $(OBJDUMP) -d u-boot $$(find . -name u-boot-spl) | \
+ $(PERL) $(src)/scripts/checkstack.pl $(ARCH)
+
+ubootrelease:
+ @echo "$(UBOOTVERSION)$$($(CONFIG_SHELL) $(srctree)/scripts/setlocalversion $(srctree))"
+
+ubootversion:
+ @echo $(UBOOTVERSION)
+
+# Single targets
+# ---------------------------------------------------------------------------
+# Single targets are compatible with:
+# - build with mixed source and output
+# - build with separate output dir 'make O=...'
+# - external modules
+#
+# target-dir => where to store outputfile
+# build-dir => directory in kernel source tree to use
+
+ifeq ($(KBUILD_EXTMOD),)
+ build-dir = $(patsubst %/,%,$(dir $@))
+ target-dir = $(dir $@)
+else
+ zap-slash=$(filter-out .,$(patsubst %/,%,$(dir $@)))
+ build-dir = $(KBUILD_EXTMOD)$(if $(zap-slash),/$(zap-slash))
+ target-dir = $(if $(KBUILD_EXTMOD),$(dir $<),$(dir $@))
+endif
+
+%.s: %.c prepare scripts FORCE
+ $(Q)$(MAKE) $(build)=$(build-dir) $(target-dir)$(notdir $@)
+%.i: %.c prepare scripts FORCE
+ $(Q)$(MAKE) $(build)=$(build-dir) $(target-dir)$(notdir $@)
+%.o: %.c prepare scripts FORCE
+ $(Q)$(MAKE) $(build)=$(build-dir) $(target-dir)$(notdir $@)
+%.lst: %.c prepare scripts FORCE
+ $(Q)$(MAKE) $(build)=$(build-dir) $(target-dir)$(notdir $@)
+%.s: %.S prepare scripts FORCE
+ $(Q)$(MAKE) $(build)=$(build-dir) $(target-dir)$(notdir $@)
+%.o: %.S prepare scripts FORCE
+ $(Q)$(MAKE) $(build)=$(build-dir) $(target-dir)$(notdir $@)
+%.symtypes: %.c prepare scripts FORCE
+ $(Q)$(MAKE) $(build)=$(build-dir) $(target-dir)$(notdir $@)
+
+# Modules
+/: prepare scripts FORCE
+ $(cmd_crmodverdir)
+ $(Q)$(MAKE) KBUILD_MODULES=$(if $(CONFIG_MODULES),1) \
+ $(build)=$(build-dir)
+%/: prepare scripts FORCE
+ $(cmd_crmodverdir)
+ $(Q)$(MAKE) KBUILD_MODULES=$(if $(CONFIG_MODULES),1) \
+ $(build)=$(build-dir)
+%.ko: prepare scripts FORCE
+ $(cmd_crmodverdir)
+ $(Q)$(MAKE) KBUILD_MODULES=$(if $(CONFIG_MODULES),1) \
+ $(build)=$(build-dir) $(@:.ko=.o)
+ $(Q)$(MAKE) -f $(srctree)/scripts/Makefile.modpost
+
+# FIXME Should go into a make.lib or something
+# ===========================================================================
+
quiet_cmd_rmdirs = $(if $(wildcard $(rm-dirs)),CLEAN $(wildcard $(rm-dirs)))
cmd_rmdirs = rm -rf $(rm-dirs)
quiet_cmd_rmfiles = $(if $(wildcard $(rm-files)),CLEAN $(wildcard $(rm-files)))
cmd_rmfiles = rm -f $(rm-files)
+# read all saved command lines
+
+targets := $(wildcard $(sort $(targets)))
+cmd_files := $(wildcard .*.cmd $(foreach f,$(targets),$(dir $(f)).$(notdir $(f)).cmd))
+
+ifneq ($(cmd_files),)
+ $(cmd_files): ; # Do not try to update included dependency files
+ include $(cmd_files)
+endif
+
# Shorthand for $(Q)$(MAKE) -f scripts/Makefile.clean obj=dir
# Usage:
# $(Q)$(MAKE) $(clean)=dir
PBI commands can be used to configure SoC before it starts the execution.
Please refer doc/README.pblimage for more details
+ CONFIG_SYS_FSL_DDR_BE
+ Defines the DDR controller register space as Big Endian
+
+ CONFIG_SYS_FSL_DDR_LE
+ Defines the DDR controller register space as Little Endian
+
+ CONFIG_SYS_FSL_DDR_SDRAM_BASE_PHY
+ Physical address from the view of DDR controllers. It is the
+ same as CONFIG_SYS_DDR_SDRAM_BASE for all Power SoCs. But
+ it could be different for ARM SoCs.
+
+ CONFIG_SYS_FSL_DDR_INTLV_256B
+ DDR controller interleaving on 256-byte. This is a special
+ interleaving mode, handled by Dickens for Freescale layerscape
+ SoCs with ARM core.
+
- Intel Monahans options:
CONFIG_SYS_MONAHANS_RUN_MODE_OSC_RATIO
CONFIG_CMD_SAVEENV saveenv
CONFIG_CMD_FDC * Floppy Disk Support
CONFIG_CMD_FAT * FAT command support
- CONFIG_CMD_FDOS * Dos diskette Support
CONFIG_CMD_FLASH flinfo, erase, protect
CONFIG_CMD_FPGA FPGA device initialization support
CONFIG_CMD_FUSE * Device fuse support
The signing part is build into mkimage regardless of this
option.
+- bootcount support:
+ CONFIG_BOOTCOUNT_LIMIT
+
+ This enables the bootcounter support, see:
+ http://www.denx.de/wiki/DULG/UBootBootCountLimit
+
+ CONFIG_AT91SAM9XE
+ enable special bootcounter support on at91sam9xe based boards.
+ CONFIG_BLACKFIN
+ enable special bootcounter support on blackfin based boards.
+ CONFIG_SOC_DA8XX
+ enable special bootcounter support on da850 based boards.
+ CONFIG_BOOTCOUNT_RAM
+ enable support for the bootcounter in RAM
+ CONFIG_BOOTCOUNT_I2C
+ enable support for the bootcounter on an i2c (like RTC) device.
+ CONFIG_SYS_I2C_RTC_ADDR = i2c chip address
+ CONFIG_SYS_BOOTCOUNT_ADDR = i2c addr which is used for
+ the bootcounter.
+ CONFIG_BOOTCOUNT_ALEN = address len
- Show boot progress:
CONFIG_SHOW_BOOT_PROGRESS
+++ /dev/null
-/*
- * Copyright (C) 2014 Synopsys, Inc. All rights reserved.
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
-
-/*
- * This file is only required to allow compilation of "designware_i2c" driver.
- * Which explicitly includes <asm/arch/hardware.h>.
- */
*/
memcpy(&val, offset_ptr_ram, sizeof(int));
+#ifdef __LITTLE_ENDIAN__
/* If location in ".text" section swap value */
if ((unsigned int)offset_ptr_rom <
(unsigned int)&__text_end)
val = (val << 16) | (val >> 16);
+#endif
/* Check that the target points into .text */
if (val >= CONFIG_SYS_TEXT_BASE && val <=
(unsigned int)&__bss_end) {
val += gd->reloc_off;
+#ifdef __LITTLE_ENDIAN__
/* If location in ".text" section swap value */
if ((unsigned int)offset_ptr_rom <
(unsigned int)&__text_end)
val = (val << 16) | (val >> 16);
+#endif
memcpy(offset_ptr_ram, &val, sizeof(int));
} else {
debug(" %p: rom reloc %x, ram %p, value %x, limit %x\n",
# limit ourselves to the sections we want in the .bin.
ifdef CONFIG_ARM64
-OBJCFLAGS += -j .text -j .rodata -j .data -j .u_boot_list -j .rela.dyn
+OBJCOPYFLAGS += -j .text -j .rodata -j .data -j .u_boot_list -j .rela.dyn
else
-OBJCFLAGS += -j .text -j .rodata -j .hash -j .data -j .got.plt -j .u_boot_list -j .rel.dyn
+OBJCOPYFLAGS += -j .text -j .rodata -j .hash -j .data -j .got.plt -j .u_boot_list -j .rel.dyn
+endif
+
+ifneq ($(CONFIG_IMX_CONFIG),)
+ifdef CONFIG_SPL
+ifndef CONFIG_SPL_BUILD
+ALL-y += SPL
+endif
+else
+ALL-y += u-boot.imx
+endif
endif
# Make ARMv5 to allow more compilers to work, even though its v6.
PLATFORM_CPPFLAGS += -march=armv5
-
-ifneq ($(CONFIG_IMX_CONFIG),)
-ifdef CONFIG_SPL
-ifdef CONFIG_SPL_BUILD
-ALL-y += $(OBJTREE)/SPL
-endif
-else
-ALL-y += u-boot.imx
-endif
-endif
#
PLATFORM_CPPFLAGS += -march=armv5te
-
-ifneq ($(CONFIG_IMX_CONFIG),)
-ifdef CONFIG_SPL
-ifdef CONFIG_SPL_BUILD
-ALL-y += $(OBJTREE)/SPL
-endif
-else
-ALL-y += u-boot.imx
-endif
-endif
&cmper->emiffwclkctrl,
&cmper->emifclkctrl,
&cmper->otfaemifclkctrl,
+ &cmper->qspiclkctrl,
0
};
# SPDX-License-Identifier: GPL-2.0+
#
ifdef CONFIG_SPL_BUILD
-ALL-y += $(OBJTREE)/MLO
-ALL-$(CONFIG_SPL_SPI_SUPPORT) += $(OBJTREE)/MLO.byteswap
+ALL-y += MLO
+ALL-$(CONFIG_SPL_SPI_SUPPORT) += MLO.byteswap
else
ALL-y += u-boot.img
endif
# of our decision.
PF_NO_UNALIGNED := $(call cc-option, -mno-unaligned-access,)
PLATFORM_CPPFLAGS += $(PF_NO_UNALIGNED)
-
-ifneq ($(CONFIG_IMX_CONFIG),)
-ifdef CONFIG_SPL
-ifdef CONFIG_SPL_BUILD
-ALL-y += $(OBJTREE)/SPL
-endif
-else
-ALL-y += u-boot.imx
-endif
-endif
+++ /dev/null
-#
-# (C) Copyright 2002
-# Gary Jennejohn, DENX Software Engineering, <garyj@denx.de>
-#
-# SPDX-License-Identifier: GPL-2.0+
-#
-
-# Make ARMv5 to allow more compilers to work, even though its v7a.
-PLATFORM_CPPFLAGS += -march=armv5
# SPDX-License-Identifier: GPL-2.0+
#
ifdef CONFIG_SPL_BUILD
-ALL-y += $(OBJTREE)/MLO
+ALL-y += MLO
else
ALL-y += u-boot.img
endif
# SPDX-License-Identifier: GPL-2.0+
#
ifdef CONFIG_SPL_BUILD
-ALL-y += $(OBJTREE)/MLO
+ALL-y += MLO
else
ALL-y += u-boot.img
endif
#
ifdef CONFIG_SPL_BUILD
-ALL-y += $(OBJTREE)/MLO
+ALL-y += MLO
else
ALL-y += u-boot.img
endif
+++ /dev/null
-#
-# (C) Copyright 2013
-# NVIDIA Corporation <www.nvidia.com>
-# (C) Copyright 2002
-# Gary Jennejohn, DENX Software Engineering, <garyj@denx.de>
-#
-# SPDX-License-Identifier: GPL-2.0+
-#
-
-CONFIG_ARCH_DEVICE_TREE := tegra124
#
#ifdef CONFIG_SPL_BUILD
-OBJCFLAGS += -j .text.0 -j .text.1
+OBJCOPYFLAGS += -j .text.0 -j .text.1
#endif
exynos5250-snow.dtb \
exynos5250-smdk5250.dtb \
exynos5420-smdk5420.dtb
-
dtb-$(CONFIG_TEGRA) += tegra20-harmony.dtb \
tegra20-medcom-wide.dtb \
tegra20-paz00.dtb \
tegra30-beaver.dtb \
tegra30-cardhu.dtb \
tegra30-tec-ng.dtb \
- tegra114-dalmore.dtb
-
+ tegra114-dalmore.dtb \
+ tegra124-venice2.dtb
dtb-$(CONFIG_ZYNQ) += zynq-zc702.dtb \
zynq-zc706.dtb \
zynq-zed.dtb \
obj-$(CONFIG_CMD_BMODE) += cmd_bmode.o
obj-$(CONFIG_CMD_HDMIDETECT) += cmd_hdmidet.o
-$(OBJTREE)/$(patsubst "%",%,$(CONFIG_IMX_CONFIG)).cfgtmp: $(OBJTREE)/%.cfgtmp : $(SRCTREE)/%
- mkdir -p $(dir $@)
- $(CPP) $(cpp_flags) -x c -o $@ $<
-
-$(OBJTREE)/u-boot.imx: $(OBJTREE)/u-boot.bin $(OBJTREE)/$(patsubst "%",%,$(CONFIG_IMX_CONFIG)).cfgtmp
- $(OBJTREE)/tools/mkimage -n $(filter-out %.bin,$^) -T imximage \
- -e $(CONFIG_SYS_TEXT_BASE) -d $< $@
-
-$(OBJTREE)/SPL: $(OBJTREE)/spl/u-boot-spl.bin $(OBJTREE)/$(patsubst "%",%,$(CONFIG_IMX_CONFIG)).cfgtmp
- $(OBJTREE)/tools/mkimage -n $(filter-out %.bin,$^) -T imximage \
- -e $(CONFIG_SPL_TEXT_BASE) -d $< $@
-
-$(OBJTREE)/u-boot-with-spl.imx: $(OBJTREE)/SPL $(OBJTREE)/u-boot.bin
- $(OBJCOPY) ${OBJCFLAGS} --pad-to=$(CONFIG_SPL_PAD_TO) \
- -I binary -O binary $< $(OBJTREE)/spl/u-boot-spl-pad.imx
- $(OBJTREE)/tools/mkimage -A arm -O U-Boot -a $(CONFIG_SYS_TEXT_BASE) \
- -e $(CONFIG_SYS_TEXT_BASE) -C none -d $(OBJTREE)/u-boot.bin \
- $(OBJTREE)/u-boot.uim
- cat $(OBJTREE)/spl/u-boot-spl-pad.imx $(OBJTREE)/u-boot.uim > $@
- rm $(OBJTREE)/spl/u-boot-spl-pad.imx $(OBJTREE)/u-boot.uim
-
-$(OBJTREE)/u-boot-with-nand-spl.imx: $(OBJTREE)/SPL $(OBJTREE)/u-boot.bin
- (echo -ne '\x00\x00\x00\x00\x46\x43\x42\x20\x01' && \
- dd bs=1015 count=1 if=/dev/zero 2>/dev/null) | \
- cat - $< > $(OBJTREE)/spl/u-boot-nand-spl.imx
- $(OBJCOPY) ${OBJCFLAGS} --pad-to=$(CONFIG_SPL_PAD_TO) \
- -I binary -O binary $(OBJTREE)/spl/u-boot-nand-spl.imx \
- $(OBJTREE)/spl/u-boot-nand-spl-pad.imx
- rm $(OBJTREE)/spl/u-boot-nand-spl.imx
- $(OBJTREE)/tools/mkimage -A arm -O U-Boot -a $(CONFIG_SYS_TEXT_BASE) \
- -e $(CONFIG_SYS_TEXT_BASE) -C none -d $(OBJTREE)/u-boot.bin \
- $(OBJTREE)/u-boot.uim
- cat $(OBJTREE)/spl/u-boot-nand-spl-pad.imx $(OBJTREE)/u-boot.uim > $@
- rm $(OBJTREE)/spl/u-boot-nand-spl-pad.imx $(OBJTREE)/u-boot.uim
+quiet_cmd_cpp_cfg = CFGS $@
+ cmd_cpp_cfg = $(CPP) $(cpp_flags) -x c -o $@ $<
+
+IMX_CONFIG = $(CONFIG_IMX_CONFIG:"%"=%).cfgtmp
+
+$(IMX_CONFIG): %.cfgtmp: % FORCE
+ $(Q)mkdir -p $(dir $@)
+ $(call if_changed_dep,cpp_cfg)
+
+quiet_cmd_mkimage = UIMAGE $@
+cmd_mkimage = $(objtree)/tools/mkimage $(MKIMAGEFLAGS_$(@F)) -d $< $@ \
+ $(if $(KBUILD_VERBOSE:1=), >/dev/null)
+
+MKIMAGEFLAGS_u-boot.imx = -n $(filter-out $< $(PHONY),$^) -T imximage \
+ -e $(CONFIG_SYS_TEXT_BASE)
+
+u-boot.imx: u-boot.bin $(IMX_CONFIG) FORCE
+ $(call if_changed,mkimage)
+
+MKIMAGEFLAGS_SPL = -n $(filter-out $< $(PHONY),$^) -T imximage \
+ -e $(CONFIG_SPL_TEXT_BASE)
+
+SPL: spl/u-boot-spl.bin $(IMX_CONFIG) FORCE
+ $(call if_changed,mkimage)
+
+MKIMAGEFLAGS_u-boot.uim = -A arm -O U-Boot -a $(CONFIG_SYS_TEXT_BASE) \
+ -e $(CONFIG_SYS_TEXT_BASE) -C none
+
+u-boot.uim: u-boot.bin FORCE
+ $(call if_changed,mkimage)
+
+OBJCOPYFLAGS += -I binary -O binary --pad-to=$(CONFIG_SPL_PAD_TO)
+append = cat $(filter-out $< $(PHONY), $^) >> $@
+
+quiet_cmd_pad_cat = CAT $@
+cmd_pad_cat = $(cmd_objcopy) && $(append) || rm -f $@
+
+u-boot-with-spl.imx: SPL u-boot.uim FORCE
+ $(call if_changed,pad_cat)
+
+u-boot-with-nand-spl.imx: spl/u-boot-nand-spl.imx u-boot.uim FORCE
+ $(call if_changed,pad_cat)
+
+quiet_cmd_u-boot-nand-spl_imx = GEN $@
+cmd_u-boot-nand-spl_imx = (echo -ne '\x00\x00\x00\x00\x46\x43\x42\x20\x01' && \
+ dd bs=1015 count=1 if=/dev/zero 2>/dev/null) | cat - $< > $@
+
+spl/u-boot-nand-spl.imx: SPL FORCE
+ $(call if_changed,u-boot-nand-spl_imx)
+
+targets += $(addprefix ../../../,$(IMX_CONFIG) SPL u-boot.uim spl/u-boot-nand-spl.imx)
unsigned int mcasp1clkctrl; /* offset 0x240 */
unsigned int resv11;
unsigned int mmc2clkctrl; /* offset 0x248 */
- unsigned int resv12[5];
+ unsigned int resv12[3];
+ unsigned int qspiclkctrl; /* offset 0x258 */
+ unsigned int resv121;
unsigned int usb0clkctrl; /* offset 0x260 */
unsigned int resv13[103];
unsigned int l4lsclkstctrl; /* offset 0x400 */
#define SRAM_SCRATCH_SPACE_ADDR 0x40337C00
#define AM4372_BOARD_NAME_START SRAM_SCRATCH_SPACE_ADDR
#define AM4372_BOARD_NAME_END SRAM_SCRATCH_SPACE_ADDR + 0xC
+#define QSPI_BASE 0x47900000
#endif
#endif
#define MXC_CSPICTRL_CHAN 18
/* Bit position inside CON register to be associated with SS */
-#define MXC_CSPICON_POL 4
-#define MXC_CSPICON_PHA 0
-#define MXC_CSPICON_SSPOL 12
+#define MXC_CSPICON_PHA 0 /* SCLK phase control */
+#define MXC_CSPICON_POL 4 /* SCLK polarity */
+#define MXC_CSPICON_SSPOL 12 /* SS polarity */
+#define MXC_CSPICON_CTL 20 /* inactive state of SCLK */
#define MXC_SPI_BASE_ADDRESSES \
CSPI1_BASE_ADDR, \
CSPI2_BASE_ADDR, \
#define MXC_CSPICTRL_CHAN 18
/* Bit position inside CON register to be associated with SS */
-#define MXC_CSPICON_POL 4
-#define MXC_CSPICON_PHA 0
-#define MXC_CSPICON_SSPOL 12
-#ifdef CONFIG_MX6SL
+#define MXC_CSPICON_PHA 0 /* SCLK phase control */
+#define MXC_CSPICON_POL 4 /* SCLK polarity */
+#define MXC_CSPICON_SSPOL 12 /* SS polarity */
+#define MXC_CSPICON_CTL 20 /* inactive state of SCLK */
+#if defined(CONFIG_MX6SL) || defined(CONFIG_MX6DL)
#define MXC_SPI_BASE_ADDRESSES \
ECSPI1_BASE_ADDR, \
ECSPI2_BASE_ADDR, \
#define CONFIG_SYS_NAND_ALE (1 << 17)
#if defined(CONFIG_SPEAR600)
-#define CONFIG_SYS_I2C_BASE 0xD0200000
#define CONFIG_SYS_FSMC_BASE 0xD1800000
#define CONFIG_FSMC_NAND_BASE 0xD2000000
#define CONFIG_SPEAR_MPMCREGS 100
#elif defined(CONFIG_SPEAR300)
-#define CONFIG_SYS_I2C_BASE 0xD0180000
#define CONFIG_SYS_FSMC_BASE 0x94000000
#elif defined(CONFIG_SPEAR310)
-#define CONFIG_SYS_I2C_BASE 0xD0180000
#define CONFIG_SYS_FSMC_BASE 0x44000000
#undef CONFIG_SYS_NAND_CLE
#define CONFIG_SYS_MACB3_BASE 0xB1800000
#elif defined(CONFIG_SPEAR320)
-#define CONFIG_SYS_I2C_BASE 0xD0180000
#define CONFIG_SYS_FSMC_BASE 0x4C000000
#define CONFIG_SPEAR_EMIBASE 0x40000000
gd->ram_size -= CONFIG_SYS_MEM_TOP_HIDE;
#endif
- addr = CONFIG_SYS_SDRAM_BASE + gd->ram_size;
+ addr = CONFIG_SYS_SDRAM_BASE + get_effective_memsize();
#ifdef CONFIG_LOGBUFFER
#ifndef CONFIG_ALT_LB_ADDR
endif
CPPFLAGS_init.lds := -ansi
+
+quiet_cmd_link_init = LD $@
+ cmd_link_init = $(LD) $(LDFLAGS) -T $^ -o $@
$(obj)/init.elf: $(obj)/init.lds $(obj)/init.o $(obj)/initcode.o
- $(LD) $(LDFLAGS) -T $^ -o $@
+ $(call if_changed,link_init)
+targets += init.lds init.o
# include <linux/types.h>
-extern u_long get_vco(void);
-extern u_long get_cclk(void);
-extern u_long get_sclk(void);
-extern u_long get_sclk0(void);
-extern u_long get_sclk1(void);
-extern u_long get_dclk(void);
-
# define bfin_revid() (bfin_read_CHIPID() >> 28)
extern int bfin_os_log_check(void);
return uclk;
}
+extern u_long get_vco(void);
+extern u_long get_cclk(void);
+extern u_long get_sclk(void);
+
#ifdef CGU_DIV
+extern u_long get_sclk0(void);
+extern u_long get_sclk1(void);
+extern u_long get_dclk(void);
# define get_uart_clk get_sclk0
+# define get_i2c_clk get_sclk0
+# define get_spi_clk get_sclk0
#else
# define get_uart_clk get_sclk
+# define get_i2c_clk get_sclk
+# define get_spi_clk get_sclk
#endif
#endif
--- /dev/null
+/*
+ * i2c.c - driver for Blackfin on-chip TWI/I2C
+ *
+ * Copyright (c) 2006-2010 Analog Devices Inc.
+ *
+ * Licensed under the GPL-2 or later.
+ */
+
+#ifndef __ARCH_TWI_H
+#define __ARCH_TWI_H
+
+#include <asm/blackfin.h>
+#include <asm/mach-common/bits/twi.h>
+
+#endif
#include <asm/cplb.h>
#include <asm/mach-common/bits/mpu.h>
+#include <asm/clock.h>
#include <kgdb.h>
#ifdef CONFIG_CMD_NAND
PLATFORM_LDFLAGS += -G 0 -static -n -nostdlib $(ENDIANNESS)
PLATFORM_RELFLAGS += -ffunction-sections -fdata-sections
LDFLAGS_FINAL += --gc-sections -pie
-OBJCFLAGS += --remove-section=.dynsym
+OBJCOPYFLAGS += --remove-section=.dynsym
* amount of memory on the system if we're unable to keep all
* the memory mapped in.
*/
-extern ulong get_effective_memsize(void);
#define END_OF_MEM (gd->bd->bi_memstart + get_effective_memsize())
/*
sys_info->freq_processor[cpu] =
freq_c_pll[cplx_pll] / core_cplx_pll_div[c_pll_sel];
}
-#if defined(CONFIG_PPC_B4860) || defined(CONFIG_PPC_T2080)
+#if defined(CONFIG_PPC_B4860) || defined(CONFIG_PPC_T2080) || \
+ defined(CONFIG_PPC_T2081)
#define FM1_CLK_SEL 0xe0000000
#define FM1_CLK_SHIFT 29
#else
SET_USB_LIODN(1, "fsl-usb2-mph", 553),
SET_USB_LIODN(2, "fsl-usb2-dr", 554),
+#ifdef CONFIG_FSL_SATA_V2
SET_SATA_LIODN(1, 555),
SET_SATA_LIODN(2, 556),
+#endif
SET_PCI_LIODN_BASE(CONFIG_SYS_FSL_PCIE_COMPAT, 1, 148),
SET_PCI_LIODN_BASE(CONFIG_SYS_FSL_PCIE_COMPAT, 2, 228),
{0x6C, {XFI_FM1_MAC9, XFI_FM1_MAC10,
SGMII_FM1_DTSEC1, SGMII_FM1_DTSEC2,
PCIE4, PCIE4, PCIE4, PCIE4} },
-#if defined(CONFIG_PPC_T2080)
{0x1C, {SGMII_FM1_DTSEC9, SGMII_FM1_DTSEC10,
SGMII_FM1_DTSEC1, SGMII_FM1_DTSEC2,
SGMII_FM1_DTSEC3, SGMII_FM1_DTSEC4,
XFI_FM1_MAC1, XFI_FM1_MAC2,
PCIE4, PCIE4, PCIE4, PCIE4} },
-#elif defined(CONFIG_PPC_T2081)
+#if defined(CONFIG_PPC_T2081)
{0xAA, {PCIE3, PCIE3, PCIE3, PCIE3,
PCIE4, PCIE4, PCIE4, PCIE4} },
{0xCA, {PCIE3, SGMII_FM1_DTSEC10, SGMII_FM1_DTSEC1,
* amount of memory on the system if we're unable to keep all
* the memory mapped in.
*/
-extern ulong get_effective_memsize(void);
#define END_OF_MEM (gd->bd->bi_memstart + get_effective_memsize())
static __inline__ void set_tsr(unsigned long val)
* amount of memory on the system if we're unable to keep all
* the memory mapped in.
*/
-extern ulong get_effective_memsize(void);
#define END_OF_MEM (gd->bd->bi_memstart + get_effective_memsize())
/*
NULL, /* Terminate this list */
};
-ulong get_effective_memsize(void)
-{
-#ifndef CONFIG_VERY_BIG_RAM
- return gd->ram_size;
-#else
- /* limit stack to what we can reasonable map */
- return ((gd->ram_size > CONFIG_MAX_MEM_MAPPED) ?
- CONFIG_MAX_MEM_MAPPED : gd->ram_size);
-#endif
-}
-
static int __fixup_cpu(void)
{
return 0;
* initialized, and stack space is limited to a few kB.
*/
-#ifdef CONFIG_LOGBUFFER
-unsigned long logbuffer_base(void)
-{
- return CONFIG_SYS_SDRAM_BASE + get_effective_memsize() - LOGBUFF_LEN;
-}
-#endif
-
void board_init_f(ulong bootflag)
{
bd_t *bd;
DECLARE_GLOBAL_DATA_PTR;
-extern ulong get_effective_memsize(void);
static ulong get_sp (void);
extern void ft_fixup_num_cores(void *blob);
static void set_clocks_in_mhz (bd_t *kbd);
# Support generic board on sandbox
__HAVE_ARCH_GENERIC_BOARD := y
+
+cmd_u-boot__ = $(CC) -o $@ -T u-boot.lds \
+ -Wl,--start-group $(u-boot-main) -Wl,--end-group \
+ $(PLATFORM_LIBS) -Wl,-Map -Wl,u-boot.map
+++ /dev/null
-#
-# Copyright (c) 2011 The Chromium OS Authors. All rights reserved.
-#
-# SPDX-License-Identifier: GPL-2.0 BSD-3-Clause
-#
-
-HOSTCFLAGS_autoconf.mk.dep = -Wno-variadic-macros
#include <config.h>
#include <malloc.h>
#include <asm/blackfin.h>
+#include <asm/clock.h>
#include <asm/gpio.h>
#include <asm/portmux.h>
#include <asm/mach-common/bits/dma.h>
DECLARE_GLOBAL_DATA_PTR;
-ulong get_effective_memsize(void)
+phys_size_t get_effective_memsize(void)
{
return CONFIG_SYS_L2_SIZE;
}
else
+ifdef CONFIG_SPL_BUILD
+obj-y += spl.o
+endif
+
obj-y += p1010rdb.o
obj-y += ddr.o
obj-y += law.o
--- /dev/null
+/* Copyright 2013 Freescale Semiconductor, Inc.
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <common.h>
+#include <ns16550.h>
+#include <malloc.h>
+#include <mmc.h>
+#include <nand.h>
+#include <i2c.h>
+#include <fsl_esdhc.h>
+#include <spi_flash.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+phys_size_t get_effective_memsize(void)
+{
+ return CONFIG_SYS_L2_SIZE;
+}
+
+void board_init_f(ulong bootflag)
+{
+ u32 plat_ratio;
+ ccsr_gur_t *gur = (void *)CONFIG_SYS_MPC85xx_GUTS_ADDR;
+ struct fsl_ifc *ifc = (void *)CONFIG_SYS_IFC_ADDR;
+
+ console_init_f();
+
+ /* Clock configuration to access CPLD using IFC(GPCM) */
+ setbits_be32(&ifc->ifc_gcr, 1 << IFC_GCR_TBCTL_TRN_TIME_SHIFT);
+
+#ifdef CONFIG_P1010RDB_PB
+ setbits_be32(&gur->pmuxcr2, MPC85xx_PMUXCR2_GPIO01_DRVVBUS);
+#endif
+
+ /* initialize selected port with appropriate baud rate */
+ plat_ratio = in_be32(&gur->porpllsr) & MPC85xx_PORPLLSR_PLAT_RATIO;
+ plat_ratio >>= 1;
+ gd->bus_clk = CONFIG_SYS_CLK_FREQ * plat_ratio;
+
+ NS16550_init((NS16550_t)CONFIG_SYS_NS16550_COM1,
+ gd->bus_clk / 16 / CONFIG_BAUDRATE);
+
+#ifdef CONFIG_SPL_MMC_BOOT
+ puts("\nSD boot...\n");
+#elif defined(CONFIG_SPL_SPI_BOOT)
+ puts("\nSPI Flash boot...\n");
+#endif
+ /* copy code to RAM and jump to it - this should not return */
+ /* NOTE - code has to be copied out of NAND buffer before
+ * other blocks can be read.
+ */
+ relocate_code(CONFIG_SPL_RELOC_STACK, 0, CONFIG_SPL_RELOC_TEXT_BASE);
+}
+
+void board_init_r(gd_t *gd, ulong dest_addr)
+{
+ /* Pointer is writable since we allocated a register for it */
+ gd = (gd_t *)CONFIG_SPL_GD_ADDR;
+ bd_t *bd;
+
+ memset(gd, 0, sizeof(gd_t));
+ bd = (bd_t *)(CONFIG_SPL_GD_ADDR + sizeof(gd_t));
+ memset(bd, 0, sizeof(bd_t));
+ gd->bd = bd;
+ bd->bi_memstart = CONFIG_SYS_INIT_L2_ADDR;
+ bd->bi_memsize = CONFIG_SYS_L2_SIZE;
+
+ probecpu();
+ get_clocks();
+ mem_malloc_init(CONFIG_SPL_RELOC_MALLOC_ADDR,
+ CONFIG_SPL_RELOC_MALLOC_SIZE);
+
+#ifndef CONFIG_SPL_NAND_BOOT
+ env_init();
+#endif
+#ifdef CONFIG_SPL_MMC_BOOT
+ mmc_initialize(bd);
+#endif
+
+ /* relocate environment function pointers etc. */
+#ifdef CONFIG_SPL_NAND_BOOT
+ nand_spl_load_image(CONFIG_ENV_OFFSET, CONFIG_ENV_SIZE,
+ (uchar *)CONFIG_ENV_ADDR);
+ gd->env_addr = (ulong)(CONFIG_ENV_ADDR);
+ gd->env_valid = 1;
+#else
+ env_relocate();
+#endif
+
+ i2c_init_all();
+
+ gd->ram_size = initdram(0);
+#ifdef CONFIG_SPL_NAND_BOOT
+ puts("\nTertiary program loader running in sram...");
+#else
+ puts("\nSecond program loader running in sram...");
+#endif
+
+#ifdef CONFIG_SPL_MMC_BOOT
+ mmc_boot();
+#elif defined(CONFIG_SPL_SPI_BOOT)
+ spi_boot();
+#elif defined(CONFIG_SPL_NAND_BOOT)
+ nand_boot();
+#endif
+}
DECLARE_GLOBAL_DATA_PTR;
-
-void sdram_init(void)
-{
- struct ccsr_ddr __iomem *ddr =
- (struct ccsr_ddr __iomem *)CONFIG_SYS_FSL_DDR_ADDR;
- ccsr_gur_t *gur = (void *)CONFIG_SYS_MPC85xx_GUTS_ADDR;
- u32 ddr_ratio;
- unsigned long ddr_freq_mhz;
-
- ddr_ratio = in_be32(&gur->porpllsr) & MPC85xx_PORPLLSR_DDR_RATIO;
- ddr_ratio = ddr_ratio >> MPC85xx_PORPLLSR_DDR_RATIO_SHIFT;
- ddr_freq_mhz = (CONFIG_SYS_CLK_FREQ * ddr_ratio) / 1000000;
-
- /* mask off E bit */
- u32 svr = SVR_SOC_VER(mfspr(SPRN_SVR));
-
- __raw_writel(CONFIG_SYS_DDR_CONTROL | SDRAM_CFG_32_BE, &ddr->sdram_cfg);
- __raw_writel(CONFIG_SYS_DDR_CS0_BNDS, &ddr->cs0_bnds);
- __raw_writel(CONFIG_SYS_DDR_CS0_CONFIG, &ddr->cs0_config);
- __raw_writel(CONFIG_SYS_DDR_CONTROL_2, &ddr->sdram_cfg_2);
- __raw_writel(CONFIG_SYS_DDR_DATA_INIT, &ddr->sdram_data_init);
-
- if (ddr_freq_mhz < 700) {
- __raw_writel(CONFIG_SYS_DDR_TIMING_3_667, &ddr->timing_cfg_3);
- __raw_writel(CONFIG_SYS_DDR_TIMING_0_667, &ddr->timing_cfg_0);
- __raw_writel(CONFIG_SYS_DDR_TIMING_1_667, &ddr->timing_cfg_1);
- __raw_writel(CONFIG_SYS_DDR_TIMING_2_667, &ddr->timing_cfg_2);
- __raw_writel(CONFIG_SYS_DDR_MODE_1_667, &ddr->sdram_mode);
- __raw_writel(CONFIG_SYS_DDR_MODE_2_667, &ddr->sdram_mode_2);
- __raw_writel(CONFIG_SYS_DDR_INTERVAL_667, &ddr->sdram_interval);
- __raw_writel(CONFIG_SYS_DDR_CLK_CTRL_667, &ddr->sdram_clk_cntl);
- __raw_writel(CONFIG_SYS_DDR_WRLVL_CONTROL_667, &ddr->ddr_wrlvl_cntl);
- } else {
- __raw_writel(CONFIG_SYS_DDR_TIMING_3_800, &ddr->timing_cfg_3);
- __raw_writel(CONFIG_SYS_DDR_TIMING_0_800, &ddr->timing_cfg_0);
- __raw_writel(CONFIG_SYS_DDR_TIMING_1_800, &ddr->timing_cfg_1);
- __raw_writel(CONFIG_SYS_DDR_TIMING_2_800, &ddr->timing_cfg_2);
- __raw_writel(CONFIG_SYS_DDR_MODE_1_800, &ddr->sdram_mode);
- __raw_writel(CONFIG_SYS_DDR_MODE_2_800, &ddr->sdram_mode_2);
- __raw_writel(CONFIG_SYS_DDR_INTERVAL_800, &ddr->sdram_interval);
- __raw_writel(CONFIG_SYS_DDR_CLK_CTRL_800, &ddr->sdram_clk_cntl);
- __raw_writel(CONFIG_SYS_DDR_WRLVL_CONTROL_800, &ddr->ddr_wrlvl_cntl);
- }
-
- __raw_writel(CONFIG_SYS_DDR_TIMING_4, &ddr->timing_cfg_4);
- __raw_writel(CONFIG_SYS_DDR_TIMING_5, &ddr->timing_cfg_5);
- __raw_writel(CONFIG_SYS_DDR_ZQ_CONTROL, &ddr->ddr_zq_cntl);
-
- /* P1014 and it's derivatives support max 16bit DDR width */
- if (svr == SVR_P1014) {
- __raw_writel(ddr->sdram_cfg & ~SDRAM_CFG_DBW_MASK, &ddr->sdram_cfg);
- __raw_writel(ddr->sdram_cfg | SDRAM_CFG_16_BE, &ddr->sdram_cfg);
- /* For CS0_BNDS we divide the start and end address by 2, so we can just
- * shift the entire register to achieve the desired result and the mask
- * the value so we don't write reserved fields */
- __raw_writel((CONFIG_SYS_DDR_CS0_BNDS >> 1) & 0x0fff0fff, &ddr->cs0_bnds);
- }
-
- asm volatile("sync;isync");
- udelay(500);
-
- /* Let the controller go */
- out_be32(&ddr->sdram_cfg, in_be32(&ddr->sdram_cfg) | SDRAM_CFG_MEM_EN);
-
- set_next_law(CONFIG_SYS_NAND_DDR_LAW, LAW_SIZE_1G, LAW_TRGT_IF_DDR_1);
-}
-
void board_init_f(ulong bootflag)
{
u32 plat_ratio;
ccsr_gur_t *gur = (void *)CONFIG_SYS_MPC85xx_GUTS_ADDR;
+#if defined(CONFIG_SYS_NAND_BR_PRELIM) && defined(CONFIG_SYS_NAND_OR_PRELIM)
+ set_lbc_br(0, CONFIG_SYS_NAND_BR_PRELIM);
+ set_lbc_or(0, CONFIG_SYS_NAND_OR_PRELIM);
+#endif
+
/* initialize selected port with appropriate baud rate */
plat_ratio = in_be32(&gur->porpllsr) & MPC85xx_PORPLLSR_PLAT_RATIO;
plat_ratio >>= 1;
puts("\nNAND boot... ");
- /* Initialize the DDR3 */
- sdram_init();
-
/* copy code to RAM and jump to it - this should not return */
/* NOTE - code has to be copied out of NAND buffer before
* other blocks can be read.
void board_init_r(gd_t *gd, ulong dest_addr)
{
+ puts("\nSecond program loader running in sram...");
nand_boot();
}
MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,
0, 7, BOOKE_PAGESZ_1M, 1),
-#if defined(CONFIG_SYS_RAMBOOT) || defined(CONFIG_SPL)
+#if defined(CONFIG_SYS_RAMBOOT) || \
+ (defined(CONFIG_SPL) && !defined(CONFIG_SPL_COMMON_INIT_DDR))
SET_TLB_ENTRY(1, CONFIG_SYS_DDR_SDRAM_BASE, CONFIG_SYS_DDR_SDRAM_BASE,
MAS3_SX|MAS3_SW|MAS3_SR, 0,
- 0, 8, BOOKE_PAGESZ_1G, 1)
+ 0, 8, BOOKE_PAGESZ_1G, 1),
+#endif
+
+#ifdef CONFIG_SYS_INIT_L2_ADDR
+ /* *I*G - L2SRAM */
+ SET_TLB_ENTRY(1, CONFIG_SYS_INIT_L2_ADDR, CONFIG_SYS_INIT_L2_ADDR_PHYS,
+ MAS3_SX|MAS3_SW|MAS3_SR, MAS2_G,
+ 0, 11, BOOKE_PAGESZ_256K, 1)
#endif
};
99999000, 11111000, 12499800, 13333200
};
-ulong get_effective_memsize(void)
+phys_size_t get_effective_memsize(void)
{
return CONFIG_SYS_L2_SIZE;
}
99999000, 11111000, 12499800, 13333200
};
-ulong get_effective_memsize(void)
+phys_size_t get_effective_memsize(void)
{
return CONFIG_SYS_L2_SIZE;
}
# SPDX-License-Identifier: GPL-2.0+
#
-obj-$(CONFIG_T2080QDS) += t2080qds.o
-obj-$(CONFIG_T2080QDS) += eth_t2080qds.o
+obj-$(CONFIG_T2080QDS) += t208xqds.o
+obj-$(CONFIG_T2080QDS) += eth_t208xqds.o
+obj-$(CONFIG_T2081QDS) += t208xqds.o
+obj-$(CONFIG_T2081QDS) += eth_t208xqds.o
obj-$(CONFIG_PCI) += pci.o
obj-y += ddr.o
obj-y += law.o
#include <asm/fsl_serdes.h>
#include "../common/qixis.h"
#include "../common/fman.h"
-#include "t2080qds_qixis.h"
+#include "t208xqds_qixis.h"
#define EMI_NONE 0xFFFFFFFF
#define EMI1_RGMII1 0
#define EMI1_RGMII2 1
#define EMI1_SLOT1 2
+#if defined(CONFIG_T2080QDS)
#define EMI1_SLOT2 6
#define EMI1_SLOT3 3
#define EMI1_SLOT4 4
#define EMI1_SLOT5 5
-#define EMI2 7
+#elif defined(CONFIG_T2081QDS)
+#define EMI1_SLOT2 3
+#define EMI1_SLOT3 4
+#define EMI1_SLOT5 5
+#define EMI1_SLOT6 6
+#define EMI1_SLOT7 7
+#endif
+#define EMI2 8
static int mdio_mux[NUM_FM_PORTS];
static const char * const mdio_names[] = {
+#if defined(CONFIG_T2080QDS)
"T2080QDS_MDIO_RGMII1",
"T2080QDS_MDIO_RGMII2",
"T2080QDS_MDIO_SLOT1",
"T2080QDS_MDIO_SLOT5",
"T2080QDS_MDIO_SLOT2",
"T2080QDS_MDIO_10GC",
+#elif defined(CONFIG_T2081QDS)
+ "T2081QDS_MDIO_RGMII1",
+ "T2081QDS_MDIO_RGMII2",
+ "T2081QDS_MDIO_SLOT1",
+ "T2081QDS_MDIO_SLOT2",
+ "T2081QDS_MDIO_SLOT3",
+ "T2081QDS_MDIO_SLOT5",
+ "T2081QDS_MDIO_SLOT6",
+ "T2081QDS_MDIO_SLOT7",
+ "T2081QDS_MDIO_10GC",
+#endif
};
/* Map SerDes1 8 lanes to default slot, will be initialized dynamically */
+#if defined(CONFIG_T2080QDS)
static u8 lane_to_slot[] = {3, 3, 3, 3, 1, 1, 1, 1};
+#elif defined(CONFIG_T2081QDS)
+static u8 lane_to_slot[] = {2, 2, 2, 2, 1, 1, 1, 1};
+#endif
-static const char *T2080qds_mdio_name_for_muxval(u8 muxval)
+static const char *t208xqds_mdio_name_for_muxval(u8 muxval)
{
return mdio_names[muxval];
}
struct mii_dev *mii_dev_for_muxval(u8 muxval)
{
struct mii_dev *bus;
- const char *name = T2080qds_mdio_name_for_muxval(muxval);
+ const char *name = t208xqds_mdio_name_for_muxval(muxval);
if (!name) {
printf("No bus for muxval %x\n", muxval);
return bus;
}
-struct T2080qds_mdio {
+struct t208xqds_mdio {
u8 muxval;
struct mii_dev *realbus;
};
-static void T2080qds_mux_mdio(u8 muxval)
+static void t208xqds_mux_mdio(u8 muxval)
{
u8 brdcfg4;
- if (muxval < 7) {
+ if (muxval < 8) {
brdcfg4 = QIXIS_READ(brdcfg[4]);
brdcfg4 &= ~BRDCFG4_EMISEL_MASK;
brdcfg4 |= (muxval << BRDCFG4_EMISEL_SHIFT);
}
}
-static int T2080qds_mdio_read(struct mii_dev *bus, int addr, int devad,
+static int t208xqds_mdio_read(struct mii_dev *bus, int addr, int devad,
int regnum)
{
- struct T2080qds_mdio *priv = bus->priv;
+ struct t208xqds_mdio *priv = bus->priv;
- T2080qds_mux_mdio(priv->muxval);
+ t208xqds_mux_mdio(priv->muxval);
return priv->realbus->read(priv->realbus, addr, devad, regnum);
}
-static int T2080qds_mdio_write(struct mii_dev *bus, int addr, int devad,
+static int t208xqds_mdio_write(struct mii_dev *bus, int addr, int devad,
int regnum, u16 value)
{
- struct T2080qds_mdio *priv = bus->priv;
+ struct t208xqds_mdio *priv = bus->priv;
- T2080qds_mux_mdio(priv->muxval);
+ t208xqds_mux_mdio(priv->muxval);
return priv->realbus->write(priv->realbus, addr, devad, regnum, value);
}
-static int T2080qds_mdio_reset(struct mii_dev *bus)
+static int t208xqds_mdio_reset(struct mii_dev *bus)
{
- struct T2080qds_mdio *priv = bus->priv;
+ struct t208xqds_mdio *priv = bus->priv;
return priv->realbus->reset(priv->realbus);
}
-static int T2080qds_mdio_init(char *realbusname, u8 muxval)
+static int t208xqds_mdio_init(char *realbusname, u8 muxval)
{
- struct T2080qds_mdio *pmdio;
+ struct t208xqds_mdio *pmdio;
struct mii_dev *bus = mdio_alloc();
if (!bus) {
- printf("Failed to allocate T2080QDS MDIO bus\n");
+ printf("Failed to allocate t208xqds MDIO bus\n");
return -1;
}
pmdio = malloc(sizeof(*pmdio));
if (!pmdio) {
- printf("Failed to allocate T2080QDS private data\n");
+ printf("Failed to allocate t208xqds private data\n");
free(bus);
return -1;
}
- bus->read = T2080qds_mdio_read;
- bus->write = T2080qds_mdio_write;
- bus->reset = T2080qds_mdio_reset;
- sprintf(bus->name, T2080qds_mdio_name_for_muxval(muxval));
+ bus->read = t208xqds_mdio_read;
+ bus->write = t208xqds_mdio_write;
+ bus->reset = t208xqds_mdio_reset;
+ sprintf(bus->name, t208xqds_mdio_name_for_muxval(muxval));
pmdio->realbus = miiphy_get_dev_by_name(realbusname);
pmdio->muxval = muxval;
bus->priv = pmdio;
-
return mdio_register(bus);
}
if (fm_info_get_enet_if(port) == PHY_INTERFACE_MODE_SGMII) {
phy = fm_info_get_phy_address(port);
switch (port) {
+#if defined(CONFIG_T2080QDS)
case FM1_DTSEC1:
case FM1_DTSEC2:
case FM1_DTSEC9:
case FM1_DTSEC10:
- sprintf(alias, "phy_sgmii_s3_%x", phy);
- fdt_set_phy_handle(fdt, compat, addr, alias);
- fdt_status_okay_by_alias(fdt, "emi1_slot3");
+ if (mdio_mux[port] == EMI1_SLOT2) {
+ sprintf(alias, "phy_sgmii_s2_%x", phy);
+ fdt_set_phy_handle(fdt, compat, addr, alias);
+ fdt_status_okay_by_alias(fdt, "emi1_slot2");
+ } else if (mdio_mux[port] == EMI1_SLOT3) {
+ sprintf(alias, "phy_sgmii_s3_%x", phy);
+ fdt_set_phy_handle(fdt, compat, addr, alias);
+ fdt_status_okay_by_alias(fdt, "emi1_slot3");
+ }
break;
case FM1_DTSEC5:
case FM1_DTSEC6:
fdt_status_okay_by_alias(fdt, "emi1_slot2");
}
break;
+#elif defined(CONFIG_T2081QDS)
+ case FM1_DTSEC1:
+ case FM1_DTSEC2:
+ case FM1_DTSEC5:
+ case FM1_DTSEC6:
+ case FM1_DTSEC9:
+ case FM1_DTSEC10:
+ if (mdio_mux[port] == EMI1_SLOT2) {
+ sprintf(alias, "phy_sgmii_s2_%x", phy);
+ fdt_set_phy_handle(fdt, compat, addr, alias);
+ fdt_status_okay_by_alias(fdt, "emi1_slot2");
+ } else if (mdio_mux[port] == EMI1_SLOT3) {
+ sprintf(alias, "phy_sgmii_s3_%x", phy);
+ fdt_set_phy_handle(fdt, compat, addr, alias);
+ fdt_status_okay_by_alias(fdt, "emi1_slot3");
+ } else if (mdio_mux[port] == EMI1_SLOT5) {
+ sprintf(alias, "phy_sgmii_s5_%x", phy);
+ fdt_set_phy_handle(fdt, compat, addr, alias);
+ fdt_status_okay_by_alias(fdt, "emi1_slot5");
+ } else if (mdio_mux[port] == EMI1_SLOT6) {
+ sprintf(alias, "phy_sgmii_s6_%x", phy);
+ fdt_set_phy_handle(fdt, compat, addr, alias);
+ fdt_status_okay_by_alias(fdt, "emi1_slot6");
+ } else if (mdio_mux[port] == EMI1_SLOT7) {
+ sprintf(alias, "phy_sgmii_s7_%x", phy);
+ fdt_set_phy_handle(fdt, compat, addr, alias);
+ fdt_status_okay_by_alias(fdt, "emi1_slot7");
+ }
+ break;
+#endif
default:
break;
}
}
/*
- * This function reads RCW to check if Serdes1{E,F,G,H} is configured
- * as slot 1/2/3 and update the lane_to_slot[] array accordingly
+ * This function reads RCW to check if Serdes1{A:H} is configured
+ * to slot 1/2/3/4/5/6/7 and update the lane_to_slot[] array accordingly
*/
static void initialize_lane_to_slot(void)
{
srds_s1 >>= FSL_CORENET2_RCWSR4_SRDS1_PRTCL_SHIFT;
switch (srds_s1) {
+#if defined(CONFIG_T2080QDS)
case 0x51:
case 0x5f:
case 0x65:
lane_to_slot[6] = 3;
lane_to_slot[7] = 3;
break;
+#elif defined(CONFIG_T2081QDS)
+ case 0x6b:
+ lane_to_slot[4] = 1;
+ lane_to_slot[5] = 3;
+ lane_to_slot[6] = 3;
+ lane_to_slot[7] = 3;
+ break;
+ case 0xca:
+ case 0xcb:
+ lane_to_slot[1] = 7;
+ lane_to_slot[2] = 6;
+ lane_to_slot[3] = 5;
+ lane_to_slot[5] = 3;
+ lane_to_slot[6] = 3;
+ lane_to_slot[7] = 3;
+ break;
+ case 0xf2:
+ lane_to_slot[1] = 7;
+ lane_to_slot[2] = 7;
+ lane_to_slot[3] = 7;
+ lane_to_slot[5] = 4;
+ lane_to_slot[6] = 3;
+ lane_to_slot[7] = 7;
+ break;
+#endif
default:
break;
}
fm_memac_mdio_init(bis, &tgec_mdio_info);
/* Register the muxing front-ends to the MDIO buses */
- T2080qds_mdio_init(DEFAULT_FM_MDIO_NAME, EMI1_RGMII1);
- T2080qds_mdio_init(DEFAULT_FM_MDIO_NAME, EMI1_RGMII2);
- T2080qds_mdio_init(DEFAULT_FM_MDIO_NAME, EMI1_SLOT1);
- T2080qds_mdio_init(DEFAULT_FM_MDIO_NAME, EMI1_SLOT2);
- T2080qds_mdio_init(DEFAULT_FM_MDIO_NAME, EMI1_SLOT3);
- T2080qds_mdio_init(DEFAULT_FM_MDIO_NAME, EMI1_SLOT4);
- T2080qds_mdio_init(DEFAULT_FM_MDIO_NAME, EMI1_SLOT5);
- T2080qds_mdio_init(DEFAULT_FM_TGEC_MDIO_NAME, EMI2);
+ t208xqds_mdio_init(DEFAULT_FM_MDIO_NAME, EMI1_RGMII1);
+ t208xqds_mdio_init(DEFAULT_FM_MDIO_NAME, EMI1_RGMII2);
+ t208xqds_mdio_init(DEFAULT_FM_MDIO_NAME, EMI1_SLOT1);
+ t208xqds_mdio_init(DEFAULT_FM_MDIO_NAME, EMI1_SLOT2);
+ t208xqds_mdio_init(DEFAULT_FM_MDIO_NAME, EMI1_SLOT3);
+#if defined(CONFIG_T2080QDS)
+ t208xqds_mdio_init(DEFAULT_FM_MDIO_NAME, EMI1_SLOT4);
+#endif
+ t208xqds_mdio_init(DEFAULT_FM_MDIO_NAME, EMI1_SLOT5);
+#if defined(CONFIG_T2081QDS)
+ t208xqds_mdio_init(DEFAULT_FM_MDIO_NAME, EMI1_SLOT6);
+ t208xqds_mdio_init(DEFAULT_FM_MDIO_NAME, EMI1_SLOT7);
+#endif
+ t208xqds_mdio_init(DEFAULT_FM_TGEC_MDIO_NAME, EMI2);
/* Set the two on-board RGMII PHY address */
fm_info_set_phy_address(FM1_DTSEC3, RGMII_PHY1_ADDR);
case 0x95:
case 0xa2:
case 0x94:
- /* SGMII in Slot3 */
+ /* T2080QDS: SGMII in Slot3; T2081QDS: SGMII in Slot2 */
fm_info_set_phy_address(FM1_DTSEC9, SGMII_CARD_PORT1_PHY_ADDR);
fm_info_set_phy_address(FM1_DTSEC10, SGMII_CARD_PORT2_PHY_ADDR);
fm_info_set_phy_address(FM1_DTSEC1, SGMII_CARD_PORT3_PHY_ADDR);
fm_info_set_phy_address(FM1_DTSEC2, SGMII_CARD_PORT4_PHY_ADDR);
- /* SGMII in Slot2 */
+ /* T2080QDS: SGMII in Slot2; T2081QDS: SGMII in Slot1 */
fm_info_set_phy_address(FM1_DTSEC5, SGMII_CARD_PORT3_PHY_ADDR);
fm_info_set_phy_address(FM1_DTSEC6, SGMII_CARD_PORT4_PHY_ADDR);
break;
case 0x51:
case 0x5f:
case 0x65:
- /* XAUI/HiGig in Slot3 */
+ /* T2080QDS: XAUI/HiGig in Slot3; T2081QDS: in Slot2 */
fm_info_set_phy_address(FM1_10GEC1, FM1_10GEC1_PHY_ADDR);
- /* SGMII in Slot2 */
+ /* T2080QDS: SGMII in Slot2; T2081QDS: in Slot3 */
fm_info_set_phy_address(FM1_DTSEC5, SGMII_CARD_PORT3_PHY_ADDR);
fm_info_set_phy_address(FM1_DTSEC6, SGMII_CARD_PORT4_PHY_ADDR);
break;
fm_info_set_phy_address(FM1_10GEC2, 5);
fm_info_set_phy_address(FM1_10GEC3, 6);
fm_info_set_phy_address(FM1_10GEC4, 7);
- /* SGMII in Slot2 */
+ /* T2080QDS: SGMII in Slot2; T2081QDS: in Slot3 */
fm_info_set_phy_address(FM1_DTSEC5, SGMII_CARD_PORT3_PHY_ADDR);
fm_info_set_phy_address(FM1_DTSEC6, SGMII_CARD_PORT2_PHY_ADDR);
break;
case 0x6d:
fm_info_set_phy_address(FM1_10GEC1, 4);
fm_info_set_phy_address(FM1_10GEC2, 5);
- /* SGMII in Slot3 */
+ /* T2080QDS: SGMII in Slot3; T2081QDS: in Slot2 */
fm_info_set_phy_address(FM1_DTSEC1, SGMII_CARD_PORT3_PHY_ADDR);
fm_info_set_phy_address(FM1_DTSEC2, SGMII_CARD_PORT4_PHY_ADDR);
break;
fm_info_set_phy_address(FM1_DTSEC1, SGMII_CARD_PORT3_PHY_ADDR);
fm_info_set_phy_address(FM1_DTSEC2, SGMII_CARD_PORT4_PHY_ADDR);
break;
+#if defined(CONFIG_T2080QDS)
case 0xd9:
case 0xd3:
case 0xcb:
fm_info_set_phy_address(FM1_DTSEC5, SGMII_CARD_PORT3_PHY_ADDR);
fm_info_set_phy_address(FM1_DTSEC6, SGMII_CARD_PORT2_PHY_ADDR);
break;
+#elif defined(CONFIG_T2081QDS)
+ case 0xca:
+ case 0xcb:
+ /* SGMII in Slot3 */
+ fm_info_set_phy_address(FM1_DTSEC5, SGMII_CARD_PORT1_PHY_ADDR);
+ fm_info_set_phy_address(FM1_DTSEC6, SGMII_CARD_PORT2_PHY_ADDR);
+ /* SGMII in Slot5 */
+ fm_info_set_phy_address(FM1_DTSEC2, SGMII_CARD_PORT1_PHY_ADDR);
+ /* SGMII in Slot6 */
+ fm_info_set_phy_address(FM1_DTSEC1, SGMII_CARD_PORT1_PHY_ADDR);
+ /* SGMII in Slot7 */
+ fm_info_set_phy_address(FM1_DTSEC10, SGMII_CARD_PORT3_PHY_ADDR);
+ break;
+#endif
+ case 0xf2:
+ /* T2080QDS: SGMII in Slot3; T2081QDS: SGMII in Slot7 */
+ fm_info_set_phy_address(FM1_DTSEC1, SGMII_CARD_PORT1_PHY_ADDR);
+ fm_info_set_phy_address(FM1_DTSEC2, SGMII_CARD_PORT2_PHY_ADDR);
+ fm_info_set_phy_address(FM1_DTSEC10, SGMII_CARD_PORT3_PHY_ADDR);
+ fm_info_set_phy_address(FM1_DTSEC6, SGMII_CARD_PORT4_PHY_ADDR);
+ break;
default:
break;
}
case 3:
mdio_mux[i] = EMI1_SLOT3;
fm_info_set_mdio(i, mii_dev_for_muxval(
- mdio_mux[i]));
+ mdio_mux[i]));
+ break;
+#if defined(CONFIG_T2081QDS)
+ case 5:
+ mdio_mux[i] = EMI1_SLOT5;
+ fm_info_set_mdio(i, mii_dev_for_muxval(
+ mdio_mux[i]));
+ break;
+ case 6:
+ mdio_mux[i] = EMI1_SLOT6;
+ fm_info_set_mdio(i, mii_dev_for_muxval(
+ mdio_mux[i]));
+ break;
+ case 7:
+ mdio_mux[i] = EMI1_SLOT7;
+ fm_info_set_mdio(i, mii_dev_for_muxval(
+ mdio_mux[i]));
break;
+#endif
}
break;
case PHY_INTERFACE_MODE_RGMII:
--- /dev/null
+#PBL preamble and RCW header
+aa55aa55 010e0100
+#Default SerDes Protocol: 0x6C
+#Core/DDR: 1533Mhz/2133MT/s
+12100017 15000000 00000000 00000000
+6c000002 00008000 e8104000 c1000000
+00000000 00000000 00000000 000307fc
+00000000 00000000 00000000 00000004
#include "../common/qixis.h"
#include "../common/vsc3316_3308.h"
-#include "t2080qds.h"
-#include "t2080qds_qixis.h"
+#include "t208xqds.h"
+#include "t208xqds_qixis.h"
DECLARE_GLOBAL_DATA_PTR;
int brd_mux_lane_to_slot(void)
{
ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
- u32 srds_prtcl_s1, srds_prtcl_s2;
+ u32 srds_prtcl_s1;
srds_prtcl_s1 = in_be32(&gur->rcwsr[4]) &
FSL_CORENET2_RCWSR4_SRDS1_PRTCL;
srds_prtcl_s1 >>= FSL_CORENET2_RCWSR4_SRDS1_PRTCL_SHIFT;
- srds_prtcl_s2 = in_be32(&gur->rcwsr[4]) &
+#if defined(CONFIG_T2080QDS)
+ u32 srds_prtcl_s2 = in_be32(&gur->rcwsr[4]) &
FSL_CORENET2_RCWSR4_SRDS2_PRTCL;
srds_prtcl_s2 >>= FSL_CORENET2_RCWSR4_SRDS2_PRTCL_SHIFT;
+#endif
switch (srds_prtcl_s1) {
case 0:
/* SerDes1 is not enabled */
break;
+#if defined(CONFIG_T2080QDS)
case 0x1c:
case 0xa2:
/* SD1(A:D) => SLOT3 SGMII
*/
QIXIS_WRITE(brdcfg[12], 0x1a);
break;
+#elif defined(CONFIG_T2081QDS)
+ case 0x51:
+ /* SD1(A:D) => SLOT2 XAUI
+ * SD1(E) => SLOT1 PCIe4 x1
+ * SD1(F:H) => SLOT3 SGMII
+ */
+ QIXIS_WRITE(brdcfg[12], 0x98);
+ QIXIS_WRITE(brdcfg[13], 0x70);
+ break;
+ case 0x6b:
+ /* SD1(A:D) => XFI SFP Module
+ * SD1(E) => SLOT1 PCIe4 x1
+ * SD1(F:H) => SLOT3 SGMII
+ */
+ QIXIS_WRITE(brdcfg[12], 0x80);
+ QIXIS_WRITE(brdcfg[13], 0x70);
+ break;
+ case 0x6c:
+ /* SD1(A:B) => XFI SFP Module
+ * SD1(C:D) => SLOT2 SGMII
+ * SD1(E:H) => SLOT1 PCIe4 x4
+ */
+ QIXIS_WRITE(brdcfg[12], 0xe8);
+ QIXIS_WRITE(brdcfg[13], 0x0);
+ break;
+ case 0x6d:
+ /* SD1(A:B) => XFI SFP Module
+ * SD1(C:D) => SLOT2 SGMII
+ * SD1(E:H) => SLOT1 PCIe4 x4
+ */
+ QIXIS_WRITE(brdcfg[12], 0xe8);
+ QIXIS_WRITE(brdcfg[13], 0x0);
+ break;
+ case 0xaa:
+ case 0xab:
+ /* SD1(A:D) => SLOT2 PCIe3 x4
+ * SD1(F:H) => SLOT1 SGMI4 x4
+ */
+ QIXIS_WRITE(brdcfg[12], 0xf8);
+ QIXIS_WRITE(brdcfg[13], 0x0);
+ break;
+ case 0xca:
+ case 0xcb:
+ /* SD1(A) => SLOT2 PCIe3 x1
+ * SD1(B) => SLOT7 SGMII
+ * SD1(C) => SLOT6 SGMII
+ * SD1(D) => SLOT5 SGMII
+ * SD1(E) => SLOT1 PCIe4 x1
+ * SD1(F:H) => SLOT3 SGMII
+ */
+ QIXIS_WRITE(brdcfg[12], 0x80);
+ QIXIS_WRITE(brdcfg[13], 0x70);
+ break;
+ case 0xde:
+ case 0xdf:
+ /* SD1(A:D) => SLOT2 PCIe3 x4
+ * SD1(E) => SLOT1 PCIe4 x1
+ * SD1(F) => SLOT4 PCIe1 x1
+ * SD1(G) => SLOT3 PCIe2 x1
+ * SD1(H) => SLOT7 SGMII
+ */
+ QIXIS_WRITE(brdcfg[12], 0x98);
+ QIXIS_WRITE(brdcfg[13], 0x25);
+ break;
+ case 0xf2:
+ /* SD1(A) => SLOT2 PCIe3 x1
+ * SD1(B:D) => SLOT7 SGMII
+ * SD1(E) => SLOT1 PCIe4 x1
+ * SD1(F) => SLOT4 PCIe1 x1
+ * SD1(G) => SLOT3 PCIe2 x1
+ * SD1(H) => SLOT7 SGMII
+ */
+ QIXIS_WRITE(brdcfg[12], 0x81);
+ QIXIS_WRITE(brdcfg[13], 0xa5);
+ break;
+#endif
default:
printf("WARNING: unsupported for SerDes1 Protocol %d\n",
srds_prtcl_s1);
return -1;
}
+#ifdef CONFIG_T2080QDS
switch (srds_prtcl_s2) {
case 0:
/* SerDes2 is not enabled */
srds_prtcl_s2);
return -1;
}
+#endif
return 0;
}
* SPDX-License-Identifier: GPL-2.0+
*/
-#ifndef __T2080QDS_QIXIS_H__
-#define __T2080QDS_QIXIS_H__
+#ifndef __T208xQDS_QIXIS_H__
+#define __T208xQDS_QIXIS_H__
-/* Definitions of QIXIS Registers for T2080QDS */
+/* Definitions of QIXIS Registers for T208xQDS */
#define QIXIS_SRDS1CLK_122 0x5a
#define QIXIS_SRDS1CLK_125 0x5e
#define BRDCFG5_IRE 0x20 /* i2c Remote i2c1 enable */
+#define BRDCFG9_SFP_TX_EN 0x10
+
#define BRDCFG12_SD3EN_MASK 0x20
#define BRDCFG12_SD3MX_MASK 0x08
#define BRDCFG12_SD3MX_SLOT5 0x08
PLATFORM_CPPFLAGS += -I$(TOPDIR)
-OBJCFLAGS = --remove-section=.ppcenv
+OBJCOPYFLAGS = --remove-section=.ppcenv
int board_eth_init(bd_t *bis)
{
- if (designware_initialize(0, ARC_DWGMAC_BASE, 0,
+ if (designware_initialize(ARC_DWGMAC_BASE,
PHY_INTERFACE_MODE_RGMII) >= 0)
return 1;
{-1},
};
+static struct module_pin_mux qspi_pin_mux[] = {
+ {OFFSET(gpmc_csn0), (MODE(3) | PULLUP_EN | RXACTIVE)}, /* QSPI_CS0 */
+ {OFFSET(gpmc_csn3), (MODE(2) | PULLUP_EN | RXACTIVE)}, /* QSPI_CLK */
+ {OFFSET(gpmc_advn_ale), (MODE(3) | PULLUP_EN | RXACTIVE)}, /* QSPI_D0 */
+ {OFFSET(gpmc_oen_ren), (MODE(3) | PULLUP_EN | RXACTIVE)}, /* QSPI_D1 */
+ {OFFSET(gpmc_wen), (MODE(3) | PULLUP_EN | RXACTIVE)}, /* QSPI_D2 */
+ {OFFSET(gpmc_be0n_cle), (MODE(3) | PULLUP_EN | RXACTIVE)}, /* QSPI_D3 */
+ {-1},
+};
+
void enable_uart0_pin_mux(void)
{
configure_module_pin_mux(uart0_pin_mux);
if (board_is_gpevm())
configure_module_pin_mux(gpio5_7_pin_mux);
+ configure_module_pin_mux(qspi_pin_mux);
}
void enable_i2c0_pin_mux(void)
###########################################################################################################
Active aarch64 armv8 - armltd vexpress64 vexpress_aemv8a vexpress_aemv8a:ARM64 David Feng <fenghua@phytium.com.cn>
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-Active arm arm920t at91 BuS eb_cpux9k2 eb_cpux9k2 eb_cpux9k2 Jens Scharsig <esw@bus-elektronik.de>
+Active arm arm920t at91 BuS eb_cpux9k2 eb_cpux9k2 - Jens Scharsig <esw@bus-elektronik.de>
Active arm arm920t at91 BuS eb_cpux9k2 eb_cpux9k2_ram eb_cpux9k2:RAMBOOT Jens Scharsig <esw@bus-elektronik.de>
-Active arm arm920t at91 eukrea cpuat91 cpuat91 cpuat91 Eric Benard <eric@eukrea.com>
+Active arm arm920t at91 eukrea cpuat91 cpuat91 - Eric Benard <eric@eukrea.com>
Active arm arm920t at91 eukrea cpuat91 cpuat91_ram cpuat91:RAMBOOT Eric Benard <eric@eukrea.com>
Active arm arm920t imx - - scb9328 - Torsten Koschorrek <koschorrek@synertronixx.de>
Active arm arm920t ks8695 - - cm4008 - Greg Ungerer <greg.ungerer@opengear.com>
Active arm arm926ejs at91 siemens taurus taurus taurus:AT91SAM9G20,MACH_TYPE=2067,BOARD_TAURUS Heiko Schocher <hs@denx.de>
Active arm arm926ejs at91 taskit stamp9g20 portuxg20 stamp9g20:AT91SAM9G20,PORTUXG20 Markus Hubig <mhubig@imko.de>
Active arm arm926ejs at91 taskit stamp9g20 stamp9g20 stamp9g20:AT91SAM9G20 Markus Hubig <mhubig@imko.de>
-Active arm arm926ejs davinci ait cam_enc_4xx cam_enc_4xx cam_enc_4xx Heiko Schocher <hs@denx.de>
+Active arm arm926ejs davinci ait cam_enc_4xx cam_enc_4xx - Heiko Schocher <hs@denx.de>
Active arm arm926ejs davinci Barix ipam390 ipam390 - Heiko Schocher <hs@denx.de>
Active arm arm926ejs davinci davinci da8xxevm da830evm - Nick Thompson <nick.thompson@gefanuc.com>
Active arm arm926ejs davinci davinci da8xxevm da850_am18xxevm da850evm:DA850_AM18X_EVM,MAC_ADDR_IN_EEPROM,SYS_I2C_EEPROM_ADDR_LEN=2,SYS_I2C_EEPROM_ADDR=0x50 Sudhakar Rajashekhara <sudhakar.raj@ti.com>
Active arm arm926ejs mx27 armadeus apf27 apf27 - Philippe Reynes <tremyfr@yahoo.fr>:Eric Jarrige <eric.jarrige@armadeus.org>
Active arm arm926ejs mx27 logicpd imx27lite imx27lite - Wolfgang Denk <wd@denx.de>
Active arm arm926ejs mx27 logicpd imx27lite magnesium - Heiko Schocher <hs@denx.de>
-Active arm arm926ejs mxs bluegiga apx4devkit apx4devkit apx4devkit Lauri Hintsala <lauri.hintsala@bluegiga.com>
+Active arm arm926ejs mxs bluegiga apx4devkit apx4devkit - Lauri Hintsala <lauri.hintsala@bluegiga.com>
Active arm arm926ejs mxs creative xfi3 xfi3 - Marek Vasut <marek.vasut@gmail.com>
-Active arm arm926ejs mxs denx m28evk m28evk m28evk Marek Vasut <marek.vasut@gmail.com>
-Active arm arm926ejs mxs freescale mx23evk mx23evk mx23evk Otavio Salvador <otavio@ossystems.com.br>
+Active arm arm926ejs mxs denx m28evk m28evk - Marek Vasut <marek.vasut@gmail.com>
+Active arm arm926ejs mxs freescale mx23evk mx23evk - Otavio Salvador <otavio@ossystems.com.br>
Active arm arm926ejs mxs freescale mx28evk mx28evk mx28evk:ENV_IS_IN_MMC Fabio Estevam <fabio.estevam@freescale.com>
Active arm arm926ejs mxs freescale mx28evk mx28evk_auart_console mx28evk:MXS_AUART,MXS_AUART_BASE=MXS_UARTAPP3_BASE,ENV_IS_IN_MMC Fabio Estevam <fabio.estevam@freescale.com>
Active arm arm926ejs mxs freescale mx28evk mx28evk_nand mx28evk:ENV_IS_IN_NAND Fabio Estevam <fabio.estevam@freescale.com>
-Active arm arm926ejs mxs olimex mx23_olinuxino mx23_olinuxino mx23_olinuxino Marek Vasut <marek.vasut@gmail.com>
-Active arm arm926ejs mxs ppcag bg0900 bg0900 bg0900 Marek Vasut <marex@denx.de>
+Active arm arm926ejs mxs olimex mx23_olinuxino mx23_olinuxino - Marek Vasut <marek.vasut@gmail.com>
+Active arm arm926ejs mxs ppcag bg0900 bg0900 - Marek Vasut <marex@denx.de>
Active arm arm926ejs mxs sandisk sansa_fuze_plus sansa_fuze_plus - Marek Vasut <marek.vasut@gmail.com>
Active arm arm926ejs mxs schulercontrol sc_sps_1 sc_sps_1 - Marek Vasut <marek.vasut@gmail.com>
Active arm arm926ejs nomadik st nhk8815 nhk8815 - Nomadik Linux Team <STN_WMM_nomadik_linux@list.st.com>:Alessandro Rubini <rubini@unipv.it>
Active arm arm926ejs omap ti - omap5912osk - Rishi Bhattacharya <rishi@ti.com>
Active arm arm926ejs orion5x LaCie - edminiv2 - Albert ARIBAUD <albert.u.boot@aribaud.net>
Active arm arm926ejs pantheon Marvell - dkb - Lei Wen <leiwen@marvell.com>
-Active arm arm926ejs spear spear - x600 x600 Stefan Roese <sr@denx.de>
+Active arm arm926ejs spear spear - x600 - Stefan Roese <sr@denx.de>
Active arm arm926ejs spear spear spear300 spear300 spear3xx_evb:spear300 Vipin Kumar <vipin.kumar@st.com>
Active arm arm926ejs spear spear spear300 spear300_nand spear3xx_evb:spear300,nand -
Active arm arm926ejs spear spear spear300 spear300_usbtty spear3xx_evb:spear300,usbtty -
Active arm armv7 - armltd vexpress vexpress_ca15_tc2 - -
Active arm armv7 - armltd vexpress vexpress_ca5x2 - Matt Waddel <matt.waddel@linaro.org>
Active arm armv7 - armltd vexpress vexpress_ca9x4 - Matt Waddel <matt.waddel@linaro.org>
-Active arm armv7 am33xx compulab cm_t335 cm_t335 cm_t335 Igor Grinberg <grinberg@compulab.co.il>
+Active arm armv7 am33xx compulab cm_t335 cm_t335 - Igor Grinberg <grinberg@compulab.co.il>
Active arm armv7 am33xx isee igep0033 am335x_igep0033 - Enric Balletbo i Serra <eballetbo@iseebcn.com>
Active arm armv7 am33xx phytec pcm051 pcm051_rev1 pcm051:REV1 Lars Poeschel <poeschel@lemonage.de>
Active arm armv7 am33xx phytec pcm051 pcm051_rev3 pcm051:REV3 Lars Poeschel <poeschel@lemonage.de>
Active powerpc mpc5xxx - - icecube lite5200b IceCube:MPC5200_DDR,LITE5200B -
Active powerpc mpc5xxx - - icecube lite5200b_LOWBOOT IceCube:MPC5200_DDR,LITE5200B,SYS_TEXT_BASE=0xFF000000 -
Active powerpc mpc5xxx - - icecube lite5200b_PM IceCube:MPC5200_DDR,LITE5200B,LITE5200B_PM -
-Active powerpc mpc5xxx - - mcc200 mcc200 mcc200 -
+Active powerpc mpc5xxx - - mcc200 mcc200 - -
Active powerpc mpc5xxx - - mcc200 mcc200_COM12 mcc200:CONSOLE_COM12 -
Active powerpc mpc5xxx - - mcc200 mcc200_COM12_highboot mcc200:CONSOLE_COM12,SYS_TEXT_BASE=0xFFF00000 -
Active powerpc mpc5xxx - - mcc200 mcc200_COM12_highboot_SDRAM mcc200:CONSOLE_COM12,SYS_TEXT_BASE=0xFFF00000,MCC200_SDRAM -
Active powerpc mpc5xxx - manroland - uc101 - Heiko Schocher <hs@denx.de>
Active powerpc mpc5xxx - matrix_vision mvbc_p MVBC_P MVBC_P:MVBC_P Andre Schwarz <andre.schwarz@matrix-vision.de>
Active powerpc mpc5xxx - matrix_vision mvsmr MVSMR - Andre Schwarz <andre.schwarz@matrix-vision.de>
-Active powerpc mpc5xxx - phytec pcm030 pcm030 pcm030 Jon Smirl <jonsmirl@gmail.com>
+Active powerpc mpc5xxx - phytec pcm030 pcm030 - Jon Smirl <jonsmirl@gmail.com>
Active powerpc mpc5xxx - phytec pcm030 pcm030_LOWBOOT pcm030:SYS_TEXT_BASE=0xFF000000 Jon Smirl <jonsmirl@gmail.com>
Active powerpc mpc5xxx - tqc tqm5200 aev - -
Active powerpc mpc5xxx - tqc tqm5200 cam5200 TQM5200:CAM5200,TQM5200S,TQM5200_B -
Active powerpc mpc5xxx - tqc tqm5200 cam5200_niosflash TQM5200:CAM5200,TQM5200S,TQM5200_B,CAM5200_NIOSFLASH -
-Active powerpc mpc5xxx - tqc tqm5200 charon charon Heiko Schocher <hs@denx.de>
+Active powerpc mpc5xxx - tqc tqm5200 charon - Heiko Schocher <hs@denx.de>
Active powerpc mpc5xxx - tqc tqm5200 fo300 TQM5200:FO300 -
Active powerpc mpc5xxx - tqc tqm5200 MiniFAP TQM5200:MINIFAP -
Active powerpc mpc5xxx - tqc tqm5200 TB5200 - -
Active powerpc mpc5xxx - tqc tqm5200 TB5200_B TB5200:TQM5200_B -
-Active powerpc mpc5xxx - tqc tqm5200 TQM5200 TQM5200: -
+Active powerpc mpc5xxx - tqc tqm5200 TQM5200 - -
Active powerpc mpc5xxx - tqc tqm5200 TQM5200_B TQM5200:TQM5200_B -
Active powerpc mpc5xxx - tqc tqm5200 TQM5200_B_HIGHBOOT TQM5200:TQM5200_B,SYS_TEXT_BASE=0xFFF00000 -
Active powerpc mpc5xxx - tqc tqm5200 TQM5200_STK100 TQM5200:STK52XX_REV100 -
Active powerpc mpc5xxx - tqc tqm5200 TQM5200S_HIGHBOOT TQM5200:TQM5200_B,TQM5200S,SYS_TEXT_BASE=0xFFF00000 -
Active powerpc mpc824x - - - utx8245 - Greg Allen <gallen@arlut.utexas.edu>
Active powerpc mpc824x - - a3000 A3000 - -
-Active powerpc mpc824x - - cpc45 CPC45 CPC45 Josef Wagner <Wagner@Microsys.de>
+Active powerpc mpc824x - - cpc45 CPC45 - Josef Wagner <Wagner@Microsys.de>
Active powerpc mpc824x - - cpc45 CPC45_ROMBOOT CPC45:BOOT_ROM Josef Wagner <Wagner@Microsys.de>
Active powerpc mpc824x - - cu824 CU824 - Wolfgang Denk <wd@denx.de>
Active powerpc mpc824x - - eXalion eXalion - Torsten Demke <torsten.demke@fci.com>
Active powerpc mpc8260 - - - ppmc8260 - Brad Kemp <Brad.Kemp@seranoa.com>
Active powerpc mpc8260 - - - sacsng - Jerry Van Baren <gerald.vanbaren@smiths-aerospace.com>
Active powerpc mpc8260 - - cogent cogent_mpc8260 - Murray Jensen <Murray.Jensen@csiro.au>
-Active powerpc mpc8260 - - cpu86 CPU86 CPU86 Wolfgang Denk <wd@denx.de>
+Active powerpc mpc8260 - - cpu86 CPU86 - Wolfgang Denk <wd@denx.de>
Active powerpc mpc8260 - - cpu86 CPU86_ROMBOOT CPU86:BOOT_ROM Wolfgang Denk <wd@denx.de>
-Active powerpc mpc8260 - - cpu87 CPU87 CPU87 -
+Active powerpc mpc8260 - - cpu87 CPU87 - -
Active powerpc mpc8260 - - cpu87 CPU87_ROMBOOT CPU87:BOOT_ROM -
Active powerpc mpc8260 - - ep8248 ep8248 - Yuli Barcohen <yuli@arabellasw.com>
-Active powerpc mpc8260 - - ep8248 ep8248E ep8248 Yuli Barcohen <yuli@arabellasw.com>
Active powerpc mpc8260 - - ids8247 IDS8247 - Heiko Schocher <hs@denx.de>
Active powerpc mpc8260 - - iphase4539 IPHASE4539 - Wolfgang Grandegger <wg@denx.de>
Active powerpc mpc8260 - - ispan ISPAN - Yuli Barcohen <yuli@arabellasw.com>
Active powerpc mpc8260 - - pm826 PM826_BIGFLASH PM826:FLASH_32MB,SYS_TEXT_BASE=0x40000000 Wolfgang Denk <wd@denx.de>
Active powerpc mpc8260 - - pm826 PM826_ROMBOOT PM826:BOOT_ROM,SYS_TEXT_BASE=0xFF800000 Wolfgang Denk <wd@denx.de>
Active powerpc mpc8260 - - pm826 PM826_ROMBOOT_BIGFLASH PM826:BOOT_ROM,FLASH_32MB,SYS_TEXT_BASE=0xFF800000 Wolfgang Denk <wd@denx.de>
-Active powerpc mpc8260 - - pm828 PM828 PM828 -
+Active powerpc mpc8260 - - pm828 PM828 - -
Active powerpc mpc8260 - - pm828 PM828_PCI PM828:PCI -
Active powerpc mpc8260 - - pm828 PM828_ROMBOOT PM828:BOOT_ROM,SYS_TEXT_BASE=0xFF800000 -
Active powerpc mpc8260 - - pm828 PM828_ROMBOOT_PCI PM828:PCI,BOOT_ROM,SYS_TEXT_BASE=0xFF800000 -
-Active powerpc mpc8260 - - rattler Rattler Rattler Yuli Barcohen <yuli@arabellasw.com>
+Active powerpc mpc8260 - - rattler Rattler - Yuli Barcohen <yuli@arabellasw.com>
Active powerpc mpc8260 - - rattler Rattler8248 Rattler:MPC8248 Yuli Barcohen <yuli@arabellasw.com>
Active powerpc mpc8260 - - zpc1900 ZPC1900 - Yuli Barcohen <yuli@arabellasw.com>
Active powerpc mpc8260 - freescale mpc8260ads MPC8260ADS MPC8260ADS:ADSTYPE=CONFIG_SYS_8260ADS Yuli Barcohen <yuli@arabellasw.com>
Active powerpc mpc8260 - tqc tqm8260 TQM8265_AA TQM8260:MPC8265,300MHz,BUSMODE_60x Wolfgang Denk <wd@denx.de>
Active powerpc mpc8260 - tqc tqm8272 TQM8272 - -
Active powerpc mpc83xx - - - mpc8308_p1m - Ilya Yanok <yanok@emcraft.com>
-Active powerpc mpc83xx - - sbc8349 sbc8349
sbc8349 Paul Gortmaker <paul.gortmaker@windriver.com>
+Active powerpc mpc83xx - - sbc8349 sbc8349
- Paul Gortmaker <paul.gortmaker@windriver.com>
Active powerpc mpc83xx - - sbc8349 sbc8349_PCI_33 sbc8349:PCI,PCI_33M Paul Gortmaker <paul.gortmaker@windriver.com>
Active powerpc mpc83xx - - sbc8349 sbc8349_PCI_66 sbc8349:PCI,PCI_66M Paul Gortmaker <paul.gortmaker@windriver.com>
Active powerpc mpc83xx - - ve8313 ve8313 - Heiko Schocher <hs@denx.de>
Active powerpc mpc83xx - esd vme8349 caddy2 vme8349:CADDY2 Reinhard Arlt <reinhard.arlt@esd-electronics.com>
-Active powerpc mpc83xx - esd vme8349 vme8349 vme8349 Reinhard Arlt <reinhard.arlt@esd-electronics.com>
+Active powerpc mpc83xx - esd vme8349 vme8349 - Reinhard Arlt <reinhard.arlt@esd-electronics.com>
Active powerpc mpc83xx - freescale mpc8308rdb MPC8308RDB - Ilya Yanok <yanok@emcraft.com>
Active powerpc mpc83xx - freescale mpc8313erdb MPC8313ERDB_33 MPC8313ERDB:SYS_33MHZ -
Active powerpc mpc83xx - freescale mpc8313erdb MPC8313ERDB_66 MPC8313ERDB:SYS_66MHZ -
Active powerpc mpc83xx - freescale mpc8313erdb MPC8313ERDB_NAND_33 MPC8313ERDB:SYS_33MHZ,NAND -
Active powerpc mpc83xx - freescale mpc8313erdb MPC8313ERDB_NAND_66 MPC8313ERDB:SYS_66MHZ,NAND -
-Active powerpc mpc83xx - freescale mpc8315erdb MPC8315ERDB MPC8315ERDB Dave Liu <daveliu@freescale.com>
+Active powerpc mpc83xx - freescale mpc8315erdb MPC8315ERDB - Dave Liu <daveliu@freescale.com>
Active powerpc mpc83xx - freescale mpc8315erdb MPC8315ERDB_NAND MPC8315ERDB:NAND_U_BOOT Dave Liu <daveliu@freescale.com>
Active powerpc mpc83xx - freescale mpc8323erdb MPC8323ERDB - Michael Barkowski <michael.barkowski@freescale.com>
-Active powerpc mpc83xx - freescale mpc832xemds MPC832XEMDS MPC832XEMDS: Dave Liu <daveliu@freescale.com>
+Active powerpc mpc83xx - freescale mpc832xemds MPC832XEMDS - Dave Liu <daveliu@freescale.com>
Active powerpc mpc83xx - freescale mpc832xemds MPC832XEMDS_ATM MPC832XEMDS:PQ_MDS_PIB=1,PQ_MDS_PIB_ATM=1 Dave Liu <daveliu@freescale.com>
Active powerpc mpc83xx - freescale mpc832xemds MPC832XEMDS_HOST_33 MPC832XEMDS:PCI,PCI_33M,PQ_MDS_PIB=1 Dave Liu <daveliu@freescale.com>
Active powerpc mpc83xx - freescale mpc832xemds MPC832XEMDS_HOST_66 MPC832XEMDS:PCI,PCI_66M,PQ_MDS_PIB=1 Dave Liu <daveliu@freescale.com>
Active powerpc mpc83xx - freescale mpc8360emds MPC8360EMDS_66_HOST_33 MPC8360EMDS:CLKIN_66MHZ,PCI,PCI_33M,PQ_MDS_PIB=1 Dave Liu <daveliu@freescale.com>
Active powerpc mpc83xx - freescale mpc8360emds MPC8360EMDS_66_HOST_66 MPC8360EMDS:CLKIN_66MHZ,PCI,PCI_66M,PQ_MDS_PIB=1 Dave Liu <daveliu@freescale.com>
Active powerpc mpc83xx - freescale mpc8360emds MPC8360EMDS_66_SLAVE MPC8360EMDS:CLKIN_66MHZ,PCI,PCISLAVE Dave Liu <daveliu@freescale.com>
-Active powerpc mpc83xx - freescale mpc8360erdk MPC8360ERDK
MPC8360ERDK Anton Vorontsov <avorontsov@ru.mvista.com>
+Active powerpc mpc83xx - freescale mpc8360erdk MPC8360ERDK
- Anton Vorontsov <avorontsov@ru.mvista.com>
Active powerpc mpc83xx - freescale mpc8360erdk MPC8360ERDK_33 MPC8360ERDK:CLKIN_33MHZ Anton Vorontsov <avorontsov@ru.mvista.com>
-Active powerpc mpc83xx - freescale mpc8360erdk MPC8360ERDK_66 MPC8360ERDK Anton Vorontsov <avorontsov@ru.mvista.com>
-Active powerpc mpc83xx - freescale mpc837xemds MPC837XEMDS MPC837XEMDS Dave Liu <daveliu@freescale.com>
+Active powerpc mpc83xx - freescale mpc837xemds MPC837XEMDS - Dave Liu <daveliu@freescale.com>
Active powerpc mpc83xx - freescale mpc837xemds MPC837XEMDS_HOST MPC837XEMDS:PCI Dave Liu <daveliu@freescale.com>
Active powerpc mpc83xx - freescale mpc837xerdb MPC837XERDB - Joe D'Abbraccio <ljd015@freescale.com>
Active powerpc mpc83xx - keymile km83xx kmcoge5ne km8360:KMCOGE5NE Holger Brunck <holger.brunck@keymile.com>
Active powerpc mpc83xx - sheldon simpc8313 SIMPC8313_LP SIMPC8313:NAND_LP Ron Madrid <info@sheldoninst.com>
Active powerpc mpc83xx - sheldon simpc8313 SIMPC8313_SP SIMPC8313:NAND_SP Ron Madrid <info@sheldoninst.com>
Active powerpc mpc83xx - tqc tqm834x TQM834x - -
-Active powerpc mpc85xx - - sbc8548 sbc8548
sbc8548 Paul Gortmaker <paul.gortmaker@windriver.com>
+Active powerpc mpc85xx - - sbc8548 sbc8548
- Paul Gortmaker <paul.gortmaker@windriver.com>
Active powerpc mpc85xx - - sbc8548 sbc8548_PCI_33 sbc8548:PCI,33 Paul Gortmaker <paul.gortmaker@windriver.com>
Active powerpc mpc85xx - - sbc8548 sbc8548_PCI_33_PCIE sbc8548:PCI,33,PCIE Paul Gortmaker <paul.gortmaker@windriver.com>
Active powerpc mpc85xx - - sbc8548 sbc8548_PCI_66 sbc8548:PCI,66 Paul Gortmaker <paul.gortmaker@windriver.com>
Active powerpc mpc85xx - freescale corenet_ds P5040DS_NAND P5040DS:RAMBOOT_PBL,NAND,SYS_TEXT_BASE=0xFFF40000 -
Active powerpc mpc85xx - freescale corenet_ds P5040DS_SDCARD P5040DS:RAMBOOT_PBL,SDCARD,SYS_TEXT_BASE=0xFFF40000 -
Active powerpc mpc85xx - freescale corenet_ds P5040DS_SPIFLASH P5040DS:RAMBOOT_PBL,SPIFLASH,SYS_TEXT_BASE=0xFFF40000 -
-Active powerpc mpc85xx - freescale mpc8536ds MPC8536DS MPC8536DS -
+Active powerpc mpc85xx - freescale mpc8536ds MPC8536DS - -
Active powerpc mpc85xx - freescale mpc8536ds MPC8536DS_36BIT MPC8536DS:36BIT -
Active powerpc mpc85xx - freescale mpc8536ds MPC8536DS_NAND MPC8536DS:NAND -
Active powerpc mpc85xx - freescale mpc8536ds MPC8536DS_SDCARD MPC8536DS:SDCARD -
Active powerpc mpc85xx - freescale mpc8536ds MPC8536DS_SPIFLASH MPC8536DS:SPIFLASH -
Active powerpc mpc85xx - freescale mpc8540ads MPC8540ADS - Kumar Gala <kumar.gala@freescale.com>
-Active powerpc mpc85xx - freescale mpc8541cds MPC8541CDS MPC8541CDS Kumar Gala <kumar.gala@freescale.com>
+Active powerpc mpc85xx - freescale mpc8541cds MPC8541CDS - Kumar Gala <kumar.gala@freescale.com>
Active powerpc mpc85xx - freescale mpc8541cds MPC8541CDS_legacy MPC8541CDS:LEGACY Kumar Gala <kumar.gala@freescale.com>
Active powerpc mpc85xx - freescale mpc8544ds MPC8544DS - -
-Active powerpc mpc85xx - freescale mpc8548cds MPC8548CDS MPC8548CDS -
+Active powerpc mpc85xx - freescale mpc8548cds MPC8548CDS - -
Active powerpc mpc85xx - freescale mpc8548cds MPC8548CDS_36BIT MPC8548CDS:36BIT -
Active powerpc mpc85xx - freescale mpc8548cds MPC8548CDS_legacy MPC8548CDS:LEGACY -
-Active powerpc mpc85xx - freescale mpc8555cds MPC8555CDS MPC8555CDS Kumar Gala <kumar.gala@freescale.com>
+Active powerpc mpc85xx - freescale mpc8555cds MPC8555CDS - Kumar Gala <kumar.gala@freescale.com>
Active powerpc mpc85xx - freescale mpc8555cds MPC8555CDS_legacy MPC8555CDS:LEGACY Kumar Gala <kumar.gala@freescale.com>
Active powerpc mpc85xx - freescale mpc8560ads MPC8560ADS - Kumar Gala <kumar.gala@freescale.com>
Active powerpc mpc85xx - freescale mpc8568mds MPC8568MDS - -
-Active powerpc mpc85xx - freescale mpc8569mds MPC8569MDS MPC8569MDS -
+Active powerpc mpc85xx - freescale mpc8569mds MPC8569MDS - -
Active powerpc mpc85xx - freescale mpc8569mds MPC8569MDS_ATM MPC8569MDS:ATM -
Active powerpc mpc85xx - freescale mpc8569mds MPC8569MDS_NAND MPC8569MDS:NAND -
-Active powerpc mpc85xx - freescale mpc8572ds MPC8572DS MPC8572DS -
+Active powerpc mpc85xx - freescale mpc8572ds MPC8572DS - -
Active powerpc mpc85xx - freescale mpc8572ds MPC8572DS_36BIT MPC8572DS:36BIT -
Active powerpc mpc85xx - freescale mpc8572ds MPC8572DS_NAND MPC8572DS:NAND -
Active powerpc mpc85xx - freescale p1010rdb P1010RDB-PA_36BIT_NAND P1010RDB:P1010RDB_PA,36BIT,NAND -
Active powerpc mpc85xx - freescale p1022ds P1022DS_NAND P1022DS:NAND Timur Tabi <timur@freescale.com>
Active powerpc mpc85xx - freescale p1022ds P1022DS_SDCARD P1022DS:SDCARD Timur Tabi <timur@freescale.com>
Active powerpc mpc85xx - freescale p1022ds P1022DS_SPIFLASH P1022DS:SPIFLASH Timur Tabi <timur@freescale.com>
-Active powerpc mpc85xx - freescale p1023rdb P1023RDB P1023RDB -
-Active powerpc mpc85xx - freescale p1023rds P1023RDS P1023RDS Roy Zang <tie-fei.zang@freescale.com>
+Active powerpc mpc85xx - freescale p1023rdb P1023RDB - -
+Active powerpc mpc85xx - freescale p1023rds P1023RDS - Roy Zang <tie-fei.zang@freescale.com>
Active powerpc mpc85xx - freescale p1023rds P1023RDS_NAND P1023RDS:NAND Roy Zang <tie-fei.zang@freescale.com>
Active powerpc mpc85xx - freescale p1_p2_rdb P1011RDB P1_P2_RDB:P1011RDB -
Active powerpc mpc85xx - freescale p1_p2_rdb P1011RDB_36BIT P1_P2_RDB:P1011RDB,36BIT -
Active powerpc mpc85xx - freescale t1040qds T1040QDS T1040QDS:PPC_T1040 Poonam Aggrwal <poonam.aggrwal@freescale.com>
Active powerpc mpc85xx - freescale t104xrdb T1040RDB T1040RDB:PPC_T1040 Poonam Aggrwal <poonam.aggrwal@freescale.com>
Active powerpc mpc85xx - freescale t104xrdb T1042RDB_PI T1042RDB_PI:PPC_T1042 Poonam Aggrwal <poonam.aggrwal@freescale.com>
-Active powerpc mpc85xx - freescale t2080qds T2080QDS T2080QDS:PPC_T2080 -
-Active powerpc mpc85xx - freescale t2080qds T2080QDS_NAND T2080QDS:PPC_T2080,RAMBOOT_PBL,NAND,SYS_TEXT_BASE=0xFFF40000 -
-Active powerpc mpc85xx - freescale t2080qds T2080QDS_SDCARD T2080QDS:PPC_T2080,RAMBOOT_PBL,SDCARD,SYS_TEXT_BASE=0xFFF40000 -
-Active powerpc mpc85xx - freescale t2080qds T2080QDS_SPIFLASH T2080QDS:PPC_T2080,RAMBOOT_PBL,SPIFLASH,SYS_TEXT_BASE=0xFFF40000 -
-Active powerpc mpc85xx - freescale t2080qds T2080QDS_SRIO_PCIE_BOOT T2080QDS:PPC_T2080,SRIO_PCIE_BOOT_SLAVE,SYS_TEXT_BASE=0xFFF40000 -
+Active powerpc mpc85xx - freescale t208xqds T2080QDS T208xQDS:PPC_T2080
+Active powerpc mpc85xx - freescale t208xqds T2080QDS_SDCARD T208xQDS:PPC_T2080,RAMBOOT_PBL,SDCARD,SYS_TEXT_BASE=0xFFF40000
+Active powerpc mpc85xx - freescale t208xqds T2080QDS_SPIFLASH T208xQDS:PPC_T2080,RAMBOOT_PBL,SPIFLASH,SYS_TEXT_BASE=0xFFF40000
+Active powerpc mpc85xx - freescale t208xqds T2080QDS_NAND T208xQDS:PPC_T2080,RAMBOOT_PBL,NAND,SYS_TEXT_BASE=0xFFF40000
+Active powerpc mpc85xx - freescale t208xqds T2080QDS_SRIO_PCIE_BOOT T208xQDS:PPC_T2080,SRIO_PCIE_BOOT_SLAVE,SYS_TEXT_BASE=0xFFF40000
+Active powerpc mpc85xx - freescale t208xqds T2081QDS T208xQDS:PPC_T2081
+Active powerpc mpc85xx - freescale t208xqds T2081QDS_SDCARD T208xQDS:PPC_T2081,RAMBOOT_PBL,SDCARD,SYS_TEXT_BASE=0xFFF40000
+Active powerpc mpc85xx - freescale t208xqds T2081QDS_SPIFLASH T208xQDS:PPC_T2081,RAMBOOT_PBL,SPIFLASH,SYS_TEXT_BASE=0xFFF40000
+Active powerpc mpc85xx - freescale t208xqds T2081QDS_NAND T208xQDS:PPC_T2081,RAMBOOT_PBL,NAND,SYS_TEXT_BASE=0xFFF40000
+Active powerpc mpc85xx - freescale t208xqds T2081QDS_SRIO_PCIE_BOOT T208xQDS:PPC_T2081,SRIO_PCIE_BOOT_SLAVE,SYS_TEXT_BASE=0xFFF40000
Active powerpc mpc85xx - freescale t4qds T4160QDS T4240QDS:PPC_T4160 -
Active powerpc mpc85xx - freescale t4qds T4160QDS_SDCARD T4240QDS:PPC_T4160,RAMBOOT_PBL,SDCARD,SYS_TEXT_BASE=0xFFF40000 -
Active powerpc mpc85xx - freescale t4qds T4160QDS_SPIFLASH T4240QDS:PPC_T4160,RAMBOOT_PBL,SPIFLASH,SYS_TEXT_BASE=0xFFF40000 -
Active powerpc mpc85xx - keymile kmp204x kmcoge4 kmp204x:KMCOGE4 Valentin Longchamp <valentin.longchamp@keymile.com>
Active powerpc mpc85xx - keymile kmp204x kmlion1 kmp204x:KMLION1 Valentin Longchamp <valentin.longchamp@keymile.com>
Active powerpc mpc85xx - stx stxgp3 stxgp3 - Dan Malek <dan@embeddedalley.com>
-Active powerpc mpc85xx - stx stxssa stxssa stxssa Dan Malek <dan@embeddedalley.com>
+Active powerpc mpc85xx - stx stxssa stxssa - Dan Malek <dan@embeddedalley.com>
Active powerpc mpc85xx - stx stxssa stxssa_4M stxssa:STXSSA_4M Dan Malek <dan@embeddedalley.com>
Active powerpc mpc85xx - xes - xpedite520x - -
Active powerpc mpc85xx - xes - xpedite537x - -
Active powerpc mpc85xx - xes - xpedite550x - -
Active powerpc mpc86xx - - - sbc8641d - Paul Gortmaker <paul.gortmaker@windriver.com>
Active powerpc mpc86xx - freescale mpc8610hpcd MPC8610HPCD - -
-Active powerpc mpc86xx - freescale mpc8641hpcn MPC8641HPCN MPC8641HPCN Kumar Gala <kumar.gala@freescale.com>
+Active powerpc mpc86xx - freescale mpc8641hpcn MPC8641HPCN - Kumar Gala <kumar.gala@freescale.com>
Active powerpc mpc86xx - freescale mpc8641hpcn MPC8641HPCN_36BIT MPC8641HPCN:PHYS_64BIT Kumar Gala <kumar.gala@freescale.com>
Active powerpc mpc86xx - xes - xpedite517x - -
Active powerpc mpc8xx - - - hermes - Wolfgang Denk <wd@denx.de>
Active powerpc mpc8xx - - - svm_sc8xx - John Zhan <zhanz@sinovee.com>
Active powerpc mpc8xx - - - v37 - -
Active powerpc mpc8xx - - adder Adder - Yuli Barcohen <yuli@arabellasw.com>
-Active powerpc mpc8xx - - adder Adder87x Adder Yuli Barcohen <yuli@arabellasw.com>
Active powerpc mpc8xx - - adder AdderII Adder:MPC852T Yuli Barcohen <yuli@arabellasw.com>
-Active powerpc mpc8xx - - adder AdderUSB Adder Yuli Barcohen <yuli@arabellasw.com>
Active powerpc mpc8xx - - cogent cogent_mpc8xx - Murray Jensen <Murray.Jensen@csiro.au>
Active powerpc mpc8xx - - esteem192e ESTEEM192E - Conn Clark <clark@esteem.com>
Active powerpc mpc8xx - - fads MPC86xADS - -
Active powerpc mpc8xx - - ivm IVMS8_256 IVMS8:IVMS8_64M Wolfgang Denk <wd@denx.de>
Active powerpc mpc8xx - - netphone NETPHONE NETPHONE:NETPHONE_VERSION=1 -
Active powerpc mpc8xx - - netphone NETPHONE_V2 NETPHONE:NETPHONE_VERSION=2 -
-Active powerpc mpc8xx - - netta NETTA NETTA -
+Active powerpc mpc8xx - - netta NETTA - -
Active powerpc mpc8xx - - netta NETTA_6412 NETTA:NETTA_6412=1 -
Active powerpc mpc8xx - - netta NETTA_6412_SWAPHOOK NETTA:NETTA_6412=1,NETTA_SWAPHOOK=1 -
Active powerpc mpc8xx - - netta NETTA_ISDN NETTA:NETTA_ISDN=1 -
Active powerpc mpc8xx - - netvia NETVIA_V2 NETVIA:NETVIA_VERSION=2 Pantelis Antoniou <panto@intracom.gr>
Active powerpc mpc8xx - - r360mpi R360MPI - Wolfgang Denk <wd@denx.de>
Active powerpc mpc8xx - - rbc823 RBC823 - -
-Active powerpc mpc8xx - - RPXlite_dw RPXlite_DW RPXlite_DW -
+Active powerpc mpc8xx - - RPXlite_dw RPXlite_DW - -
Active powerpc mpc8xx - - RPXlite_dw RPXlite_DW_64 RPXlite_DW:RPXlite_64MHz -
Active powerpc mpc8xx - - RPXlite_dw RPXlite_DW_64_LCD RPXlite_DW:RPXlite_64MHz,LCD,NEC_NL6448BC20 -
Active powerpc mpc8xx - - RPXlite_dw RPXlite_DW_LCD RPXlite_DW:LCD,NEC_NL6448BC20 -
Active sparc leon3 - gaisler - gr_xc3s_1500 - -
Active sparc leon3 - gaisler - grsim - -
Active x86 x86 coreboot chromebook-x86 coreboot coreboot-x86 coreboot:SYS_TEXT_BASE=0x01110000 -
-Active arc arc700 - synopsys - axs101 - Alexey Brodkin <abrodkin@synopsys.com>
-Active arc arc700 - synopsys - arcangel4 - Alexey Brodkin <abrodkin@synopsys.com>
-Active arc arc700 - synopsys arcangel4 arcangel4-be - Alexey Brodkin <abrodkin@synopsys.com>
Orphan arm arm1136 mx31 - imx31_phycore imx31_phycore_eet imx31_phycore:IMX31_PHYCORE_EET (resigned) Guennadi Liakhovetski <g.liakhovetski@gmx.de>
Orphan arm arm1136 mx31 freescale - mx31ads - (resigned) Guennadi Liakhovetski <g.liakhovetski@gmx.de>
Orphan arm pxa - - - lubbock - (dead address) Kyle Harris <kharris@nexus-tech.net>
-Orphan powerpc 74xx_7xx - - evb64260 EVB64260 EVB64260 -
-Orphan powerpc 74xx_7xx - - evb64260 EVB64260_750CX EVB64260 Eran Man <eran@nbase.co.il>
+Orphan powerpc 74xx_7xx - - evb64260 EVB64260 - -
Orphan powerpc mpc824x - - mousse MOUSSE - -
Orphan powerpc mpc8260 - - - rsdproto - -
Orphan powerpc mpc8260 - - rpxsuper RPXsuper - -
obj-$(CONFIG_CMD_EXT4) += cmd_ext4.o
obj-$(CONFIG_CMD_EXT2) += cmd_ext2.o
obj-$(CONFIG_CMD_FAT) += cmd_fat.o
-obj-$(CONFIG_CMD_FDC)$(CONFIG_CMD_FDOS) += cmd_fdc.o
+obj-$(CONFIG_CMD_FDC) += cmd_fdc.o
obj-$(CONFIG_OF_LIBFDT) += cmd_fdt.o fdt_support.o
-obj-$(CONFIG_CMD_FDOS) += cmd_fdos.o
obj-$(CONFIG_CMD_FITUPD) += cmd_fitupd.o
obj-$(CONFIG_CMD_FLASH) += cmd_flash.o
ifdef CONFIG_FPGA
return 0;
}
-ulong get_effective_memsize(void)
-{
-#ifndef CONFIG_VERY_BIG_RAM
- return gd->ram_size;
-#else
- /* limit stack to what we can reasonable map */
- return ((gd->ram_size > CONFIG_MAX_MEM_MAPPED) ?
- CONFIG_MAX_MEM_MAPPED : gd->ram_size);
-#endif
-}
-
void __dram_init_banksize(void)
{
#if defined(CONFIG_NR_DRAM_BANKS) && defined(CONFIG_SYS_SDRAM_BASE)
setenv_hex("filesize", images->os.image_len);
return 0;
}
- appl = (int (*)(int, char * const []))(ulong)ntohl(images->ep);
- (*appl)(argc, argv);
+ appl = (int (*)(int, char * const []))images->ep;
+ appl(argc, argv);
return 0;
}
return true;
}
-#if defined(CONFIG_CMD_FDOS)
-
-/* Low level functions for the Floppy-DOS layer */
-
-/**************************************************************************
-* int fdc_fdos_init
-* initialize the FDC layer
-*
-*/
-int fdc_fdos_init (int drive)
-{
- FD_GEO_STRUCT *pFG = (FD_GEO_STRUCT *)floppy_type;
- FDC_COMMAND_STRUCT *pCMD = &cmd;
-
- /* setup FDC and scan for drives */
- if (fdc_setup(drive, pCMD, pFG) == false) {
- printf("\n** Error in setup FDC **\n");
- return false;
- }
- if (fdc_check_drive(pCMD, pFG) == false) {
- printf("\n** Error in check_drives **\n");
- return false;
- }
- if((pCMD->flags&(1<<drive))==0) {
- /* drive not available */
- printf("\n** Drive %d not available **\n",drive);
- return false;
- }
- if((pCMD->flags&(0x10<<drive))==0) {
- /* no disk inserted */
- printf("\n** No disk inserted in drive %d **\n",drive);
- return false;
- }
- /* ok, we have a valid source */
- pCMD->drive=drive;
-
- /* read first block */
- pCMD->blnr=0;
- return true;
-}
-/**************************************************************************
-* int fdc_fdos_seek
-* parameter is a block number
-*/
-int fdc_fdos_seek (int where)
-{
- FD_GEO_STRUCT *pFG = (FD_GEO_STRUCT *)floppy_type;
- FDC_COMMAND_STRUCT *pCMD = &cmd;
-
- pCMD -> blnr = where ;
- return (fdc_seek (pCMD, pFG));
-}
-/**************************************************************************
-* int fdc_fdos_read
-* the length is in block number
-*/
-int fdc_fdos_read (void *buffer, int len)
-{
- FD_GEO_STRUCT *pFG = (FD_GEO_STRUCT *)floppy_type;
- FDC_COMMAND_STRUCT *pCMD = &cmd;
-
- return (fdc_read_data (buffer, len, pCMD, pFG));
-}
-#endif
-
-#if defined(CONFIG_CMD_FDC)
/****************************************************************************
* main routine do_fdcboot
*/
"boot from floppy device",
"loadAddr drive"
);
-#endif
/* if the parameter starts with a * then assume a string pointer else its a literal */
if (s[0] == '*') {
return (char *)simple_strtoul(&s[1], NULL, 16);
+ } else if (s[0] == '$') {
+ int i = 2;
+
+ if (s[1] != '{')
+ return NULL;
+
+ while (s[i] != '}') {
+ if (s[i] == 0)
+ return NULL;
+ i++;
+ }
+ s[i] = 0;
+ return getenv((const char *)&s[2]);
} else {
return s;
}
unsigned long __logbuffer_base(void)
{
- return CONFIG_SYS_SDRAM_BASE + gd->ram_size - LOGBUFF_LEN;
+ return CONFIG_SYS_SDRAM_BASE + get_effective_memsize() - LOGBUFF_LEN;
}
unsigned long logbuffer_base(void)
__attribute__((weak, alias("__logbuffer_base")));
buf = map_sysmem(addr, bytes);
while (count-- > 0) {
if (size == 4)
- *((ulong *)buf) = (ulong)writeval;
+ *((u32 *)buf) = (u32)writeval;
else if (size == 2)
- *((ushort *)buf) = (ushort)writeval;
+ *((u16 *)buf) = (u16)writeval;
else
- *((u_char *)buf) = (u_char)writeval;
+ *((u8 *)buf) = (u8)writeval;
buf += size;
}
unmap_sysmem(buf);
for (ngood = 0; ngood < count; ++ngood) {
ulong word1, word2;
if (size == 4) {
- word1 = *(ulong *)buf1;
- word2 = *(ulong *)buf2;
+ word1 = *(u32 *)buf1;
+ word2 = *(u32 *)buf2;
} else if (size == 2) {
- word1 = *(ushort *)buf1;
- word2 = *(ushort *)buf2;
+ word1 = *(u16 *)buf1;
+ word2 = *(u16 *)buf2;
} else {
- word1 = *(u_char *)buf1;
- word2 = *(u_char *)buf2;
+ word1 = *(u8 *)buf1;
+ word2 = *(u8 *)buf2;
}
if (word1 != word2) {
ulong offset = buf1 - base;
src = map_sysmem(addr, bytes);
while (count-- > 0) {
if (size == 4)
- *((ulong *)buf) = *((ulong *)src);
+ *((u32 *)buf) = *((u32 *)src);
else if (size == 2)
- *((ushort *)buf) = *((ushort *)src);
+ *((u16 *)buf) = *((u16 *)src);
else
- *((u_char *)buf) = *((u_char *)src);
+ *((u8 *)buf) = *((u8 *)src);
src += size;
buf += size;
{
ulong addr, length, i, bytes;
int size;
- volatile uint *longp;
- volatile ushort *shortp;
- volatile u_char *cp;
+ volatile u32 *longp;
+ volatile u16 *shortp;
+ volatile u8 *cp;
const void *buf;
if (argc < 3)
*/
if (length == 1) {
if (size == 4) {
- longp = (uint *)buf;
+ longp = (u32 *)buf;
for (;;)
i = *longp;
}
if (size == 2) {
- shortp = (ushort *)buf;
+ shortp = (u16 *)buf;
for (;;)
i = *shortp;
}
- cp = (u_char *)buf;
+ cp = (u8 *)buf;
for (;;)
i = *cp;
}
if (size == 4) {
for (;;) {
- longp = (uint *)buf;
+ longp = (u32 *)buf;
i = length;
while (i-- > 0)
*longp++;
}
if (size == 2) {
for (;;) {
- shortp = (ushort *)buf;
+ shortp = (u16 *)buf;
i = length;
while (i-- > 0)
*shortp++;
}
}
for (;;) {
- cp = (u_char *)buf;
+ cp = (u8 *)buf;
i = length;
while (i-- > 0)
*cp++;
{
ulong addr, length, i, data, bytes;
int size;
- volatile uint *longp;
- volatile ushort *shortp;
- volatile u_char *cp;
+ volatile u32 *longp;
+ volatile u16 *shortp;
+ volatile u8 *cp;
void *buf;
if (argc < 4)
*/
if (length == 1) {
if (size == 4) {
- longp = (uint *)buf;
+ longp = (u32 *)buf;
for (;;)
*longp = data;
}
if (size == 2) {
- shortp = (ushort *)buf;
+ shortp = (u16 *)buf;
for (;;)
*shortp = data;
}
- cp = (u_char *)buf;
+ cp = (u8 *)buf;
for (;;)
*cp = data;
}
if (size == 4) {
for (;;) {
- longp = (uint *)buf;
+ longp = (u32 *)buf;
i = length;
while (i-- > 0)
*longp++ = data;
}
if (size == 2) {
for (;;) {
- shortp = (ushort *)buf;
+ shortp = (u16 *)buf;
i = length;
while (i-- > 0)
*shortp++ = data;
}
}
for (;;) {
- cp = (u_char *)buf;
+ cp = (u8 *)buf;
i = length;
while (i-- > 0)
*cp++ = data;
if (temp != pattern) {
printf("\nFAILURE: Address bit stuck high @ 0x%.8lx:"
" expected 0x%.8lx, actual 0x%.8lx\n",
- start_addr + offset, pattern, temp);
+ start_addr + offset*sizeof(vu_long),
+ pattern, temp);
errs++;
if (ctrlc())
return -1;
printf("\nFAILURE: Address bit stuck low or"
" shorted @ 0x%.8lx: expected 0x%.8lx,"
" actual 0x%.8lx\n",
- start_addr + offset, pattern, temp);
+ start_addr + offset*sizeof(vu_long),
+ pattern, temp);
errs++;
if (ctrlc())
return -1;
if (temp != pattern) {
printf("\nFAILURE (read/write) @ 0x%.8lx:"
" expected 0x%.8lx, actual 0x%.8lx)\n",
- start_addr + offset, pattern, temp);
+ start_addr + offset*sizeof(vu_long),
+ pattern, temp);
errs++;
if (ctrlc())
return -1;
if (temp != anti_pattern) {
printf("\nFAILURE (read/write): @ 0x%.8lx:"
" expected 0x%.8lx, actual 0x%.8lx)\n",
- start_addr + offset, anti_pattern, temp);
+ start_addr + offset*sizeof(vu_long),
+ anti_pattern, temp);
errs++;
if (ctrlc())
return -1;
printf("\nMem error @ 0x%08X: "
"found %08lX, expected %08lX\n",
- (uint)(uintptr_t)(start_addr + offset),
+ (uint)(uintptr_t)(start_addr + offset*sizeof(vu_long)),
readback, val);
errs++;
if (ctrlc())
ptr = map_sysmem(addr, size);
printf("%08lx:", addr);
if (size == 4)
- printf(" %08x", *((uint *)ptr));
+ printf(" %08x", *((u32 *)ptr));
else if (size == 2)
- printf(" %04x", *((ushort *)ptr));
+ printf(" %04x", *((u16 *)ptr));
else
- printf(" %02x", *((u_char *)ptr));
+ printf(" %02x", *((u8 *)ptr));
nbytes = readline (" ? ");
if (nbytes == 0 || (nbytes == 1 && console_buffer[0] == '-')) {
reset_cmd_timeout();
#endif
if (size == 4)
- *((uint *)ptr) = i;
+ *((u32 *)ptr) = i;
else if (size == 2)
- *((ushort *)ptr) = i;
+ *((u16 *)ptr) = i;
else
- *((u_char *)ptr) = i;
+ *((u8 *)ptr) = i;
if (incrflag)
addr += size;
}
#include <command.h>
#include <asm/blackfin.h>
+#include <asm/clock.h>
#include <asm/mach-common/bits/otp.h>
static const char *otp_strerror(uint32_t err)
if (label->fdt) {
fdtfile = label->fdt;
} else if (label->fdtdir) {
- fdtfile = getenv("fdtfile");
- /*
- * For complex cases, it might be worth calling a
- * board- or SoC-provided function here to provide a
- * better default:
- *
- * if (!fdtfile)
- * fdtfile = gen_fdtfile();
- *
- * If this is added, be sure to keep the default below,
- * or move it to the default weak implementation of
- * gen_fdtfile().
- */
- if (!fdtfile) {
- char *soc = getenv("soc");
- char *board = getenv("board");
- char *slash;
-
- len = strlen(label->fdtdir);
- if (!len)
- slash = "./";
- else if (label->fdtdir[len - 1] != '/')
- slash = "/";
- else
- slash = "";
-
- len = strlen(label->fdtdir) + strlen(slash) +
- strlen(soc) + 1 + strlen(board) + 5;
- fdtfilefree = malloc(len);
- if (!fdtfilefree) {
- printf("malloc fail (FDT filename)\n");
- return 1;
- }
-
- snprintf(fdtfilefree, len, "%s%s%s-%s.dtb",
- label->fdtdir, slash, soc, board);
- fdtfile = fdtfilefree;
+ char *f1, *f2, *f3, *f4, *slash;
+
+ f1 = getenv("fdtfile");
+ if (f1) {
+ f2 = "";
+ f3 = "";
+ f4 = "";
+ } else {
+ /*
+ * For complex cases where this code doesn't
+ * generate the correct filename, the board
+ * code should set $fdtfile during early boot,
+ * or the boot scripts should set $fdtfile
+ * before invoking "pxe" or "sysboot".
+ */
+ f1 = getenv("soc");
+ f2 = "-";
+ f3 = getenv("board");
+ f4 = ".dtb";
+ }
+
+ len = strlen(label->fdtdir);
+ if (!len)
+ slash = "./";
+ else if (label->fdtdir[len - 1] != '/')
+ slash = "/";
+ else
+ slash = "";
+
+ len = strlen(label->fdtdir) + strlen(slash) +
+ strlen(f1) + strlen(f2) + strlen(f3) +
+ strlen(f4) + 1;
+ fdtfilefree = malloc(len);
+ if (!fdtfilefree) {
+ printf("malloc fail (FDT filename)\n");
+ return 1;
}
+
+ snprintf(fdtfilefree, len, "%s%s%s%s%s%s",
+ label->fdtdir, slash, f1, f2, f3, f4);
+ fdtfile = fdtfilefree;
}
if (fdtfile) {
return 0;
}
+static int ubi_check_volumename(const struct ubi_volume *vol, char *name)
+{
+ return strcmp(vol->name, name);
+}
+
+static int ubi_check(char *name)
+{
+ int i;
+
+ for (i = 0; i < (ubi->vtbl_slots + 1); i++) {
+ if (!ubi->volumes[i])
+ continue; /* Empty record */
+
+ if (!ubi_check_volumename(ubi->volumes[i], name))
+ return 0;
+ }
+
+ return -EEXIST;
+}
+
+
static int verify_mkvol_req(const struct ubi_device *ubi,
const struct ubi_mkvol_req *req)
{
return ubi_info(layout);
}
+ if (strcmp(argv[1], "check") == 0) {
+ if (argc > 2)
+ return ubi_check(argv[2]);
+
+ printf("Error, no volume name passed\n");
+ return 1;
+ }
+
if (strncmp(argv[1], "create", 6) == 0) {
int dynamic = 1; /* default: dynamic volume */
" header offset)\n"
"ubi info [l[ayout]]"
" - Display volume and ubi layout information\n"
+ "ubi check volumename"
+ " - check if volumename exists\n"
"ubi create[vol] volume [size] [type]"
" - create volume name with size\n"
"ubi write[vol] address volume size"
static int ubifs_initialized;
static int ubifs_mounted;
-extern struct super_block *ubifs_sb;
-
-/* Prototypes */
-int ubifs_init(void);
-int ubifs_mount(char *vol_name);
-void ubifs_umount(struct ubifs_info *c);
-int ubifs_ls(char *dir_name);
-int ubifs_load(char *filename, u32 addr, u32 size);
-
int do_ubifs_mount(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
char *vol_name;
void env_relocate_spec(void)
{
- char buf[CONFIG_ENV_SIZE];
int ret;
+ char *buf = NULL;
+ buf = (char *)malloc(CONFIG_ENV_SIZE);
env_flash = spi_flash_probe(CONFIG_ENV_SPI_BUS, CONFIG_ENV_SPI_CS,
CONFIG_ENV_SPI_MAX_HZ, CONFIG_ENV_SPI_MODE);
if (!env_flash) {
set_default_env("!spi_flash_probe() failed");
+ if (buf)
+ free(buf);
return;
}
gd->env_valid = 1;
out:
spi_flash_free(env_flash);
+ if (buf)
+ free(buf);
env_flash = NULL;
}
#endif
* SPDX-License-Identifier: GPL-2.0+
*/
-#include <config.h>
+#include <common.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
#ifdef __PPC__
/*
* At least on G2 PowerPC cores, sequential accesses to non-existent
return (maxsize);
}
+
+phys_size_t __weak get_effective_memsize(void)
+{
+#ifndef CONFIG_VERY_BIG_RAM
+ return gd->ram_size;
+#else
+ /* limit stack to what we can reasonable map */
+ return ((gd->ram_size > CONFIG_MAX_MEM_MAPPED) ?
+ CONFIG_MAX_MEM_MAPPED : gd->ram_size);
+#endif
+}
RELFLAGS= $(PLATFORM_RELFLAGS)
-OBJCFLAGS += --gap-fill=0xff
+OBJCOPYFLAGS += --gap-fill=0xff
CPPFLAGS = $(RELFLAGS)
CPPFLAGS += -pipe $(PLATFORM_CPPFLAGS)
*/
static int set_protective_mbr(block_dev_desc_t *dev_desc)
{
- legacy_mbr *p_mbr;
-
/* Setup the Protective MBR */
- p_mbr = calloc(1, sizeof(p_mbr));
+ ALLOC_CACHE_ALIGN_BUFFER(legacy_mbr, p_mbr, 1);
+ memset(p_mbr, 0, sizeof(*p_mbr));
+
if (p_mbr == NULL) {
printf("%s: calloc failed!\n", __func__);
return -1;
if (dev_desc->block_write(dev_desc->dev, 0, 1, p_mbr) != 1) {
printf("** Can't write to device %d **\n",
dev_desc->dev);
- free(p_mbr);
return -1;
}
- free(p_mbr);
return 0;
}
main_idx = doc/DocBook/$(index)
build_main_index = rm -rf $(main_idx); \
echo '<h1>U-Boot Bootloader HTML Documentation</h1>' >> $(main_idx) && \
- echo '<h2>U-Boot Version: $(U_BOOT_VERSION)</h2>' >> $(main_idx) && \
+ echo '<h2>U-Boot Version: $(UBOOTVERSION)</h2>' >> $(main_idx) && \
cat $(HTML) >> $(main_idx)
quiet_cmd_db2html = HTML $@
--- /dev/null
+Testing details-
+----------------
+
+This doc simply illustrated the testing details of qspi flash
+driver with Macronix M25L51235 flash device.
+
+The test includes
+- probing the flash device
+- erasing the flash device
+- Writing to flash
+- Reading the contents of the flash.
+
+Test Log
+--------
+
+Hit any key to stop autoboot: 0
+U-Boot# sf probe 0
+SF: Detected MX25L51235F with page size 256 Bytes, erase size 64 KiB, total 64 MiB, mapped at 30000000
+U-Boot# sf erase 0 0x80000
+SF: 524288 bytes @ 0x0 Erased: OK
+U-Boot# mw 81000000 0xdededede 0x40000
+U-Boot# sf write 81000000 0 0x40000
+SF: 262144 bytes @ 0x0 Written: OK
+U-Boot# sf read 82000000 0 0x40000
+SF: 262144 bytes @ 0x0 Read: OK
+U-Boot# md 0x82000000
+82000000: dededede dededede dededede dededede ................
+82000010: dededede dededede dededede dededede ................
+82000020: dededede dededede dededede dededede ................
+82000030: dededede dededede dededede dededede ................
+82000040: dededede dededede dededede dededede ................
+82000050: dededede dededede dededede dededede ................
+82000060: dededede dededede dededede dededede ................
+82000070: dededede dededede dededede dededede ................
+82000080: dededede dededede dededede dededede ................
+82000090: dededede dededede dededede dededede ................
+820000a0: dededede dededede dededede dededede ................
+820000b0: dededede dededede dededede dededede ................
+820000c0: dededede dededede dededede dededede ................
+820000d0: dededede dededede dededede dededede ................
+820000e0: dededede dededede dededede dededede ................
+820000f0: dededede dededede dededede dededede ................
+U-Boot# md 0x82010000
+82010000: dededede dededede dededede dededede ................
+82010010: dededede dededede dededede dededede ................
+82010020: dededede dededede dededede dededede ................
+82010030: dededede dededede dededede dededede ................
+82010040: dededede dededede dededede dededede ................
+82010050: dededede dededede dededede dededede ................
+82010060: dededede dededede dededede dededede ................
+82010070: dededede dededede dededede dededede ................
+82010080: dededede dededede dededede dededede ................
+82010090: dededede dededede dededede dededede ................
+820100a0: dededede dededede dededede dededede ................
+820100b0: dededede dededede dededede dededede ................
+820100c0: dededede dededede dededede dededede ................
+820100d0: dededede dededede dededede dededede ................
+820100e0: dededede dededede dededede dededede ................
+820100f0: dededede dededede dededede dededede ................
+U-Boot# md 0x82030000
+82030000: dededede dededede dededede dededede ................
+82030010: dededede dededede dededede dededede ................
+82030020: dededede dededede dededede dededede ................
+82030030: dededede dededede dededede dededede ................
+82030040: dededede dededede dededede dededede ................
+82030050: dededede dededede dededede dededede ................
+82030060: dededede dededede dededede dededede ................
+82030070: dededede dededede dededede dededede ................
+82030080: dededede dededede dededede dededede ................
+82030090: dededede dededede dededede dededede ................
+820300a0: dededede dededede dededede dededede ................
+820300b0: dededede dededede dededede dededede ................
+820300c0: dededede dededede dededede dededede ................
+820300d0: dededede dededede dededede dededede ................
+820300e0: dededede dededede dededede dededede ................
+820300f0: dededede dededede dededede dededede ................
#include <command.h>
#include <config.h>
#include <asm/byteorder.h>
+#include <asm/clock.h>
#include <asm/io.h>
#include <asm/errno.h>
#include <asm/portmux.h>
obj-$(CONFIG_BOOTCOUNT_AM33XX) += bootcount_davinci.o
obj-$(CONFIG_BOOTCOUNT_RAM) += bootcount_ram.o
obj-$(CONFIG_BOOTCOUNT_ENV) += bootcount_env.o
+obj-$(CONFIG_BOOTCOUNT_I2C) += bootcount_i2c.o
--- /dev/null
+/*
+ * (C) Copyright 2013
+ * Heiko Schocher, DENX Software Engineering, hs@denx.de.
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <bootcount.h>
+#include <linux/compiler.h>
+#include <i2c.h>
+
+#define BC_MAGIC 0xbc
+
+void bootcount_store(ulong a)
+{
+ unsigned char buf[3];
+ int ret;
+
+ buf[0] = BC_MAGIC;
+ buf[1] = (a & 0xff);
+ ret = i2c_write(CONFIG_SYS_I2C_RTC_ADDR, CONFIG_SYS_BOOTCOUNT_ADDR,
+ CONFIG_BOOTCOUNT_ALEN, buf, 2);
+ if (ret != 0)
+ puts("Error writing bootcount\n");
+}
+
+ulong bootcount_load(void)
+{
+ unsigned char buf[3];
+ int ret;
+
+ ret = i2c_read(CONFIG_SYS_I2C_RTC_ADDR, CONFIG_SYS_BOOTCOUNT_ADDR,
+ CONFIG_BOOTCOUNT_ALEN, buf, 2);
+ if (ret != 0) {
+ puts("Error loading bootcount\n");
+ return 0;
+ }
+ if (buf[0] == BC_MAGIC)
+ return buf[1];
+
+ bootcount_store(0);
+
+ return 0;
+}
#include <fsl_ddr_sdram.h>
#include <asm/processor.h>
#include <fsl_immap.h>
+#include <fsl_ddr.h>
#if (CONFIG_CHIP_SELECTS_PER_CTRL > 4)
#error Invalid setting for CONFIG_CHIP_SELECTS_PER_CTRL
goto step2;
if (regs->ddr_eor)
- out_be32(&ddr->eor, regs->ddr_eor);
+ ddr_out32(&ddr->eor, regs->ddr_eor);
for (i = 0; i < CONFIG_CHIP_SELECTS_PER_CTRL; i++) {
if (i == 0) {
- out_be32(&ddr->cs0_bnds, regs->cs[i].bnds);
- out_be32(&ddr->cs0_config, regs->cs[i].config);
- out_be32(&ddr->cs0_config_2, regs->cs[i].config_2);
+ ddr_out32(&ddr->cs0_bnds, regs->cs[i].bnds);
+ ddr_out32(&ddr->cs0_config, regs->cs[i].config);
+ ddr_out32(&ddr->cs0_config_2, regs->cs[i].config_2);
} else if (i == 1) {
- out_be32(&ddr->cs1_bnds, regs->cs[i].bnds);
- out_be32(&ddr->cs1_config, regs->cs[i].config);
- out_be32(&ddr->cs1_config_2, regs->cs[i].config_2);
+ ddr_out32(&ddr->cs1_bnds, regs->cs[i].bnds);
+ ddr_out32(&ddr->cs1_config, regs->cs[i].config);
+ ddr_out32(&ddr->cs1_config_2, regs->cs[i].config_2);
} else if (i == 2) {
- out_be32(&ddr->cs2_bnds, regs->cs[i].bnds);
- out_be32(&ddr->cs2_config, regs->cs[i].config);
- out_be32(&ddr->cs2_config_2, regs->cs[i].config_2);
+ ddr_out32(&ddr->cs2_bnds, regs->cs[i].bnds);
+ ddr_out32(&ddr->cs2_config, regs->cs[i].config);
+ ddr_out32(&ddr->cs2_config_2, regs->cs[i].config_2);
} else if (i == 3) {
- out_be32(&ddr->cs3_bnds, regs->cs[i].bnds);
- out_be32(&ddr->cs3_config, regs->cs[i].config);
- out_be32(&ddr->cs3_config_2, regs->cs[i].config_2);
+ ddr_out32(&ddr->cs3_bnds, regs->cs[i].bnds);
+ ddr_out32(&ddr->cs3_config, regs->cs[i].config);
+ ddr_out32(&ddr->cs3_config_2, regs->cs[i].config_2);
}
}
- out_be32(&ddr->timing_cfg_3, regs->timing_cfg_3);
- out_be32(&ddr->timing_cfg_0, regs->timing_cfg_0);
- out_be32(&ddr->timing_cfg_1, regs->timing_cfg_1);
- out_be32(&ddr->timing_cfg_2, regs->timing_cfg_2);
- out_be32(&ddr->sdram_cfg_2, regs->ddr_sdram_cfg_2);
- out_be32(&ddr->sdram_mode, regs->ddr_sdram_mode);
- out_be32(&ddr->sdram_mode_2, regs->ddr_sdram_mode_2);
- out_be32(&ddr->sdram_mode_3, regs->ddr_sdram_mode_3);
- out_be32(&ddr->sdram_mode_4, regs->ddr_sdram_mode_4);
- out_be32(&ddr->sdram_mode_5, regs->ddr_sdram_mode_5);
- out_be32(&ddr->sdram_mode_6, regs->ddr_sdram_mode_6);
- out_be32(&ddr->sdram_mode_7, regs->ddr_sdram_mode_7);
- out_be32(&ddr->sdram_mode_8, regs->ddr_sdram_mode_8);
- out_be32(&ddr->sdram_md_cntl, regs->ddr_sdram_md_cntl);
- out_be32(&ddr->sdram_interval, regs->ddr_sdram_interval);
- out_be32(&ddr->sdram_data_init, regs->ddr_data_init);
- out_be32(&ddr->sdram_clk_cntl, regs->ddr_sdram_clk_cntl);
- out_be32(&ddr->init_addr, regs->ddr_init_addr);
- out_be32(&ddr->init_ext_addr, regs->ddr_init_ext_addr);
-
- out_be32(&ddr->timing_cfg_4, regs->timing_cfg_4);
- out_be32(&ddr->timing_cfg_5, regs->timing_cfg_5);
- out_be32(&ddr->ddr_zq_cntl, regs->ddr_zq_cntl);
- out_be32(&ddr->ddr_wrlvl_cntl, regs->ddr_wrlvl_cntl);
+ ddr_out32(&ddr->timing_cfg_3, regs->timing_cfg_3);
+ ddr_out32(&ddr->timing_cfg_0, regs->timing_cfg_0);
+ ddr_out32(&ddr->timing_cfg_1, regs->timing_cfg_1);
+ ddr_out32(&ddr->timing_cfg_2, regs->timing_cfg_2);
+ ddr_out32(&ddr->sdram_cfg_2, regs->ddr_sdram_cfg_2);
+ ddr_out32(&ddr->sdram_mode, regs->ddr_sdram_mode);
+ ddr_out32(&ddr->sdram_mode_2, regs->ddr_sdram_mode_2);
+ ddr_out32(&ddr->sdram_mode_3, regs->ddr_sdram_mode_3);
+ ddr_out32(&ddr->sdram_mode_4, regs->ddr_sdram_mode_4);
+ ddr_out32(&ddr->sdram_mode_5, regs->ddr_sdram_mode_5);
+ ddr_out32(&ddr->sdram_mode_6, regs->ddr_sdram_mode_6);
+ ddr_out32(&ddr->sdram_mode_7, regs->ddr_sdram_mode_7);
+ ddr_out32(&ddr->sdram_mode_8, regs->ddr_sdram_mode_8);
+ ddr_out32(&ddr->sdram_md_cntl, regs->ddr_sdram_md_cntl);
+ ddr_out32(&ddr->sdram_interval, regs->ddr_sdram_interval);
+ ddr_out32(&ddr->sdram_data_init, regs->ddr_data_init);
+ ddr_out32(&ddr->sdram_clk_cntl, regs->ddr_sdram_clk_cntl);
+ ddr_out32(&ddr->init_addr, regs->ddr_init_addr);
+ ddr_out32(&ddr->init_ext_addr, regs->ddr_init_ext_addr);
+
+ ddr_out32(&ddr->timing_cfg_4, regs->timing_cfg_4);
+ ddr_out32(&ddr->timing_cfg_5, regs->timing_cfg_5);
+ ddr_out32(&ddr->ddr_zq_cntl, regs->ddr_zq_cntl);
+ ddr_out32(&ddr->ddr_wrlvl_cntl, regs->ddr_wrlvl_cntl);
#ifndef CONFIG_SYS_FSL_DDR_EMU
/*
* Skip these two registers if running on emulator
*/
if (regs->ddr_wrlvl_cntl_2)
- out_be32(&ddr->ddr_wrlvl_cntl_2, regs->ddr_wrlvl_cntl_2);
+ ddr_out32(&ddr->ddr_wrlvl_cntl_2, regs->ddr_wrlvl_cntl_2);
if (regs->ddr_wrlvl_cntl_3)
- out_be32(&ddr->ddr_wrlvl_cntl_3, regs->ddr_wrlvl_cntl_3);
+ ddr_out32(&ddr->ddr_wrlvl_cntl_3, regs->ddr_wrlvl_cntl_3);
#endif
- out_be32(&ddr->ddr_sr_cntr, regs->ddr_sr_cntr);
- out_be32(&ddr->ddr_sdram_rcw_1, regs->ddr_sdram_rcw_1);
- out_be32(&ddr->ddr_sdram_rcw_2, regs->ddr_sdram_rcw_2);
- out_be32(&ddr->ddr_cdr1, regs->ddr_cdr1);
- out_be32(&ddr->ddr_cdr2, regs->ddr_cdr2);
- out_be32(&ddr->err_disable, regs->err_disable);
- out_be32(&ddr->err_int_en, regs->err_int_en);
+ ddr_out32(&ddr->ddr_sr_cntr, regs->ddr_sr_cntr);
+ ddr_out32(&ddr->ddr_sdram_rcw_1, regs->ddr_sdram_rcw_1);
+ ddr_out32(&ddr->ddr_sdram_rcw_2, regs->ddr_sdram_rcw_2);
+ ddr_out32(&ddr->ddr_cdr1, regs->ddr_cdr1);
+ ddr_out32(&ddr->ddr_cdr2, regs->ddr_cdr2);
+ ddr_out32(&ddr->err_disable, regs->err_disable);
+ ddr_out32(&ddr->err_int_en, regs->err_int_en);
for (i = 0; i < 32; i++) {
if (regs->debug[i]) {
debug("Write to debug_%d as %08x\n", i + 1,
regs->debug[i]);
- out_be32(&ddr->debug[i], regs->debug[i]);
+ ddr_out32(&ddr->debug[i], regs->debug[i]);
}
}
/* Set, but do not enable the memory */
temp_sdram_cfg = regs->ddr_sdram_cfg;
temp_sdram_cfg &= ~(SDRAM_CFG_MEM_EN);
- out_be32(&ddr->sdram_cfg, temp_sdram_cfg);
+ ddr_out32(&ddr->sdram_cfg, temp_sdram_cfg);
/*
* 500 painful micro-seconds must elapse between
asm volatile("dsb sy;isb");
/* Let the controller go */
- temp_sdram_cfg = in_be32(&ddr->sdram_cfg) & ~SDRAM_CFG_BI;
- out_be32(&ddr->sdram_cfg, temp_sdram_cfg | SDRAM_CFG_MEM_EN);
+ temp_sdram_cfg = ddr_in32(&ddr->sdram_cfg) & ~SDRAM_CFG_BI;
+ ddr_out32(&ddr->sdram_cfg, temp_sdram_cfg | SDRAM_CFG_MEM_EN);
asm volatile("dsb sy;isb");
total_gb_size_per_controller = 0;
debug("Need to wait up to %d * 10ms\n", timeout);
/* Poll DDR_SDRAM_CFG_2[D_INIT] bit until auto-data init is done. */
- while ((in_be32(&ddr->sdram_cfg_2) & SDRAM_CFG2_D_INIT) &&
+ while ((ddr_in32(&ddr->sdram_cfg_2) & SDRAM_CFG2_D_INIT) &&
(timeout >= 0)) {
udelay(10000); /* throttle polling rate */
timeout--;
u32 ver_major_minor_errata;
ddr = (void *)_DDR_ADDR;
- ver_major_minor_errata = (in_be32(&ddr->ip_rev1) & 0xFFFF) << 8;
- ver_major_minor_errata |= (in_be32(&ddr->ip_rev2) & 0xFF00) >> 8;
+ ver_major_minor_errata = (ddr_in32(&ddr->ip_rev1) & 0xFFFF) << 8;
+ ver_major_minor_errata |= (ddr_in32(&ddr->ip_rev2) & 0xFF00) >> 8;
return ver_major_minor_errata;
}
if (!popts->memctl_interleaving)
break;
switch (popts->memctl_interleaving_mode) {
+ case FSL_DDR_256B_INTERLEAVING:
case FSL_DDR_CACHE_LINE_INTERLEAVING:
case FSL_DDR_PAGE_INTERLEAVING:
case FSL_DDR_BANK_INTERLEAVING:
#include <fsl_ddr_sdram.h>
#include <fsl_ddr.h>
+/*
+ * CONFIG_SYS_FSL_DDR_SDRAM_BASE_PHY is the physical address from the view
+ * of DDR controllers. It is the same as CONFIG_SYS_DDR_SDRAM_BASE for
+ * all Power SoCs. But it could be different for ARM SoCs. For example,
+ * fsl_lsch3 has a mapping mechanism to map DDR memory to ranges (in order) of
+ * 0x00_8000_0000 ~ 0x00_ffff_ffff
+ * 0x80_8000_0000 ~ 0xff_ffff_ffff
+ */
+#ifndef CONFIG_SYS_FSL_DDR_SDRAM_BASE_PHY
+#define CONFIG_SYS_FSL_DDR_SDRAM_BASE_PHY CONFIG_SYS_DDR_SDRAM_BASE
+#endif
+
#ifdef CONFIG_PPC
#include <asm/fsl_law.h>
debug("dbw_cap_adj[%d]=%d\n", i, dbw_cap_adj[i]);
}
- current_mem_base = CONFIG_SYS_DDR_SDRAM_BASE;
+ current_mem_base = CONFIG_SYS_FSL_DDR_SDRAM_BASE_PHY;
total_mem = 0;
if (pinfo->memctl_opts[0].memctl_interleaving) {
rank_density = pinfo->dimm_params[0][0].rank_density >>
for (i = 0; i < CONFIG_NUM_DDR_CONTROLLERS; i++) {
if (pinfo->memctl_opts[i].memctl_interleaving) {
switch (pinfo->memctl_opts[i].memctl_interleaving_mode) {
+ case FSL_DDR_256B_INTERLEAVING:
case FSL_DDR_CACHE_LINE_INTERLEAVING:
case FSL_DDR_PAGE_INTERLEAVING:
case FSL_DDR_BANK_INTERLEAVING:
}
total_mem = 1 + (((unsigned long long)max_end << 24ULL) |
- 0xFFFFFFULL) - CONFIG_SYS_DDR_SDRAM_BASE;
+ 0xFFFFFFULL) - CONFIG_SYS_FSL_DDR_SDRAM_BASE_PHY;
}
return total_mem;
* If memory controller interleaving is enabled, then the data
* bus widths must be programmed identically for all memory controllers.
*
- * XXX: Attempt to set all controllers to the same chip select
+ * Attempt to set all controllers to the same chip select
* interleaving mode. It will do a best effort to get the
* requested ranks interleaved together such that the result
* should be a subset of the requested configuration.
+ *
+ * if CONFIG_SYS_FSL_DDR_INTLV_256B is defined, mandatory interleaving
+ * with 256 Byte is enabled.
*/
#if (CONFIG_NUM_DDR_CONTROLLERS > 1)
if (!hwconfig_sub_f("fsl_ddr", "ctlr_intlv", buf))
+#ifdef CONFIG_SYS_FSL_DDR_INTLV_256B
+ ;
+#else
goto done;
-
+#endif
if (pdimm[0].n_ranks == 0) {
printf("There is no rank on CS0 for controller %d.\n", ctrl_num);
popts->memctl_interleaving = 0;
goto done;
}
popts->memctl_interleaving = 1;
+#ifdef CONFIG_SYS_FSL_DDR_INTLV_256B
+ popts->memctl_interleaving_mode = FSL_DDR_256B_INTERLEAVING;
+ popts->memctl_interleaving = 1;
+ debug("256 Byte interleaving\n");
+ goto done;
+#endif
/*
* test null first. if CONFIG_HWCONFIG is not defined
* hwconfig_arg_cmp returns non-zero
"Memory controller interleaving disabled.\n");
} else {
switch (check_intlv) {
+ case FSL_DDR_256B_INTERLEAVING:
case FSL_DDR_CACHE_LINE_INTERLEAVING:
case FSL_DDR_PAGE_INTERLEAVING:
case FSL_DDR_BANK_INTERLEAVING:
u32 *mcintl3r = (void *) (CONFIG_SYS_IMMR + 0x18004);
#endif
#if (CONFIG_NUM_DDR_CONTROLLERS > 1)
- uint32_t cs0_config = in_be32(&ddr->cs0_config);
+ uint32_t cs0_config = ddr_in32(&ddr->cs0_config);
#endif
- uint32_t sdram_cfg = in_be32(&ddr->sdram_cfg);
+ uint32_t sdram_cfg = ddr_in32(&ddr->sdram_cfg);
int cas_lat;
#if CONFIG_NUM_DDR_CONTROLLERS >= 2
if (!(sdram_cfg & SDRAM_CFG_MEM_EN)) {
ddr = (void __iomem *)CONFIG_SYS_FSL_DDR2_ADDR;
- sdram_cfg = in_be32(&ddr->sdram_cfg);
+ sdram_cfg = ddr_in32(&ddr->sdram_cfg);
}
#endif
#if CONFIG_NUM_DDR_CONTROLLERS >= 3
if (!(sdram_cfg & SDRAM_CFG_MEM_EN)) {
ddr = (void __iomem *)CONFIG_SYS_FSL_DDR3_ADDR;
- sdram_cfg = in_be32(&ddr->sdram_cfg);
+ sdram_cfg = ddr_in32(&ddr->sdram_cfg);
}
#endif
puts(" (DDR");
puts(", 64-bit");
/* Calculate CAS latency based on timing cfg values */
- cas_lat = ((in_be32(&ddr->timing_cfg_1) >> 16) & 0xf) + 1;
- if ((in_be32(&ddr->timing_cfg_3) >> 12) & 1)
+ cas_lat = ((ddr_in32(&ddr->timing_cfg_1) >> 16) & 0xf) + 1;
+ if ((ddr_in32(&ddr->timing_cfg_3) >> 12) & 1)
cas_lat += (8 << 1);
printf(", CL=%d", cas_lat >> 1);
if (cas_lat & 0x1)
puts(" DDR Controller Interleaving Mode: ");
switch ((cs0_config >> 24) & 0xf) {
+ case FSL_DDR_256B_INTERLEAVING:
+ puts("256B");
+ break;
case FSL_DDR_CACHE_LINE_INTERLEAVING:
puts("cache line");
break;
op == DFU_OP_READ ? "load" : "write",
dfu->data.mmc.dev, dfu->data.mmc.part,
(unsigned int) buf, dfu->name);
- if (op == DFU_OP_WRITE)
- sprintf(cmd_buf + strlen(cmd_buf), " %lx", *len);
break;
case DFU_FS_EXT4:
sprintf(cmd_buf, "ext4%s mmc %d:%d 0x%x /%s",
op == DFU_OP_READ ? "load" : "write",
dfu->data.mmc.dev, dfu->data.mmc.part,
(unsigned int) buf, dfu->name);
- if (op == DFU_OP_WRITE)
- sprintf(cmd_buf + strlen(cmd_buf), " %ld", *len);
break;
default:
printf("%s: Layout (%s) not (yet) supported!\n", __func__,
return -1;
}
+ if (op == DFU_OP_WRITE)
+ sprintf(cmd_buf + strlen(cmd_buf), " %lx", *len);
+
debug("%s: %s 0x%p\n", __func__, cmd_buf, cmd_buf);
ret = run_command(cmd_buf, 0);
--- /dev/null
+/*
+ * i2c.c - driver for ADI TWI/I2C
+ *
+ * Copyright (c) 2006-2013 Analog Devices Inc.
+ *
+ * Licensed under the GPL-2 or later.
+ */
+
+#include <common.h>
+#include <i2c.h>
+
+#include <asm/clock.h>
+#include <asm/twi.h>
+#include <asm/io.h>
+
+/* Every register is 32bit aligned, but only 16bits in size */
+#define ureg(name) u16 name; u16 __pad_##name;
+struct twi_regs {
+ ureg(clkdiv);
+ ureg(control);
+ ureg(slave_ctl);
+ ureg(slave_stat);
+ ureg(slave_addr);
+ ureg(master_ctl);
+ ureg(master_stat);
+ ureg(master_addr);
+ ureg(int_stat);
+ ureg(int_mask);
+ ureg(fifo_ctl);
+ ureg(fifo_stat);
+ char __pad[0x50];
+ ureg(xmt_data8);
+ ureg(xmt_data16);
+ ureg(rcv_data8);
+ ureg(rcv_data16);
+};
+#undef ureg
+
+/* U-Boot I2C framework allows only one active device at a time. */
+#ifdef TWI_CLKDIV
+#define TWI0_CLKDIV TWI_CLKDIV
+#endif
+static struct twi_regs *twi = (void *)TWI0_CLKDIV;
+
+#ifdef DEBUG
+# define dmemset(s, c, n) memset(s, c, n)
+#else
+# define dmemset(s, c, n)
+#endif
+#define debugi(fmt, args...) \
+ debug( \
+ "MSTAT:0x%03x FSTAT:0x%x ISTAT:0x%02x\t%-20s:%-3i: " fmt "\n", \
+ twi->master_stat, twi->fifo_stat, twi->int_stat, \
+ __func__, __LINE__, ## args)
+
+#ifdef CONFIG_TWICLK_KHZ
+# error do not define CONFIG_TWICLK_KHZ ... use CONFIG_SYS_I2C_SPEED
+#endif
+
+/*
+ * The way speed is changed into duty often results in integer truncation
+ * with 50% duty, so we'll force rounding up to the next duty by adding 1
+ * to the max. In practice this will get us a speed of something like
+ * 385 KHz. The other limit is easy to handle as it is only 8 bits.
+ */
+#define I2C_SPEED_MAX 400000
+#define I2C_SPEED_TO_DUTY(speed) (5000000 / (speed))
+#define I2C_DUTY_MAX (I2C_SPEED_TO_DUTY(I2C_SPEED_MAX) + 1)
+#define I2C_DUTY_MIN 0xff /* 8 bit limited */
+#define SYS_I2C_DUTY I2C_SPEED_TO_DUTY(CONFIG_SYS_I2C_SPEED)
+/* Note: duty is inverse of speed, so the comparisons below are correct */
+#if SYS_I2C_DUTY < I2C_DUTY_MAX || SYS_I2C_DUTY > I2C_DUTY_MIN
+# error "The Blackfin I2C hardware can only operate 20KHz - 400KHz"
+#endif
+
+/* All transfers are described by this data structure */
+struct i2c_msg {
+ u8 flags;
+#define I2C_M_COMBO 0x4
+#define I2C_M_STOP 0x2
+#define I2C_M_READ 0x1
+ int len; /* msg length */
+ u8 *buf; /* pointer to msg data */
+ int alen; /* addr length */
+ u8 *abuf; /* addr buffer */
+};
+
+/* Allow msec timeout per ~byte transfer */
+#define I2C_TIMEOUT 10
+
+/**
+ * wait_for_completion - manage the actual i2c transfer
+ * @msg: the i2c msg
+ */
+static int wait_for_completion(struct i2c_msg *msg)
+{
+ u16 int_stat, ctl;
+ ulong timebase = get_timer(0);
+
+ do {
+ int_stat = readw(&twi->int_stat);
+
+ if (int_stat & XMTSERV) {
+ debugi("processing XMTSERV");
+ writew(XMTSERV, &twi->int_stat);
+ if (msg->alen) {
+ writew(*(msg->abuf++), &twi->xmt_data8);
+ --msg->alen;
+ } else if (!(msg->flags & I2C_M_COMBO) && msg->len) {
+ writew(*(msg->buf++), &twi->xmt_data8);
+ --msg->len;
+ } else {
+ ctl = readw(&twi->master_ctl);
+ if (msg->flags & I2C_M_COMBO)
+ writew(ctl | RSTART | MDIR,
+ &twi->master_ctl);
+ else
+ writew(ctl | STOP, &twi->master_ctl);
+ }
+ }
+ if (int_stat & RCVSERV) {
+ debugi("processing RCVSERV");
+ writew(RCVSERV, &twi->int_stat);
+ if (msg->len) {
+ *(msg->buf++) = readw(&twi->rcv_data8);
+ --msg->len;
+ } else if (msg->flags & I2C_M_STOP) {
+ ctl = readw(&twi->master_ctl);
+ writew(ctl | STOP, &twi->master_ctl);
+ }
+ }
+ if (int_stat & MERR) {
+ debugi("processing MERR");
+ writew(MERR, &twi->int_stat);
+ return msg->len;
+ }
+ if (int_stat & MCOMP) {
+ debugi("processing MCOMP");
+ writew(MCOMP, &twi->int_stat);
+ if (msg->flags & I2C_M_COMBO && msg->len) {
+ ctl = readw(&twi->master_ctl);
+ ctl = (ctl & ~RSTART) |
+ (min(msg->len, 0xff) << 6) | MEN | MDIR;
+ writew(ctl, &twi->master_ctl);
+ } else
+ break;
+ }
+
+ /* If we were able to do something, reset timeout */
+ if (int_stat)
+ timebase = get_timer(0);
+
+ } while (get_timer(timebase) < I2C_TIMEOUT);
+
+ return msg->len;
+}
+
+/**
+ * i2c_transfer - setup an i2c transfer
+ * @return: 0 if things worked, non-0 if things failed
+ *
+ * Here we just get the i2c stuff all prepped and ready, and then tail off
+ * into wait_for_completion() for all the bits to go.
+ */
+static int i2c_transfer(uchar chip, uint addr, int alen, uchar *buffer,
+ int len, u8 flags)
+{
+ int ret;
+ u16 ctl;
+ uchar addr_buffer[] = {
+ (addr >> 0),
+ (addr >> 8),
+ (addr >> 16),
+ };
+ struct i2c_msg msg = {
+ .flags = flags | (len >= 0xff ? I2C_M_STOP : 0),
+ .buf = buffer,
+ .len = len,
+ .abuf = addr_buffer,
+ .alen = alen,
+ };
+
+ dmemset(buffer, 0xff, len);
+ debugi("chip=0x%x addr=0x%02x alen=%i buf[0]=0x%02x len=%i ",
+ chip, addr, alen, buffer[0], len);
+ debugi("flags=0x%02x[%s] ", flags,
+ (flags & I2C_M_READ ? "rd" : "wr"));
+
+ /* wait for things to settle */
+ while (readw(&twi->master_stat) & BUSBUSY)
+ if (ctrlc())
+ return 1;
+
+ /* Set Transmit device address */
+ writew(chip, &twi->master_addr);
+
+ /* Clear the FIFO before starting things */
+ writew(XMTFLUSH | RCVFLUSH, &twi->fifo_ctl);
+ writew(0, &twi->fifo_ctl);
+
+ /* prime the pump */
+ if (msg.alen) {
+ len = (msg.flags & I2C_M_COMBO) ? msg.alen : msg.alen + len;
+ debugi("first byte=0x%02x", *msg.abuf);
+ writew(*(msg.abuf++), &twi->xmt_data8);
+ --msg.alen;
+ } else if (!(msg.flags & I2C_M_READ) && msg.len) {
+ debugi("first byte=0x%02x", *msg.buf);
+ writew(*(msg.buf++), &twi->xmt_data8);
+ --msg.len;
+ }
+
+ /* clear int stat */
+ writew(-1, &twi->master_stat);
+ writew(-1, &twi->int_stat);
+ writew(0, &twi->int_mask);
+
+ /* Master enable */
+ ctl = readw(&twi->master_ctl);
+ ctl = (ctl & FAST) | (min(len, 0xff) << 6) | MEN |
+ ((msg.flags & I2C_M_READ) ? MDIR : 0);
+ writew(ctl, &twi->master_ctl);
+
+ /* process the rest */
+ ret = wait_for_completion(&msg);
+ debugi("ret=%d", ret);
+
+ if (ret) {
+ ctl = readw(&twi->master_ctl) & ~MEN;
+ writew(ctl, &twi->master_ctl);
+ ctl = readw(&twi->control) & ~TWI_ENA;
+ writew(ctl, &twi->control);
+ ctl = readw(&twi->control) | TWI_ENA;
+ writew(ctl, &twi->control);
+ }
+
+ return ret;
+}
+
+/**
+ * i2c_set_bus_speed - set i2c bus speed
+ * @speed: bus speed (in HZ)
+ */
+int i2c_set_bus_speed(unsigned int speed)
+{
+ u16 clkdiv = I2C_SPEED_TO_DUTY(speed);
+
+ /* Set TWI interface clock */
+ if (clkdiv < I2C_DUTY_MAX || clkdiv > I2C_DUTY_MIN)
+ return -1;
+ clkdiv = (clkdiv << 8) | (clkdiv & 0xff);
+ writew(clkdiv, &twi->clkdiv);
+
+ /* Don't turn it on */
+ writew(speed > 100000 ? FAST : 0, &twi->master_ctl);
+
+ return 0;
+}
+
+/**
+ * i2c_get_bus_speed - get i2c bus speed
+ * @speed: bus speed (in HZ)
+ */
+unsigned int i2c_get_bus_speed(void)
+{
+ u16 clkdiv = readw(&twi->clkdiv) & 0xff;
+ /* 10 MHz / (2 * CLKDIV) -> 5 MHz / CLKDIV */
+ return 5000000 / clkdiv;
+}
+
+/**
+ * i2c_init - initialize the i2c bus
+ * @speed: bus speed (in HZ)
+ * @slaveaddr: address of device in slave mode (0 - not slave)
+ *
+ * Slave mode isn't actually implemented. It'll stay that way until
+ * we get a real request for it.
+ */
+void i2c_init(int speed, int slaveaddr)
+{
+ u16 prescale = ((get_i2c_clk() / 1000 / 1000 + 5) / 10) & 0x7F;
+
+ /* Set TWI internal clock as 10MHz */
+ writew(prescale, &twi->control);
+
+ /* Set TWI interface clock as specified */
+ i2c_set_bus_speed(speed);
+
+ /* Enable it */
+ writew(TWI_ENA | prescale, &twi->control);
+
+ debugi("CONTROL:0x%04x CLKDIV:0x%04x", readw(&twi->control),
+ readw(&twi->clkdiv));
+
+#if CONFIG_SYS_I2C_SLAVE
+# error I2C slave support not tested/supported
+#endif
+}
+
+/**
+ * i2c_probe - test if a chip exists at a given i2c address
+ * @chip: i2c chip addr to search for
+ * @return: 0 if found, non-0 if not found
+ */
+int i2c_probe(uchar chip)
+{
+ u8 byte;
+ return i2c_read(chip, 0, 0, &byte, 1);
+}
+
+/**
+ * i2c_read - read data from an i2c device
+ * @chip: i2c chip addr
+ * @addr: memory (register) address in the chip
+ * @alen: byte size of address
+ * @buffer: buffer to store data read from chip
+ * @len: how many bytes to read
+ * @return: 0 on success, non-0 on failure
+ */
+int i2c_read(uchar chip, uint addr, int alen, uchar *buffer, int len)
+{
+ return i2c_transfer(chip, addr, alen, buffer,
+ len, (alen ? I2C_M_COMBO : I2C_M_READ));
+}
+
+/**
+ * i2c_write - write data to an i2c device
+ * @chip: i2c chip addr
+ * @addr: memory (register) address in the chip
+ * @alen: byte size of address
+ * @buffer: buffer holding data to write to chip
+ * @len: how many bytes to write
+ * @return: 0 on success, non-0 on failure
+ */
+int i2c_write(uchar chip, uint addr, int alen, uchar *buffer, int len)
+{
+ return i2c_transfer(chip, addr, alen, buffer, len, 0);
+}
+
+/**
+ * i2c_set_bus_num - change active I2C bus
+ * @bus: bus index, zero based
+ * @returns: 0 on success, non-0 on failure
+ */
+int i2c_set_bus_num(unsigned int bus)
+{
+ switch (bus) {
+#if CONFIG_SYS_MAX_I2C_BUS > 0
+ case 0:
+ twi = (void *)TWI0_CLKDIV;
+ return 0;
+#endif
+#if CONFIG_SYS_MAX_I2C_BUS > 1
+ case 1:
+ twi = (void *)TWI1_CLKDIV;
+ return 0;
+#endif
+#if CONFIG_SYS_MAX_I2C_BUS > 2
+ case 2:
+ twi = (void *)TWI2_CLKDIV;
+ return 0;
+#endif
+ default: return -1;
+ }
+}
+
+/**
+ * i2c_get_bus_num - returns index of active I2C bus
+ */
+unsigned int i2c_get_bus_num(void)
+{
+ switch ((unsigned long)twi) {
+#if CONFIG_SYS_MAX_I2C_BUS > 0
+ case TWI0_CLKDIV:
+ return 0;
+#endif
+#if CONFIG_SYS_MAX_I2C_BUS > 1
+ case TWI1_CLKDIV:
+ return 1;
+#endif
+#if CONFIG_SYS_MAX_I2C_BUS > 2
+ case TWI2_CLKDIV:
+ return 2;
+#endif
+ default: return -1;
+ }
+}
#include <i2c.h>
#include <asm/blackfin.h>
+#include <asm/clock.h>
#include <asm/mach-common/bits/twi.h>
/* Every register is 32bit aligned, but only 16bits in size */
*/
void i2c_init(int speed, int slaveaddr)
{
- uint8_t prescale = ((get_sclk() / 1024 / 1024 + 5) / 10) & 0x7F;
+ uint8_t prescale = ((get_i2c_clk() / 1000 / 1000 + 5) / 10) & 0x7F;
/* Set TWI internal clock as 10MHz */
twi->control = prescale;
#include <common.h>
#include <asm/io.h>
-#include <asm/arch/hardware.h>
#include "designware_i2c.h"
#ifdef CONFIG_I2C_MULTI_BUS
return 0;
}
-/* check parameters for i2c_read and i2c_write */
-static int check_params(uint addr, int alen, uchar *buffer, int len)
-{
- if (buffer == NULL) {
- printf("Buffer is invalid\n");
- return 1;
- }
-
- if (alen > 1) {
- printf("addr len %d not supported\n", alen);
- return 1;
- }
-
- if (addr + len > 256) {
- printf("address out of range\n");
- return 1;
- }
-
- return 0;
-}
-
-static int i2c_xfer_init(uchar chip, uint addr)
+static int i2c_xfer_init(uchar chip, uint addr, int alen)
{
if (i2c_wait_for_bb())
return 1;
i2c_setaddress(chip);
- writel(addr, &i2c_regs_p->ic_cmd_data);
-
+ while (alen) {
+ alen--;
+ /* high byte address going out first */
+ writel((addr >> (alen * 8)) & 0xff,
+ &i2c_regs_p->ic_cmd_data);
+ }
return 0;
}
addr);
#endif
- if (check_params(addr, alen, buffer, len))
- return 1;
-
- if (i2c_xfer_init(chip, addr))
+ if (i2c_xfer_init(chip, addr, alen))
return 1;
start_time_rx = get_timer(0);
addr);
#endif
- if (check_params(addr, alen, buffer, len))
- return 1;
-
- if (i2c_xfer_init(chip, addr))
+ if (i2c_xfer_init(chip, addr, alen))
return 1;
start_time_tx = get_timer(0);
writel(I2C_QUEUECTRL_QUEUE_RUN, &i2c_regs->hw_i2c_queuectrl_set);
}
-static void mxs_i2c_write(uchar chip, uint addr, int alen,
+static int mxs_i2c_write(uchar chip, uint addr, int alen,
uchar *buf, int blen, int stop)
{
struct mxs_i2c_regs *i2c_regs = (struct mxs_i2c_regs *)MXS_I2C0_BASE;
- uint32_t data;
+ uint32_t data, tmp;
int i, remain, off;
+ int timeout = MXS_I2C_MAX_TIMEOUT;
if ((alen > 4) || (alen == 0)) {
debug("MXS I2C: Invalid address length\n");
- return;
+ return -EINVAL;
}
if (stop)
writel(data >> remain, &i2c_regs->hw_i2c_data);
writel(I2C_QUEUECTRL_QUEUE_RUN, &i2c_regs->hw_i2c_queuectrl_set);
+
+ while (--timeout) {
+ tmp = readl(&i2c_regs->hw_i2c_queuestat);
+ if (tmp & I2C_QUEUESTAT_WR_QUEUE_EMPTY)
+ break;
+ }
+
+ if (!timeout) {
+ debug("MXS I2C: Failed transmitting data!\n");
+ return -EINVAL;
+ }
+
+ return 0;
}
static int mxs_i2c_wait_for_ack(void)
int ret;
int i;
- mxs_i2c_write(chip, addr, alen, NULL, 0, 0);
+ ret = mxs_i2c_write(chip, addr, alen, NULL, 0, 0);
+ if (ret) {
+ debug("MXS I2C: Failed writing address\n");
+ return ret;
+ }
+
ret = mxs_i2c_wait_for_ack();
if (ret) {
debug("MXS I2C: Failed writing address\n");
int i2c_write(uchar chip, uint addr, int alen, uchar *buffer, int len)
{
int ret;
- mxs_i2c_write(chip, addr, alen, buffer, len, 1);
+ ret = mxs_i2c_write(chip, addr, alen, buffer, len, 1);
+ if (ret) {
+ debug("MXS I2C: Failed writing address\n");
+ return ret;
+ }
+
ret = mxs_i2c_wait_for_ack();
if (ret)
debug("MXS I2C: Failed writing address\n");
int i2c_probe(uchar chip)
{
int ret;
- mxs_i2c_write(chip, 0, 1, NULL, 0, 1);
- ret = mxs_i2c_wait_for_ack();
+ ret = mxs_i2c_write(chip, 0, 1, NULL, 0, 1);
+ if (!ret)
+ ret = mxs_i2c_wait_for_ack();
mxs_i2c_reset();
return ret;
}
* - Status functions now read irqstatus_raw as per TRM guidelines
* (except for OMAP243X and OMAP34XX).
* - Driver now supports up to I2C5 (OMAP5).
+ *
+ * Copyright (c) 2014 Hannes Petermaier <oe5hpm@oevsv.at>, B&R
+ * - Added support for set_speed
+ *
*/
#include <common.h>
static struct i2c *omap24_get_base(struct i2c_adapter *adap);
static u16 wait_for_event(struct i2c_adapter *adap);
static void flush_fifo(struct i2c_adapter *adap);
-
-static void omap24_i2c_init(struct i2c_adapter *adap, int speed, int slaveadd)
+static int omap24_i2c_findpsc(u32 *pscl, u32 *psch, uint speed)
{
- struct i2c *i2c_base = omap24_get_base(adap);
- int psc, fsscll, fssclh;
- int hsscll = 0, hssclh = 0;
- u32 scll, sclh;
- int timeout = I2C_TIMEOUT;
+ unsigned int sampleclk, prescaler;
+ int fsscll, fssclh;
- /* Only handle standard, fast and high speeds */
- if ((speed != OMAP_I2C_STANDARD) &&
- (speed != OMAP_I2C_FAST_MODE) &&
- (speed != OMAP_I2C_HIGH_SPEED)) {
- printf("Error : I2C unsupported speed %d\n", speed);
- return;
- }
+ speed <<= 1;
+ prescaler = 0;
+ /*
+ * some divisors may cause a precission loss, but shouldn't
+ * be a big thing, because i2c_clk is then allready very slow.
+ */
+ while (prescaler <= 0xFF) {
+ sampleclk = I2C_IP_CLK / (prescaler+1);
- psc = I2C_IP_CLK / I2C_INTERNAL_SAMPLING_CLK;
- psc -= 1;
- if (psc < I2C_PSC_MIN) {
- printf("Error : I2C unsupported prescalar %d\n", psc);
- return;
+ fsscll = sampleclk / speed;
+ fssclh = fsscll;
+ fsscll -= I2C_FASTSPEED_SCLL_TRIM;
+ fssclh -= I2C_FASTSPEED_SCLH_TRIM;
+
+ if (((fsscll > 0) && (fssclh > 0)) &&
+ ((fsscll <= (255-I2C_FASTSPEED_SCLL_TRIM)) &&
+ (fssclh <= (255-I2C_FASTSPEED_SCLH_TRIM)))) {
+ if (pscl)
+ *pscl = fsscll;
+ if (psch)
+ *psch = fssclh;
+
+ return prescaler;
+ }
+ prescaler++;
}
+ return -1;
+}
+static uint omap24_i2c_setspeed(struct i2c_adapter *adap, uint speed)
+{
+ struct i2c *i2c_base = omap24_get_base(adap);
+ int psc, fsscll = 0, fssclh = 0;
+ int hsscll = 0, hssclh = 0;
+ u32 scll = 0, sclh = 0;
- if (speed == OMAP_I2C_HIGH_SPEED) {
+ if (speed >= OMAP_I2C_HIGH_SPEED) {
/* High speed */
+ psc = I2C_IP_CLK / I2C_INTERNAL_SAMPLING_CLK;
+ psc -= 1;
+ if (psc < I2C_PSC_MIN) {
+ printf("Error : I2C unsupported prescaler %d\n", psc);
+ return -1;
+ }
/* For first phase of HS mode */
- fsscll = fssclh = I2C_INTERNAL_SAMPLING_CLK /
- (2 * OMAP_I2C_FAST_MODE);
+ fsscll = I2C_INTERNAL_SAMPLING_CLK / (2 * speed);
+
+ fssclh = fsscll;
fsscll -= I2C_HIGHSPEED_PHASE_ONE_SCLL_TRIM;
fssclh -= I2C_HIGHSPEED_PHASE_ONE_SCLH_TRIM;
if (((fsscll < 0) || (fssclh < 0)) ||
((fsscll > 255) || (fssclh > 255))) {
puts("Error : I2C initializing first phase clock\n");
- return;
+ return -1;
}
/* For second phase of HS mode */
if (((fsscll < 0) || (fssclh < 0)) ||
((fsscll > 255) || (fssclh > 255))) {
puts("Error : I2C initializing second phase clock\n");
- return;
+ return -1;
}
scll = (unsigned int)hsscll << 8 | (unsigned int)fsscll;
} else {
/* Standard and fast speed */
- fsscll = fssclh = I2C_INTERNAL_SAMPLING_CLK / (2 * speed);
-
- fsscll -= I2C_FASTSPEED_SCLL_TRIM;
- fssclh -= I2C_FASTSPEED_SCLH_TRIM;
- if (((fsscll < 0) || (fssclh < 0)) ||
- ((fsscll > 255) || (fssclh > 255))) {
+ psc = omap24_i2c_findpsc(&scll, &sclh, speed);
+ if (0 > psc) {
puts("Error : I2C initializing clock\n");
- return;
+ return -1;
}
-
- scll = (unsigned int)fsscll;
- sclh = (unsigned int)fssclh;
}
+ adap->speed = speed;
+ adap->waitdelay = (10000000 / speed) * 2; /* wait for 20 clkperiods */
+ writew(0, &i2c_base->con);
+ writew(psc, &i2c_base->psc);
+ writew(scll, &i2c_base->scll);
+ writew(sclh, &i2c_base->sclh);
+ writew(I2C_CON_EN, &i2c_base->con);
+ writew(0xFFFF, &i2c_base->stat); /* clear all pending status */
+
+ return 0;
+}
+static void omap24_i2c_init(struct i2c_adapter *adap, int speed, int slaveadd)
+{
+ struct i2c *i2c_base = omap24_get_base(adap);
+ int timeout = I2C_TIMEOUT;
+
if (readw(&i2c_base->con) & I2C_CON_EN) {
writew(0, &i2c_base->con);
udelay(50000);
udelay(1000);
}
- writew(0, &i2c_base->con);
- writew(psc, &i2c_base->psc);
- writew(scll, &i2c_base->scll);
- writew(sclh, &i2c_base->sclh);
+ if (0 != omap24_i2c_setspeed(adap, speed)) {
+ printf("ERROR: failed to setup I2C bus-speed!\n");
+ return;
+ }
/* own address */
writew(slaveadd, &i2c_base->oa);
- writew(I2C_CON_EN, &i2c_base->con);
+
#if defined(CONFIG_OMAP243X) || defined(CONFIG_OMAP34XX)
/*
* Have to enable interrupts for OMAP2/3, these IPs don't have
struct i2c *i2c_base = omap24_get_base(adap);
u16 stat;
- /* note: if you try and read data when its not there or ready
+ /*
+ * note: if you try and read data when its not there or ready
* you get a bus error
*/
while (1) {
/* Check for ACK (!NAK) */
if (!(status & I2C_STAT_NACK)) {
- res = 0; /* Device found */
- udelay(I2C_WAIT); /* Required by AM335X in SPL */
+ res = 0; /* Device found */
+ udelay(adap->waitdelay);/* Required by AM335X in SPL */
/* Abort transfer (force idle state) */
writew(I2C_CON_MST | I2C_CON_TRX, &i2c_base->con); /* Reset */
udelay(1000);
adap->hwadapnr, status);
goto rd_exit;
}
- if (status == 0 || status & I2C_STAT_NACK) {
+ if (status == 0 || (status & I2C_STAT_NACK)) {
i2c_error = 1;
printf("i2c_read: error waiting for addr ACK (status=0x%x)\n",
status);
adap->hwadapnr, status);
goto rd_exit;
}
- if (status == 0 || status & I2C_STAT_NACK) {
+ if (status == 0 || (status & I2C_STAT_NACK)) {
i2c_error = 1;
goto rd_exit;
}
int i;
u16 status;
int i2c_error = 0;
+ int timeout = I2C_TIMEOUT;
if (alen < 0) {
puts("I2C write: addr len < 0\n");
adap->hwadapnr, status);
goto wr_exit;
}
- if (status == 0 || status & I2C_STAT_NACK) {
+ if (status == 0 || (status & I2C_STAT_NACK)) {
i2c_error = 1;
printf("i2c_write: error waiting for addr ACK (status=0x%x)\n",
status);
/* Address phase is over, now write data */
for (i = 0; i < len; i++) {
status = wait_for_event(adap);
- if (status == 0 || status & I2C_STAT_NACK) {
+ if (status == 0 || (status & I2C_STAT_NACK)) {
i2c_error = 1;
printf("i2c_write: error waiting for data ACK (status=0x%x)\n",
status);
goto wr_exit;
}
}
+ /*
+ * poll ARDY bit for making sure that last byte really has been
+ * transferred on the bus.
+ */
+ do {
+ status = wait_for_event(adap);
+ } while (!(status & I2C_STAT_ARDY) && timeout--);
+ if (timeout <= 0)
+ printf("i2c_write: timed out writig last byte!\n");
wr_exit:
flush_fifo(adap);
I2C_STAT_BB) && timeout--) {
#endif
writew(stat, &i2c_base->stat);
- udelay(I2C_WAIT);
+ udelay(adap->waitdelay);
}
if (timeout <= 0) {
int timeout = I2C_TIMEOUT;
do {
- udelay(I2C_WAIT);
+ udelay(adap->waitdelay);
#if defined(CONFIG_OMAP243X) || defined(CONFIG_OMAP34XX)
status = readw(&i2c_base->stat);
#else
#endif
U_BOOT_I2C_ADAP_COMPLETE(omap24_0, omap24_i2c_init, omap24_i2c_probe,
- omap24_i2c_read, omap24_i2c_write, NULL,
+ omap24_i2c_read, omap24_i2c_write, omap24_i2c_setspeed,
CONFIG_SYS_OMAP24_I2C_SPEED,
CONFIG_SYS_OMAP24_I2C_SLAVE,
0)
U_BOOT_I2C_ADAP_COMPLETE(omap24_1, omap24_i2c_init, omap24_i2c_probe,
- omap24_i2c_read, omap24_i2c_write, NULL,
+ omap24_i2c_read, omap24_i2c_write, omap24_i2c_setspeed,
CONFIG_SYS_OMAP24_I2C_SPEED1,
CONFIG_SYS_OMAP24_I2C_SLAVE1,
1)
#define ZYNQ_I2C_FIFO_DEPTH 16
#define ZYNQ_I2C_TRANSFERT_SIZE_MAX 255 /* Controller transfer limit */
-#if defined(CONFIG_ZYNQ_I2C0)
-# define ZYNQ_I2C_BASE ZYNQ_I2C_BASEADDR0
-#else
-# define ZYNQ_I2C_BASE ZYNQ_I2C_BASEADDR1
-#endif
-
-static struct zynq_i2c_registers *zynq_i2c =
- (struct zynq_i2c_registers *)ZYNQ_I2C_BASE;
+static struct zynq_i2c_registers *i2c_select(struct i2c_adapter *adap)
+{
+ return adap->hwadapnr ?
+ /* Zynq PS I2C1 */
+ (struct zynq_i2c_registers *)ZYNQ_I2C_BASEADDR1 :
+ /* Zynq PS I2C0 */
+ (struct zynq_i2c_registers *)ZYNQ_I2C_BASEADDR0;
+}
/* I2C init called by cmd_i2c when doing 'i2c reset'. */
static void zynq_i2c_init(struct i2c_adapter *adap, int requested_speed,
int slaveadd)
{
+ struct zynq_i2c_registers *zynq_i2c = i2c_select(adap);
+
/* 111MHz / ( (3 * 17) * 22 ) = ~100KHz */
writel((16 << ZYNQ_I2C_CONTROL_DIV_B_SHIFT) |
(2 << ZYNQ_I2C_CONTROL_DIV_A_SHIFT), &zynq_i2c->control);
}
#ifdef DEBUG
-static void zynq_i2c_debug_status(void)
+static void zynq_i2c_debug_status(struct zynq_i2c_registers *zynq_i2c)
{
int int_status;
int status;
#endif
/* Wait for an interrupt */
-static u32 zynq_i2c_wait(u32 mask)
+static u32 zynq_i2c_wait(struct zynq_i2c_registers *zynq_i2c, u32 mask)
{
int timeout, int_status;
break;
}
#ifdef DEBUG
- zynq_i2c_debug_status();
+ zynq_i2c_debug_status(zynq_i2c));
#endif
/* Clear interrupt status flags */
writel(int_status & mask, &zynq_i2c->interrupt_status);
*/
static int zynq_i2c_probe(struct i2c_adapter *adap, u8 dev)
{
+ struct zynq_i2c_registers *zynq_i2c = i2c_select(adap);
+
/* Attempt to read a byte */
setbits_le32(&zynq_i2c->control, ZYNQ_I2C_CONTROL_CLR_FIFO |
ZYNQ_I2C_CONTROL_RW);
writel(dev, &zynq_i2c->address);
writel(1, &zynq_i2c->transfer_size);
- return (zynq_i2c_wait(ZYNQ_I2C_INTERRUPT_COMP |
+ return (zynq_i2c_wait(zynq_i2c, ZYNQ_I2C_INTERRUPT_COMP |
ZYNQ_I2C_INTERRUPT_NACK) &
ZYNQ_I2C_INTERRUPT_COMP) ? 0 : -ETIMEDOUT;
}
u32 status;
u32 i = 0;
u8 *cur_data = data;
+ struct zynq_i2c_registers *zynq_i2c = i2c_select(adap);
/* Check the hardware can handle the requested bytes */
if ((length < 0) || (length > ZYNQ_I2C_TRANSFERT_SIZE_MAX))
* Temporarily disable restart (by clearing hold)
* It doesn't seem to work.
*/
- clrbits_le32(&zynq_i2c->control, ZYNQ_I2C_CONTROL_RW |
- ZYNQ_I2C_CONTROL_HOLD);
+ clrbits_le32(&zynq_i2c->control, ZYNQ_I2C_CONTROL_HOLD);
writel(0xFF, &zynq_i2c->interrupt_status);
- while (alen--)
- writel(addr >> (8*alen), &zynq_i2c->data);
- writel(dev, &zynq_i2c->address);
+ if (alen) {
+ clrbits_le32(&zynq_i2c->control, ZYNQ_I2C_CONTROL_RW);
+ writel(dev, &zynq_i2c->address);
+ while (alen--)
+ writel(addr >> (8 * alen), &zynq_i2c->data);
- /* Wait for the address to be sent */
- if (!zynq_i2c_wait(ZYNQ_I2C_INTERRUPT_COMP)) {
- /* Release the bus */
- clrbits_le32(&zynq_i2c->control, ZYNQ_I2C_CONTROL_HOLD);
- return -ETIMEDOUT;
+ /* Wait for the address to be sent */
+ if (!zynq_i2c_wait(zynq_i2c, ZYNQ_I2C_INTERRUPT_COMP)) {
+ /* Release the bus */
+ clrbits_le32(&zynq_i2c->control, ZYNQ_I2C_CONTROL_HOLD);
+ return -ETIMEDOUT;
+ }
+ debug("Device acked address\n");
}
- debug("Device acked address\n");
setbits_le32(&zynq_i2c->control, ZYNQ_I2C_CONTROL_CLR_FIFO |
ZYNQ_I2C_CONTROL_RW);
/* Wait for data */
do {
- status = zynq_i2c_wait(ZYNQ_I2C_INTERRUPT_COMP |
+ status = zynq_i2c_wait(zynq_i2c, ZYNQ_I2C_INTERRUPT_COMP |
ZYNQ_I2C_INTERRUPT_DATA);
if (!status) {
/* Release the bus */
int alen, u8 *data, int length)
{
u8 *cur_data = data;
+ struct zynq_i2c_registers *zynq_i2c = i2c_select(adap);
/* Write the register address */
setbits_le32(&zynq_i2c->control, ZYNQ_I2C_CONTROL_CLR_FIFO |
ZYNQ_I2C_CONTROL_HOLD);
clrbits_le32(&zynq_i2c->control, ZYNQ_I2C_CONTROL_RW);
writel(0xFF, &zynq_i2c->interrupt_status);
- while (alen--)
- writel(addr >> (8*alen), &zynq_i2c->data);
- /* Start the tranfer */
writel(dev, &zynq_i2c->address);
- if (!zynq_i2c_wait(ZYNQ_I2C_INTERRUPT_COMP)) {
- /* Release the bus */
- clrbits_le32(&zynq_i2c->control, ZYNQ_I2C_CONTROL_HOLD);
- return -ETIMEDOUT;
+ if (alen) {
+ while (alen--)
+ writel(addr >> (8 * alen), &zynq_i2c->data);
+ /* Start the tranfer */
+ if (!zynq_i2c_wait(zynq_i2c, ZYNQ_I2C_INTERRUPT_COMP)) {
+ /* Release the bus */
+ clrbits_le32(&zynq_i2c->control, ZYNQ_I2C_CONTROL_HOLD);
+ return -ETIMEDOUT;
+ }
+ debug("Device acked address\n");
}
- debug("Device acked address\n");
while (length--) {
writel(*(cur_data++), &zynq_i2c->data);
if (readl(&zynq_i2c->transfer_size) == ZYNQ_I2C_FIFO_DEPTH) {
- if (!zynq_i2c_wait(ZYNQ_I2C_INTERRUPT_COMP)) {
+ if (!zynq_i2c_wait(zynq_i2c, ZYNQ_I2C_INTERRUPT_COMP)) {
/* Release the bus */
clrbits_le32(&zynq_i2c->control,
ZYNQ_I2C_CONTROL_HOLD);
/* All done... release the bus */
clrbits_le32(&zynq_i2c->control, ZYNQ_I2C_CONTROL_HOLD);
/* Wait for the address and data to be sent */
- if (!zynq_i2c_wait(ZYNQ_I2C_INTERRUPT_COMP))
+ if (!zynq_i2c_wait(zynq_i2c, ZYNQ_I2C_INTERRUPT_COMP))
return -ETIMEDOUT;
return 0;
}
zynq_i2c_write, zynq_i2c_set_bus_speed,
CONFIG_SYS_I2C_ZYNQ_SPEED, CONFIG_SYS_I2C_ZYNQ_SLAVE,
0)
+U_BOOT_I2C_ADAP_COMPLETE(zynq_1, zynq_i2c_init, zynq_i2c_probe, zynq_i2c_read,
+ zynq_i2c_write, zynq_i2c_set_bus_speed,
+ CONFIG_SYS_I2C_ZYNQ_SPEED, CONFIG_SYS_I2C_ZYNQ_SLAVE,
+ 1)
#include <asm/errno.h>
#include <asm/byteorder.h>
#include <asm/blackfin.h>
+#include <asm/clock.h>
#include <asm/portmux.h>
#include <asm/mach-common/bits/sdh.h>
#include <asm/mach-common/bits/dma.h>
#include <linux/mii.h>
#include <asm/blackfin.h>
+#include <asm/clock.h>
#include <asm/portmux.h>
#include <asm/mach-common/bits/dma.h>
#include <asm/mach-common/bits/emac.h>
phy_write(phydev, MDIO_DEVAD_NONE, 0x1d, 0x05);
phy_write(phydev, MDIO_DEVAD_NONE, 0x1e, 0x3D47);
+ phydev->supported = phydev->drv->features;
return 0;
}
#define SMC_inw(a,r) (*((volatile word *)((a)->iobase+((r)<<1))))
#elif CONFIG_BLACKFIN
#define SMC_inw(a,r) ({ word __v = (*((volatile word *)((a)->iobase+(r)))); SSYNC(); __v;})
+#elif CONFIG_ARM64
+#define SMC_inw(a, r) (*((volatile word*)((a)->iobase+((dword)(r)))))
#else
-#define SMC_inw(a,r) (*((volatile word *)((a)->iobase+(r))))
+#define SMC_inw(a, r) (*((volatile word*)((a)->iobase+(r))))
#endif
#define SMC_inb(a,r) (((r)&1) ? SMC_inw((a),(r)&~1)>>8 : SMC_inw((a),(r)&0xFF))
#ifdef CONFIG_ADNPESC1
#define SMC_outw(a,d,r) (*((volatile word *)((a)->iobase+((r)<<1))) = d)
#elif CONFIG_BLACKFIN
-#define SMC_outw(a,d,r) {(*((volatile word *)((a)->iobase+(r))) = d); SSYNC();}
+#define SMC_outw(a, d, r) \
+ ({ (*((volatile word*)((a)->iobase+((r)))) = d); \
+ SSYNC(); \
+ })
+#elif CONFIG_ARM64
+#define SMC_outw(a, d, r) \
+ (*((volatile word*)((a)->iobase+((dword)(r)))) = d)
#else
-#define SMC_outw(a,d,r) (*((volatile word *)((a)->iobase+(r))) = d)
+#define SMC_outw(a, d, r) \
+ (*((volatile word*)((a)->iobase+(r))) = d)
#endif
#define SMC_outb(a,d,r) ({ word __d = (byte)(d); \
word __w = SMC_inw((a),(r)&~1); \
return CMD_RET_SUCCESS;
}
+ if (argc < 3)
+ return CMD_RET_USAGE;
+
name = argv[1];
cmd = argv[2];
gd->baudrate = CONFIG_BAUDRATE;
arc_console_baud = gd->cpu_clk / (gd->baudrate * 4) - 1;
- writel(arc_console_baud & 0xff, ®s->baudl);
- writel((arc_console_baud & 0xff00) >> 8, ®s->baudh);
+ writeb(arc_console_baud & 0xff, ®s->baudl);
+
+#ifdef CONFIG_ARC
+ /*
+ * UART ISS(Instruction Set simulator) emulation has a subtle bug:
+ * A existing value of Baudh = 0 is used as a indication to startup
+ * it's internal state machine.
+ * Thus if baudh is set to 0, 2 times, it chokes.
+ * This happens with BAUD=115200 and the formaula above
+ * Until that is fixed, when running on ISS, we will set baudh to !0
+ */
+ if (gd->arch.running_on_hw)
+ writeb((arc_console_baud & 0xff00) >> 8, ®s->baudh);
+ else
+ writeb(1, ®s->baudh);
+#else
+ writeb((arc_console_baud & 0xff00) >> 8, ®s->baudh);
+#endif
}
static int arc_serial_init(void)
if (c == '\n')
arc_serial_putc('\r');
- while (!(readl(®s->status) & UART_TXEMPTY))
+ while (!(readb(®s->status) & UART_TXEMPTY))
;
- writel(c, ®s->data);
+ writeb(c, ®s->data);
}
static int arc_serial_tstc(void)
{
- return !(readl(®s->status) & UART_RXEMPTY);
+ return !(readb(®s->status) & UART_RXEMPTY);
}
static int arc_serial_getc(void)
;
/* Check for overflow errors */
- if (readl(®s->status) & UART_OVERFLOW_ERR)
+ if (readb(®s->status) & UART_OVERFLOW_ERR)
return 0;
- return readl(®s->data) & 0xFF;
-}
-
-static void arc_serial_puts(const char *s)
-{
- while (*s)
- arc_serial_putc(*s++);
+ return readb(®s->data) & 0xFF;
}
static struct serial_device arc_serial_drv = {
.stop = NULL,
.setbrg = arc_serial_setbrg,
.putc = arc_serial_putc,
- .puts = arc_serial_puts,
+ .puts = default_serial_puts,
.getc = arc_serial_getc,
.tstc = arc_serial_tstc,
};
#include <spi.h>
#include <asm/blackfin.h>
+#include <asm/clock.h>
#include <asm/gpio.h>
#include <asm/portmux.h>
#include <asm/mach-common/bits/spi.h>
void spi_set_speed(struct spi_slave *slave, uint hz)
{
struct bfin_spi_slave *bss = to_bfin_spi_slave(slave);
- ulong sclk;
+ ulong clk;
u32 baud;
- sclk = get_sclk();
+ clk = get_spi_clk();
/* baud should be rounded up */
- baud = DIV_ROUND_UP(sclk, 2 * hz);
+ baud = DIV_ROUND_UP(clk, 2 * hz);
if (baud < 2)
baud = 2;
else if (baud > (u16)-1)
#include <spi.h>
#include <asm/blackfin.h>
+#include <asm/clock.h>
#include <asm/gpio.h>
#include <asm/portmux.h>
#include <asm/mach-common/bits/spi6xx.h>
void spi_set_speed(struct spi_slave *slave, uint hz)
{
struct bfin_spi_slave *bss = to_bfin_spi_slave(slave);
- ulong sclk;
+ ulong clk;
u32 clock;
- sclk = get_sclk1();
- clock = sclk / hz;
+ clk = get_spi_clk();
+ clock = clk / hz;
if (clock)
clock--;
bss->clock = clock;
{
u32 clk_src = mxc_get_clock(MXC_CSPI_CLK);
s32 reg_ctrl, reg_config;
- u32 ss_pol = 0, sclkpol = 0, sclkpha = 0, pre_div = 0, post_div = 0;
+ u32 ss_pol = 0, sclkpol = 0, sclkpha = 0, sclkctl = 0;
+ u32 pre_div = 0, post_div = 0;
struct cspi_regs *regs = (struct cspi_regs *)mxcs->base;
if (max_hz == 0) {
if (mode & SPI_CS_HIGH)
ss_pol = 1;
- if (mode & SPI_CPOL)
+ if (mode & SPI_CPOL) {
sclkpol = 1;
+ sclkctl = 1;
+ }
if (mode & SPI_CPHA)
sclkpha = 1;
(ss_pol << (cs + MXC_CSPICON_SSPOL));
reg_config = (reg_config & ~(1 << (cs + MXC_CSPICON_POL))) |
(sclkpol << (cs + MXC_CSPICON_POL));
+ reg_config = (reg_config & ~(1 << (cs + MXC_CSPICON_CTL))) |
+ (sclkctl << (cs + MXC_CSPICON_CTL));
reg_config = (reg_config & ~(1 << (cs + MXC_CSPICON_PHA))) |
(sclkpha << (cs + MXC_CSPICON_PHA));
#include <asm/arch/omap.h>
#include <malloc.h>
#include <spi.h>
+#include <asm/gpio.h>
+#include <asm/omap_gpio.h>
/* ti qpsi register bit masks */
#define QSPI_TIMEOUT 2000000
#define MM_SWITCH 0x01
#define MEM_CS 0x100
#define MEM_CS_UNSELECT 0xfffff0ff
-#define MMAP_START_ADDR 0x5c000000
+#define MMAP_START_ADDR_DRA 0x5c000000
+#define MMAP_START_ADDR_AM43x 0x30000000
#define CORE_CTRL_IO 0x4a002558
#define QSPI_CMD_READ (0x3 << 0)
struct spi_slave *slave = &qslave->slave;
u32 memval = 0;
- slave->memory_map = (void *)MMAP_START_ADDR;
+#ifdef CONFIG_DRA7XX
+ slave->memory_map = (void *)MMAP_START_ADDR_DRA;
+#else
+ slave->memory_map = (void *)MMAP_START_ADDR_AM43x;
+#endif
memval |= QSPI_CMD_READ | QSPI_SETUP0_NUM_A_BYTES |
QSPI_SETUP0_NUM_D_BYTES_NO_BITS |
{
struct ti_qspi_slave *qslave;
+#ifdef CONFIG_AM43XX
+ gpio_request(CONFIG_QSPI_SEL_GPIO, "qspi_gpio");
+ gpio_direction_output(CONFIG_QSPI_SEL_GPIO, 1);
+#endif
+
qslave = spi_alloc_slave(struct ti_qspi_slave, bus, cs);
if (!qslave) {
printf("SPI_error: Fail to allocate ti_qspi_slave\n");
const uchar *txp = dout;
uchar *rxp = din;
uint status;
- int timeout, val;
+ int timeout;
+
+#ifdef CONFIG_DRA7XX
+ int val;
+#endif
debug("spi_xfer: bus:%i cs:%i bitlen:%i words:%i flags:%lx\n",
slave->bus, slave->cs, bitlen, words, flags);
/* Setup mmap flags */
if (flags & SPI_XFER_MMAP) {
writel(MM_SWITCH, &qslave->base->memswitch);
+#ifdef CONFIG_DRA7XX
val = readl(CORE_CTRL_IO);
val |= MEM_CS;
writel(val, CORE_CTRL_IO);
+#endif
return 0;
} else if (flags & SPI_XFER_MMAP_END) {
writel(~MM_SWITCH, &qslave->base->memswitch);
+#ifdef CONFIG_DRA7XX
val = readl(CORE_CTRL_IO);
val &= MEM_CS_UNSELECT;
writel(val, CORE_CTRL_IO);
+#endif
return 0;
}
qslave->cmd |= QSPI_3_PIN;
qslave->cmd |= 0xfff;
+/* FIXME: This delay is required for successfull
+ * completion of read/write/erase. Once its root
+ * caused, it will be remove from the driver.
+ */
+#ifdef CONFIG_AM43XX
+ udelay(100);
+#endif
while (words--) {
if (txp) {
debug("tx cmd %08x dc %08x data %02x\n",
const unsigned char *txp = dout;
unsigned char *rxp = din;
unsigned rxecount = 17; /* max. 16 elements in FIFO, leftover 1 */
+ unsigned global_timeout;
debug("%s: bus:%i cs:%i bitlen:%i bytes:%i flags:%lx\n", __func__,
slave->bus, slave->cs, bitlen, bytes, flags);
if (flags & SPI_XFER_BEGIN)
spi_cs_activate(slave);
- while (bytes--) {
- unsigned timeout = /* at least 1usec or greater, leftover 1 */
- xilspi->freq > XILSPI_MAX_XFER_BITS * 1000000 ? 2 :
+ /* at least 1usec or greater, leftover 1 */
+ global_timeout = xilspi->freq > XILSPI_MAX_XFER_BITS * 1000000 ? 2 :
(XILSPI_MAX_XFER_BITS * 1000000 / xilspi->freq) + 1;
+ while (bytes--) {
+ unsigned timeout = global_timeout;
/* get Tx element from data out buffer and count up */
unsigned char d = txp ? *txp++ : CONFIG_XILINX_SPI_IDLE_VAL;
debug("%s: tx:%x ", __func__, d);
#endif
}
- if (!strcmp(phy_type, "utmi")) {
+ if (!strncmp(phy_type, "utmi", 4)) {
#if defined(CONFIG_SYS_FSL_USB_INTERNAL_UTMI_PHY)
setbits_be32(&ehci->control, PHY_CLK_SEL_UTMI);
setbits_be32(&ehci->control, UTMI_PHY_EN);
#include <usb.h>
#include <asm/blackfin.h>
+#include <asm/clock.h>
#include <asm/mach-common/bits/usb.h>
#include "musb_core.h"
extra-y = demo
# Source files located in the examples/api directory
-SOBJ_FILES-y += crt0.o
-COBJ_FILES-y += demo.o
-COBJ_FILES-y += glue.o
-COBJ_FILES-y += libgenwrap.o
+OBJ-y += crt0.o
+OBJ-y += demo.o
+OBJ-y += glue.o
+OBJ-y += libgenwrap.o
# Source files which exist outside the examples/api directory
-EXT_COBJ_FILES-y += lib/crc32.o
-EXT_COBJ_FILES-y += lib/ctype.o
-EXT_COBJ_FILES-y += lib/div64.o
-EXT_COBJ_FILES-y += lib/string.o
-EXT_COBJ_FILES-y += lib/time.o
-EXT_COBJ_FILES-y += lib/vsprintf.o
-EXT_SOBJ_FILES-$(CONFIG_PPC) += arch/powerpc/lib/ppcstring.o
+EXT_COBJ-y += lib/crc32.o
+EXT_COBJ-y += lib/ctype.o
+EXT_COBJ-y += lib/div64.o
+EXT_COBJ-y += lib/string.o
+EXT_COBJ-y += lib/time.o
+EXT_COBJ-y += lib/vsprintf.o
+EXT_SOBJ-$(CONFIG_PPC) += arch/powerpc/lib/ppcstring.o
# Create a list of object files to be compiled
-OBJS += $(addprefix $(obj)/,$(SOBJ_FILES-y))
-OBJS += $(addprefix $(obj)/,$(COBJ_FILES-y))
-OBJS += $(addprefix $(obj)/,$(notdir $(EXT_COBJ_FILES-y)))
-OBJS += $(addprefix $(obj)/,$(notdir $(EXT_SOBJ_FILES-y)))
+OBJS := $(OBJ-y) $(notdir $(EXT_COBJ-y) $(EXT_SOBJ-y))
+targets += $(OBJS)
+OBJS := $(addprefix $(obj)/,$(OBJS))
#########################################################################
-$(obj)/demo: $(OBJS)
- $(LD) --gc-sections -Ttext $(LOAD_ADDR) -o $@ $^ $(PLATFORM_LIBS)
+quiet_cmd_link_demo = LD $@
+cmd_link_demo = $(LD) --gc-sections -Ttext $(LOAD_ADDR) -o $@ $(filter-out $(PHONY), $^) $(PLATFORM_LIBS)
-$(obj)/demo.bin: $(obj)/demo
- $(OBJCOPY) -O binary $< $@ 2>/dev/null
+$(obj)/demo: $(OBJS) FORCE
+ $(call if_changed,link_demo)
+
+# demo.bin is never genrated. Is this necessary?
+OBJCOPYFLAGS_demo.bin := -O binary
+$(obj)/demo.bin: $(obj)/demo FORCE
+ $(call if_changed,objcopy)
# Rule to build generic library C files
-$(addprefix $(obj)/,$(notdir $(EXT_COBJ_FILES-y))): $(obj)/%.o: $(SRCTREE)/lib/%.c FORCE
+$(addprefix $(obj)/,$(notdir $(EXT_COBJ-y))): $(obj)/%.o: lib/%.c FORCE
$(call cmd,force_checksrc)
$(call if_changed_rule,cc_o_c)
# Rule to build architecture-specific library assembly files
-$(addprefix $(obj)/,$(notdir $(EXT_SOBJ_FILES-y))): $(obj)/%.o: $(SRCTREE)/arch/$(ARCH)/lib/%.S
+$(addprefix $(obj)/,$(notdir $(EXT_SOBJ-y))): $(obj)/%.o: arch/powerpc/lib/%.S FORCE
$(call if_changed_dep,as_o_S)
extra-y += $(addsuffix .srec,$(extra-y)) $(addsuffix .bin,$(extra-y))
clean-files := $(extra-) $(addsuffix .srec,$(extra-)) $(addsuffix .bin,$(extra-))
-
COBJS := $(ELF:=.o)
LIB = $(obj)/libstubs.o
-LIBAOBJS-$(CONFIG_PPC) += ppc_longjmp.o ppc_setjmp.o
-LIBAOBJS-$(CONFIG_8xx) += test_burst_lib.o
-LIBAOBJS := $(LIBAOBJS-y)
-
-LIBCOBJS = stubs.o
+LIBOBJS-$(CONFIG_PPC) += ppc_longjmp.o ppc_setjmp.o
+LIBOBJS-$(CONFIG_8xx) += test_burst_lib.o
+LIBOBJS-y += stubs.o
.SECONDARY: $(call objectify,$(COBJS))
-targets += $(patsubst $(obj)/%,%,$(LIB)) $(COBJS) $(LIBAOBJS) $(LIBCOBJS)
-
-LIBOBJS = $(addprefix $(obj)/,$(LIBAOBJS) $(LIBCOBJS))
+targets += $(patsubst $(obj)/%,%,$(LIB)) $(COBJS) $(LIBOBJS-y)
+LIBOBJS := $(addprefix $(obj)/,$(LIBOBJS-y))
ELF := $(addprefix $(obj)/,$(ELF))
gcclibdir := $(shell dirname `$(CC) -print-libgcc-file-name`)
$(LIB): $(LIBOBJS) FORCE
$(call if_changed,link_lib)
-$(ELF):
-$(obj)/%: $(obj)/%.o $(LIB)
- $(LD) $(LDFLAGS) -g -Ttext $(CONFIG_STANDALONE_LOAD_ADDR) \
- -o $@ -e $(SYM_PREFIX)$(notdir $(<:.o=)) $< $(LIB) \
- -L$(gcclibdir) -lgcc
+quiet_cmd_link_elf = LD $@
+ cmd_link_elf = $(LD) $(LDFLAGS) -g -Ttext $(CONFIG_STANDALONE_LOAD_ADDR) \
+ -o $@ -e $(SYM_PREFIX)$(@F) $< $(LIB) -L$(gcclibdir) -lgcc
+
+$(ELF): $(obj)/%: $(obj)/%.o $(LIB) FORCE
+ $(call if_changed,link_elf)
-$(obj)/%.srec: $(obj)/%
- $(OBJCOPY) -O srec $< $@ 2>/dev/null
+$(obj)/%.srec: OBJCOPYFLAGS := -O srec
+$(obj)/%.srec: $(obj)/% FORCE
+ $(call if_changed,objcopy)
-$(obj)/%.bin: $(obj)/%
- $(OBJCOPY) -O binary $< $@ 2>/dev/null
+$(obj)/%.bin: OBJCOPYFLAGS := -O binary
+$(obj)/%.bin: $(obj)/% FORCE
+ $(call if_changed,objcopy)
obj-$(CONFIG_CMD_CRAMFS) += cramfs/
obj-$(CONFIG_FS_EXT4) += ext4/
obj-y += fat/
-obj-$(CONFIG_CMD_FDOS) += fdos/
obj-$(CONFIG_CMD_JFFS2) += jffs2/
obj-$(CONFIG_CMD_REISER) += reiserfs/
obj-$(CONFIG_SANDBOX) += sandbox/
+++ /dev/null
-#
-# (C) Copyright 2006
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# (C) Copyright 2002
-# Stäubli Faverges - <www.staubli.com>
-# Pierre AUBERT p.aubert@staubli.com
-#
-#
-# SPDX-License-Identifier: GPL-2.0+
-#
-
-obj-y := fat.o vfat.o dev.o fdos.o fs.o subdir.o
+++ /dev/null
-/*
- * (C) Copyright 2002
- * Stäubli Faverges - <www.staubli.com>
- * Pierre AUBERT p.aubert@staubli.com
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
-
-#include <common.h>
-#include <config.h>
-
-#include "dos.h"
-#include "fdos.h"
-
-#define NB_HEADS 2
-#define NB_TRACKS 80
-#define NB_SECTORS 18
-
-
-static int lastwhere;
-
-/*-----------------------------------------------------------------------------
- * dev_open --
- *-----------------------------------------------------------------------------
- */
-int dev_open (void)
-{
- lastwhere = 0;
- return (0);
-}
-
-/*-----------------------------------------------------------------------------
- * dev_read -- len and where are sectors number
- *-----------------------------------------------------------------------------
- */
-int dev_read (void *buffer, int where, int len)
-{
- PRINTF ("dev_read (len = %d, where = %d)\n", len, where);
-
- /* Si on ne desire pas lire a la position courante, il faut un seek */
- if (where != lastwhere) {
- if (!fdc_fdos_seek (where)) {
- PRINTF ("seek error in dev_read");
- lastwhere = -1;
- return (-1);
- }
- }
-
- if (!fdc_fdos_read (buffer, len)) {
- PRINTF ("read error\n");
- lastwhere = -1;
- return (-1);
- }
- lastwhere = where + len;
- return (0);
-}
-/*-----------------------------------------------------------------------------
- * check_dev -- verify the diskette format
- *-----------------------------------------------------------------------------
- */
-int check_dev (BootSector_t *boot, Fs_t *fs)
-{
- unsigned int heads, sectors, tracks;
- int BootP, Infp0, InfpX, InfTm;
- int sect_per_track;
-
- /* Display Boot header */
- PRINTF ("Jump to boot code 0x%02x 0x%02x 0x%02x\n",
- boot -> jump [0], boot -> jump [1], boot -> jump[2]);
- PRINTF ("OEM name & version '%*.*s'\n",
- BANNER_LG, BANNER_LG, boot -> banner );
- PRINTF ("Bytes per sector hopefully 512 %d\n",
- __le16_to_cpu (boot -> secsiz));
- PRINTF ("Cluster size in sectors %d\n",
- boot -> clsiz);
- PRINTF ("Number of reserved (boot) sectors %d\n",
- __le16_to_cpu (boot -> nrsvsect));
- PRINTF ("Number of FAT tables hopefully 2 %d\n",
- boot -> nfat);
- PRINTF ("Number of directory slots %d\n",
- __le16_to_cpu (boot -> dirents));
- PRINTF ("Total sectors on disk %d\n",
- __le16_to_cpu (boot -> psect));
- PRINTF ("Media descriptor=first byte of FAT %d\n",
- boot -> descr);
- PRINTF ("Sectors in FAT %d\n",
- __le16_to_cpu (boot -> fatlen));
- PRINTF ("Sectors/track %d\n",
- __le16_to_cpu (boot -> nsect));
- PRINTF ("Heads %d\n",
- __le16_to_cpu (boot -> nheads));
- PRINTF ("number of hidden sectors %d\n",
- __le32_to_cpu (boot -> nhs));
- PRINTF ("big total sectors %d\n",
- __le32_to_cpu (boot -> bigsect));
- PRINTF ("physical drive ? %d\n",
- boot -> physdrive);
- PRINTF ("reserved %d\n",
- boot -> reserved);
- PRINTF ("dos > 4.0 diskette %d\n",
- boot -> dos4);
- PRINTF ("serial number %d\n",
- __le32_to_cpu (boot -> serial));
- PRINTF ("disk label %*.*s\n",
- LABEL_LG, LABEL_LG, boot -> label);
- PRINTF ("FAT type %8.8s\n",
- boot -> fat_type);
- PRINTF ("reserved by 2M %d\n",
- boot -> res_2m);
- PRINTF ("2M checksum (not used) %d\n",
- boot -> CheckSum);
- PRINTF ("2MF format version %d\n",
- boot -> fmt_2mf);
- PRINTF ("1 if write track after format %d\n",
- boot -> wt);
- PRINTF ("data transfer rate on track 0 %d\n",
- boot -> rate_0);
- PRINTF ("data transfer rate on track<>0 %d\n",
- boot -> rate_any);
- PRINTF ("offset to boot program %d\n",
- __le16_to_cpu (boot -> BootP));
- PRINTF ("T1: information for track 0 %d\n",
- __le16_to_cpu (boot -> Infp0));
- PRINTF ("T2: information for track<>0 %d\n",
- __le16_to_cpu (boot -> InfpX));
- PRINTF ("T3: track sectors size table %d\n",
- __le16_to_cpu (boot -> InfTm));
- PRINTF ("Format date 0x%04x\n",
- __le16_to_cpu (boot -> DateF));
- PRINTF ("Format time 0x%04x\n",
- __le16_to_cpu (boot -> TimeF));
-
-
- /* information is extracted from boot sector */
- heads = __le16_to_cpu (boot -> nheads);
- sectors = __le16_to_cpu (boot -> nsect);
- fs -> tot_sectors = __le32_to_cpu (boot -> bigsect);
- if (__le16_to_cpu (boot -> psect) != 0) {
- fs -> tot_sectors = __le16_to_cpu (boot -> psect);
- }
-
- sect_per_track = heads * sectors;
- tracks = (fs -> tot_sectors + sect_per_track - 1) / sect_per_track;
-
- BootP = __le16_to_cpu (boot -> BootP);
- Infp0 = __le16_to_cpu (boot -> Infp0);
- InfpX = __le16_to_cpu (boot -> InfpX);
- InfTm = __le16_to_cpu (boot -> InfTm);
-
- if (boot -> dos4 == EXTENDED_BOOT &&
- strncmp( boot->banner,"2M", 2 ) == 0 &&
- BootP < SZ_STD_SECTOR &&
- Infp0 < SZ_STD_SECTOR &&
- InfpX < SZ_STD_SECTOR &&
- InfTm < SZ_STD_SECTOR &&
- BootP >= InfTm + 2 &&
- InfTm >= InfpX &&
- InfpX >= Infp0 &&
- Infp0 >= 76 ) {
-
- return (-1);
- }
-
- if (heads != NB_HEADS ||
- tracks != NB_TRACKS ||
- sectors != NB_SECTORS ||
- __le16_to_cpu (boot -> secsiz) != SZ_STD_SECTOR ||
- fs -> tot_sectors == 0 ||
- (fs -> tot_sectors % sectors) != 0) {
- return (-1);
- }
-
- return (0);
-}
+++ /dev/null
-/*
- * (C) Copyright 2002
- * Stäubli Faverges - <www.staubli.com>
- * Pierre AUBERT p.aubert@staubli.com
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
-
-#ifndef _DOS_H_
-#define _DOS_H_
-
-/* Definitions for Dos diskettes */
-
-/* General definitions */
-#define SZ_STD_SECTOR 512 /* Standard sector size */
-#define MDIR_SIZE 32 /* Direntry size */
-#define FAT_BITS 12 /* Diskette use 12 bits fat */
-
-#define MAX_PATH 128 /* Max size of the MSDOS PATH */
-#define MAX_DIR_SECS 64 /* Taille max d'un repertoire (en */
- /* secteurs) */
-/* Misc. definitions */
-#define DELMARK '\xe5'
-#define EXTENDED_BOOT (0x29)
-#define MEDIA_STD (0xf0)
-#define JUMP_0_1 (0xe9)
-#define JUMP_0_2 (0xeb)
-
-/* Boot size is 256 bytes, but we need to read almost a sector, then
- assume bootsize is 512 */
-#define BOOTSIZE 512
-
-/* Fat definitions for 12 bits fat */
-#define FAT12_MAX_NB 4086
-#define FAT12_LAST 0x0ff6
-#define FAT12_END 0x0fff
-
-/* file attributes */
-#define ATTR_READONLY 0x01
-#define ATTR_HIDDEN 0x02
-#define ATTR_SYSTEM 0x04
-#define ATTR_VOLUME 0x08
-#define ATTR_DIRECTORY 0x10
-#define ATTR_ARCHIVE 0x20
-#define ATTR_VSE 0x0f
-
-/* Name format */
-#define EXTCASE 0x10
-#define BASECASE 0x8
-
-/* Definition of the boot sector */
-#define BANNER_LG 8
-#define LABEL_LG 11
-
-typedef struct bootsector
-{
- unsigned char jump [3]; /* 0 Jump to boot code */
- char banner [BANNER_LG]; /* 3 OEM name & version */
- unsigned short secsiz; /* 11 Bytes per sector hopefully 512 */
- unsigned char clsiz; /* 13 Cluster size in sectors */
- unsigned short nrsvsect; /* 14 Number of reserved (boot) sectors */
- unsigned char nfat; /* 16 Number of FAT tables hopefully 2 */
- unsigned short dirents; /* 17 Number of directory slots */
- unsigned short psect; /* 19 Total sectors on disk */
- unsigned char descr; /* 21 Media descriptor=first byte of FAT */
- unsigned short fatlen; /* 22 Sectors in FAT */
- unsigned short nsect; /* 24 Sectors/track */
- unsigned short nheads; /* 26 Heads */
- unsigned int nhs; /* 28 number of hidden sectors */
- unsigned int bigsect; /* 32 big total sectors */
- unsigned char physdrive; /* 36 physical drive ? */
- unsigned char reserved; /* 37 reserved */
- unsigned char dos4; /* 38 dos > 4.0 diskette */
- unsigned int serial; /* 39 serial number */
- char label [LABEL_LG]; /* 43 disk label */
- char fat_type [8]; /* 54 FAT type */
- unsigned char res_2m; /* 62 reserved by 2M */
- unsigned char CheckSum; /* 63 2M checksum (not used) */
- unsigned char fmt_2mf; /* 64 2MF format version */
- unsigned char wt; /* 65 1 if write track after format */
- unsigned char rate_0; /* 66 data transfer rate on track 0 */
- unsigned char rate_any; /* 67 data transfer rate on track<>0 */
- unsigned short BootP; /* 68 offset to boot program */
- unsigned short Infp0; /* 70 T1: information for track 0 */
- unsigned short InfpX; /* 72 T2: information for track<>0 */
- unsigned short InfTm; /* 74 T3: track sectors size table */
- unsigned short DateF; /* 76 Format date */
- unsigned short TimeF; /* 78 Format time */
- unsigned char junk [BOOTSIZE - 80]; /* 80 remaining data */
-} __attribute__ ((packed)) BootSector_t;
-
-/* Structure d'une entree de repertoire */
-typedef struct directory {
- char name [8]; /* file name */
- char ext [3]; /* file extension */
- unsigned char attr; /* attribute byte */
- unsigned char Case; /* case of short filename */
- unsigned char reserved [9]; /* ?? */
- unsigned char time [2]; /* time stamp */
- unsigned char date [2]; /* date stamp */
- unsigned short start; /* starting cluster number */
- unsigned int size; /* size of the file */
-} __attribute__ ((packed)) Directory_t;
-
-
-#define MAX_VFAT_SUBENTRIES 20
-#define VSE_NAMELEN 13
-
-#define VSE1SIZE 5
-#define VSE2SIZE 6
-#define VSE3SIZE 2
-
-#define VBUFSIZE ((MAX_VFAT_SUBENTRIES * VSE_NAMELEN) + 1)
-
-#define MAX_VNAMELEN (255)
-
-#define VSE_PRESENT 0x01
-#define VSE_LAST 0x40
-#define VSE_MASK 0x1f
-
-/* Flag used by vfat_lookup */
-#define DO_OPEN 1
-#define ACCEPT_PLAIN 0x20
-#define ACCEPT_DIR 0x10
-#define ACCEPT_LABEL 0x08
-#define SINGLE 2
-#define MATCH_ANY 0x40
-
-struct vfat_subentry {
- unsigned char id; /* VSE_LAST pour la fin, VSE_MASK */
- /* pour un VSE */
- char text1 [VSE1SIZE * 2]; /* Caracteres encodes sur 16 bits */
- unsigned char attribute; /* 0x0f pour les VFAT */
- unsigned char hash1; /* toujours 0 */
- unsigned char sum; /* Checksum du nom court */
- char text2 [VSE2SIZE * 2]; /* Caracteres encodes sur 16 bits */
- unsigned char sector_l; /* 0 pour les VFAT */
- unsigned char sector_u; /* 0 pour les VFAT */
- char text3 [VSE3SIZE * 2]; /* Caracteres encodes sur 16 bits */
-} __attribute__ ((packed)) ;
-
-struct vfat_state {
- char name [VBUFSIZE];
- int status; /* is now a bit map of 32 bits */
- int subentries;
- unsigned char sum; /* no need to remember the sum for each */
- /* entry, it is the same anyways */
-} __attribute__ ((packed)) ;
-
-/* Conversion macros */
-#define DOS_YEAR(dir) (((dir)->date[1] >> 1) + 1980)
-#define DOS_MONTH(dir) (((((dir)->date[1]&0x1) << 3) + ((dir)->date[0] >> 5)))
-#define DOS_DAY(dir) ((dir)->date[0] & 0x1f)
-#define DOS_HOUR(dir) ((dir)->time[1] >> 3)
-#define DOS_MINUTE(dir) (((((dir)->time[1]&0x7) << 3) + ((dir)->time[0] >> 5)))
-#define DOS_SEC(dir) (((dir)->time[0] & 0x1f) * 2)
-
-
-#endif
+++ /dev/null
-/*
- * (C) Copyright 2002
- * Stäubli Faverges - <www.staubli.com>
- * Pierre AUBERT p.aubert@staubli.com
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
-
-#include <common.h>
-#include <config.h>
-#include <malloc.h>
-
-#include "dos.h"
-#include "fdos.h"
-
-
-/*-----------------------------------------------------------------------------
- * fat_decode --
- *-----------------------------------------------------------------------------
- */
-unsigned int fat_decode (Fs_t *fs, unsigned int num)
-{
- unsigned int start = num * 3 / 2;
- unsigned char *address = fs -> fat_buf + start;
-
- if (num < 2 || start + 1 > (fs -> fat_len * SZ_STD_SECTOR))
- return 1;
-
- if (num & 1)
- return ((address [1] & 0xff) << 4) | ((address [0] & 0xf0 ) >> 4);
- else
- return ((address [1] & 0xf) << 8) | (address [0] & 0xff );
-}
-/*-----------------------------------------------------------------------------
- * check_fat --
- *-----------------------------------------------------------------------------
- */
-static int check_fat (Fs_t *fs)
-{
- int i, f;
-
- /* Cluster verification */
- for (i = 3 ; i < fs -> num_clus; i++){
- f = fat_decode (fs, i);
- if (f < FAT12_LAST && f > fs -> num_clus){
- /* Wrong cluster number detected */
- return (-1);
- }
- }
- return (0);
-}
-/*-----------------------------------------------------------------------------
- * read_one_fat --
- *-----------------------------------------------------------------------------
- */
-static int read_one_fat (BootSector_t *boot, Fs_t *fs, int nfat)
-{
- if (dev_read (fs -> fat_buf,
- (fs -> fat_start + nfat * fs -> fat_len),
- fs -> fat_len) < 0) {
- return (-1);
- }
-
- if (fs -> fat_buf [0] || fs -> fat_buf [1] || fs -> fat_buf [2]) {
- if ((fs -> fat_buf [0] != boot -> descr &&
- (fs -> fat_buf [0] != 0xf9 || boot -> descr != MEDIA_STD)) ||
- fs -> fat_buf [0] < MEDIA_STD){
- /* Unknown Media */
- return (-1);
- }
- if (fs -> fat_buf [1] != 0xff || fs -> fat_buf [2] != 0xff){
- /* FAT doesn't start with good values */
- return (-1);
- }
- }
-
- if (fs -> num_clus >= FAT12_MAX_NB) {
- /* Too much clusters */
- return (-1);
- }
-
- return check_fat (fs);
-}
-/*-----------------------------------------------------------------------------
- * read_fat --
- *-----------------------------------------------------------------------------
- */
-int read_fat (BootSector_t *boot, Fs_t *fs)
-{
- unsigned int buflen;
- int i;
-
- /* Allocate Fat Buffer */
- buflen = fs -> fat_len * SZ_STD_SECTOR;
- if (fs -> fat_buf) {
- free (fs -> fat_buf);
- }
-
- if ((fs -> fat_buf = malloc (buflen)) == NULL) {
- return (-1);
- }
-
- /* Try to read each Fat */
- for (i = 0; i< fs -> nb_fat; i++){
- if (read_one_fat (boot, fs, i) == 0) {
- /* Fat is OK */
- fs -> num_fat = i;
- break;
- }
- }
-
- if (i == fs -> nb_fat){
- return (-1);
- }
-
- if (fs -> fat_len > (((fs -> num_clus + 2) *
- (FAT_BITS / 4) -1 ) / 2 /
- SZ_STD_SECTOR + 1)) {
- return (-1);
- }
- return (0);
-}
+++ /dev/null
-/*
- * (C) Copyright 2002
- * Stäubli Faverges - <www.staubli.com>
- * Pierre AUBERT p.aubert@staubli.com
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
-
-#include <common.h>
-#include <config.h>
-#include <malloc.h>
-
-#include "dos.h"
-#include "fdos.h"
-
-
-const char *month [] = {"Jan", "Feb", "Mar", "Apr", "May", "Jun", "Jul", "Aug", "Sep", "Oct", "Nov", "Dec"};
-
-Fs_t fs;
-File_t file;
-
-/*-----------------------------------------------------------------------------
- * dos_open --
- *-----------------------------------------------------------------------------
- */
-int dos_open(char *name)
-{
- int lg;
- int entry;
- char *fname;
-
- /* We need to suppress the " char around the name */
- if (name [0] == '"') {
- name ++;
- }
- lg = strlen (name);
- if (name [lg - 1] == '"') {
- name [lg - 1] = '\0';
- }
-
- /* Open file system */
- if (fs_init (&fs) < 0) {
- return -1;
- }
-
- /* Init the file descriptor */
- file.name = name;
- file.fs = &fs;
-
- /* find the subdirectory containing the file */
- if (open_subdir (&file) < 0) {
- return (-1);
- }
-
- fname = basename (name);
-
- /* if we try to open root directory */
- if (*fname == '\0') {
- file.file = file.subdir;
- return (0);
- }
-
- /* find the file in the subdir */
- entry = 0;
- if (vfat_lookup (&file.subdir,
- file.fs,
- &file.file.dir,
- &entry,
- 0,
- fname,
- ACCEPT_DIR | ACCEPT_PLAIN | SINGLE | DO_OPEN,
- 0,
- &file.file) != 0) {
- /* File not found */
- printf ("File not found\n");
- return (-1);
- }
-
- return 0;
-}
-
-/*-----------------------------------------------------------------------------
- * dos_read --
- *-----------------------------------------------------------------------------
- */
-int dos_read (ulong addr)
-{
- int read = 0, nb;
-
- /* Try to boot a directory ? */
- if (file.file.dir.attr & (ATTR_DIRECTORY | ATTR_VOLUME)) {
- printf ("Unable to boot %s !!\n", file.name);
- return (-1);
- }
- while (read < file.file.FileSize) {
- PRINTF ("read_file (%ld)\n", (file.file.FileSize - read));
- nb = read_file (&fs,
- &file.file,
- (char *)addr + read,
- read,
- (file.file.FileSize - read));
- PRINTF ("read_file -> %d\n", nb);
- if (nb < 0) {
- printf ("read error\n");
- return (-1);
- }
- read += nb;
- }
- return (read);
-}
-/*-----------------------------------------------------------------------------
- * dos_dir --
- *-----------------------------------------------------------------------------
- */
-int dos_dir (void)
-{
- int entry;
- Directory_t dir;
- char *name;
-
-
- if ((file.file.dir.attr & ATTR_DIRECTORY) == 0) {
- printf ("%s: not a directory !!\n", file.name);
- return (1);
- }
- entry = 0;
- if ((name = malloc (MAX_VNAMELEN + 1)) == NULL) {
- PRINTF ("Allcation error\n");
- return (1);
- }
-
- while (vfat_lookup (&file.file,
- file.fs,
- &dir,
- &entry,
- 0,
- NULL,
- ACCEPT_DIR | ACCEPT_PLAIN | MATCH_ANY,
- name,
- NULL) == 0) {
- /* Display file info */
- printf ("%3.3s %9d %s %02d %04d %02d:%02d:%02d %s\n",
- (dir.attr & ATTR_DIRECTORY) ? "dir" : " ",
- __le32_to_cpu (dir.size),
- month [DOS_MONTH (&dir) - 1],
- DOS_DAY (&dir),
- DOS_YEAR (&dir),
- DOS_HOUR (&dir),
- DOS_MINUTE (&dir),
- DOS_SEC (&dir),
- name);
-
- }
- free (name);
- return (0);
-}
+++ /dev/null
-/*
- * (C) Copyright 2002
- * Stäubli Faverges - <www.staubli.com>
- * Pierre AUBERT p.aubert@staubli.com
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
-
-#ifndef _FDOS_H_
-#define _FDOS_H_
-
-
-#undef FDOS_DEBUG
-
-#ifdef FDOS_DEBUG
-#define PRINTF(fmt,args...) printf (fmt ,##args)
-#else
-#define PRINTF(fmt,args...)
-#endif
-
-/* Data structure describing media */
-typedef struct fs
-{
- unsigned long tot_sectors;
-
- int cluster_size;
- int num_clus;
-
- int fat_start;
- int fat_len;
- int nb_fat;
- int num_fat;
-
- int dir_start;
- int dir_len;
-
- unsigned char *fat_buf;
-
-} Fs_t;
-
-/* Data structure describing one file system slot */
-typedef struct slot {
- int (*map) (struct fs *fs,
- struct slot *file,
- int where,
- int *len);
- unsigned long FileSize;
-
- unsigned short int FirstAbsCluNr;
- unsigned short int PreviousAbsCluNr;
- unsigned short int PreviousRelCluNr;
-
- Directory_t dir;
-} Slot_t;
-
-typedef struct file {
- char *name;
- int Case;
- Fs_t *fs;
- Slot_t subdir;
- Slot_t file;
-} File_t;
-
-
-/* dev.c */
-int dev_read (void *buffer, int where, int len);
-int dev_open (void);
-int check_dev (BootSector_t *boot, Fs_t *fs);
-
-/* fat.c */
-unsigned int fat_decode (Fs_t *fs, unsigned int num);
-int read_fat (BootSector_t *boot, Fs_t *fs);
-
-/* vfat.c */
-int vfat_lookup (Slot_t *dir,
- Fs_t *fs,
- Directory_t *dirent,
- int *entry,
- int *vfat_start,
- char *filename,
- int flags,
- char *outname,
- Slot_t *file);
-
-/* subdir.c */
-char *basename (char *name);
-int open_subdir (File_t *desc);
-int open_file (Slot_t *file, Directory_t *dir);
-int read_file (Fs_t *fs,
- Slot_t *file,
- char *buf,
- int where,
- int len);
-void init_subdir (void);
-
-/* fs.c */
-int fs_init (Fs_t *fs);
-
-
-#endif
+++ /dev/null
-/*
- * (C) Copyright 2002
- * Stäubli Faverges - <www.staubli.com>
- * Pierre AUBERT p.aubert@staubli.com
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
-
-#include <common.h>
-#include <config.h>
-#include <malloc.h>
-
-#include "dos.h"
-#include "fdos.h"
-
-
-/*-----------------------------------------------------------------------------
- * fill_fs -- Read info on file system
- *-----------------------------------------------------------------------------
- */
-static int fill_fs (BootSector_t *boot, Fs_t *fs)
-{
-
- fs -> fat_start = __le16_to_cpu (boot -> nrsvsect);
- fs -> fat_len = __le16_to_cpu (boot -> fatlen);
- fs -> nb_fat = boot -> nfat;
-
- fs -> dir_start = fs -> fat_start + fs -> nb_fat * fs -> fat_len;
- fs -> dir_len = __le16_to_cpu (boot -> dirents) * MDIR_SIZE / SZ_STD_SECTOR;
- fs -> cluster_size = boot -> clsiz;
- fs -> num_clus = (fs -> tot_sectors - fs -> dir_start - fs -> dir_len) / fs -> cluster_size;
-
- return (0);
-}
-
-/*-----------------------------------------------------------------------------
- * fs_init --
- *-----------------------------------------------------------------------------
- */
-int fs_init (Fs_t *fs)
-{
- BootSector_t *boot;
-
- /* Initialize physical device */
- if (dev_open () < 0) {
- PRINTF ("Unable to initialize the fdc\n");
- return (-1);
- }
- init_subdir ();
-
- /* Allocate space for read the boot sector */
- if ((boot = (BootSector_t *)malloc (sizeof (BootSector_t))) == NULL) {
- PRINTF ("Unable to allocate space for boot sector\n");
- return (-1);
- }
-
- /* read boot sector */
- if (dev_read (boot, 0, 1)){
- PRINTF ("Error during boot sector read\n");
- free (boot);
- return (-1);
- }
-
- /* we verify it'a a DOS diskette */
- if (boot -> jump [0] != JUMP_0_1 && boot -> jump [0] != JUMP_0_2) {
- PRINTF ("Not a DOS diskette\n");
- free (boot);
- return (-1);
- }
-
- if (boot -> descr < MEDIA_STD) {
- /* We handle only recent medias (type F0) */
- PRINTF ("unrecognized diskette type\n");
- free (boot);
- return (-1);
- }
-
- if (check_dev (boot, fs) < 0) {
- PRINTF ("Bad diskette\n");
- free (boot);
- return (-1);
- }
-
- if (fill_fs (boot, fs) < 0) {
- free (boot);
-
- return (-1);
- }
-
- /* Read FAT */
- if (read_fat (boot, fs) < 0) {
- free (boot);
- return (-1);
- }
-
- free (boot);
- return (0);
-}
+++ /dev/null
-/*
- * (C) Copyright 2002
- * Stäubli Faverges - <www.staubli.com>
- * Pierre AUBERT p.aubert@staubli.com
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
-
-#include <common.h>
-#include <config.h>
-#include <malloc.h>
-
-#include "dos.h"
-#include "fdos.h"
-
-static int cache_sect;
-static unsigned char cache [SZ_STD_SECTOR];
-
-
-#define min(x,y) ((x)<(y)?(x):(y))
-
-static int descend (Slot_t *parent,
- Fs_t *fs,
- char *path);
-
-/*-----------------------------------------------------------------------------
- * init_subdir --
- *-----------------------------------------------------------------------------
- */
-void init_subdir (void)
-{
- cache_sect = -1;
-}
-/*-----------------------------------------------------------------------------
- * basename --
- *-----------------------------------------------------------------------------
- */
-char *basename (char *name)
-{
- register char *cptr;
-
- if (!name || !*name) {
- return ("");
- }
-
- for (cptr= name; *cptr++; );
- while (--cptr >= name) {
- if (*cptr == '/') {
- return (cptr + 1);
- }
- }
- return(name);
-}
-/*-----------------------------------------------------------------------------
- * root_map --
- *-----------------------------------------------------------------------------
- */
-static int root_map (Fs_t *fs, Slot_t *file, int where, int *len)
-{
- *len = min (*len, fs -> dir_len * SZ_STD_SECTOR - where);
- if (*len < 0 ) {
- *len = 0;
- return (-1);
- }
- return fs -> dir_start * SZ_STD_SECTOR + where;
-}
-/*-----------------------------------------------------------------------------
- * normal_map --
- *-----------------------------------------------------------------------------
- */
-static int normal_map (Fs_t *fs, Slot_t *file, int where, int *len)
-{
- int offset;
- int NrClu;
- unsigned short RelCluNr;
- unsigned short CurCluNr;
- unsigned short NewCluNr;
- unsigned short AbsCluNr;
- int clus_size;
-
- clus_size = fs -> cluster_size * SZ_STD_SECTOR;
- offset = where % clus_size;
-
- *len = min (*len, file -> FileSize - where);
-
- if (*len < 0 ) {
- *len = 0;
- return (0);
- }
-
- if (file -> FirstAbsCluNr < 2){
- *len = 0;
- return (0);
- }
-
- RelCluNr = where / clus_size;
-
- if (RelCluNr >= file -> PreviousRelCluNr){
- CurCluNr = file -> PreviousRelCluNr;
- AbsCluNr = file -> PreviousAbsCluNr;
- } else {
- CurCluNr = 0;
- AbsCluNr = file -> FirstAbsCluNr;
- }
-
-
- NrClu = (offset + *len - 1) / clus_size;
- while (CurCluNr <= RelCluNr + NrClu) {
- if (CurCluNr == RelCluNr){
- /* we have reached the beginning of our zone. Save
- * coordinates */
- file -> PreviousRelCluNr = RelCluNr;
- file -> PreviousAbsCluNr = AbsCluNr;
- }
- NewCluNr = fat_decode (fs, AbsCluNr);
- if (NewCluNr == 1 || NewCluNr == 0) {
- PRINTF("Fat problem while decoding %d %x\n",
- AbsCluNr, NewCluNr);
- return (-1);
- }
- if (CurCluNr == RelCluNr + NrClu) {
- break;
- }
-
- if (CurCluNr < RelCluNr && NewCluNr == FAT12_END) {
- *len = 0;
- return 0;
- }
-
- if (CurCluNr >= RelCluNr && NewCluNr != AbsCluNr + 1)
- break;
- CurCluNr++;
- AbsCluNr = NewCluNr;
- }
-
- *len = min (*len, (1 + CurCluNr - RelCluNr) * clus_size - offset);
-
- return (((file -> PreviousAbsCluNr - 2) * fs -> cluster_size +
- fs -> dir_start + fs -> dir_len) *
- SZ_STD_SECTOR + offset);
-}
-/*-----------------------------------------------------------------------------
- * open_subdir -- open the subdir containing the file
- *-----------------------------------------------------------------------------
- */
-int open_subdir (File_t *desc)
-{
- char *pathname;
- char *tmp, *s, *path;
- char terminator;
-
- if ((pathname = (char *)malloc (MAX_PATH)) == NULL) {
- return (-1);
- }
-
- strcpy (pathname, desc -> name);
-
- /* Suppress file name */
- tmp = basename (pathname);
- *tmp = '\0';
-
- /* root directory init */
- desc -> subdir.FirstAbsCluNr = 0;
- desc -> subdir.FileSize = -1;
- desc -> subdir.map = root_map;
- desc -> subdir.dir.attr = ATTR_DIRECTORY;
-
- tmp = pathname;
- for (s = tmp; ; ++s) {
- if (*s == '/' || *s == '\0') {
- path = tmp;
- terminator = *s;
- *s = '\0';
- if (s != tmp && strcmp (path,".")) {
- if (descend (&desc -> subdir, desc -> fs, path) < 0) {
- free (pathname);
- return (-1);
- }
- }
- if (terminator == 0) {
- break;
- }
- tmp = s + 1;
- }
- }
- free (pathname);
- return (0);
-}
-/*-----------------------------------------------------------------------------
- * descend --
- *-----------------------------------------------------------------------------
- */
-static int descend (Slot_t *parent,
- Fs_t *fs,
- char *path)
-{
- int entry;
- Slot_t SubDir;
-
- if(path[0] == '\0' || strcmp (path, ".") == 0) {
- return (0);
- }
-
-
- entry = 0;
- if (vfat_lookup (parent,
- fs,
- &(SubDir.dir),
- &entry,
- 0,
- path,
- ACCEPT_DIR | SINGLE | DO_OPEN,
- 0,
- &SubDir) == 0) {
- *parent = SubDir;
- return (0);
- }
-
- if (strcmp(path, "..") == 0) {
- parent -> FileSize = -1;
- parent -> FirstAbsCluNr = 0;
- parent -> map = root_map;
- return (0);
- }
- return (-1);
-}
-/*-----------------------------------------------------------------------------
- * open_file --
- *-----------------------------------------------------------------------------
- */
-int open_file (Slot_t *file, Directory_t *dir)
-{
- int first;
- unsigned long size;
-
- first = __le16_to_cpu (dir -> start);
-
- if(first == 0 &&
- (dir -> attr & ATTR_DIRECTORY) != 0) {
- file -> FirstAbsCluNr = 0;
- file -> FileSize = -1;
- file -> map = root_map;
- return (0);
- }
-
- if ((dir -> attr & ATTR_DIRECTORY) != 0) {
- size = (1UL << 31) - 1;
- }
- else {
- size = __le32_to_cpu (dir -> size);
- }
-
- file -> map = normal_map;
- file -> FirstAbsCluNr = first;
- file -> PreviousRelCluNr = 0xffff;
- file -> FileSize = size;
- return (0);
-}
-/*-----------------------------------------------------------------------------
- * read_file --
- *-----------------------------------------------------------------------------
- */
-int read_file (Fs_t *fs,
- Slot_t *file,
- char *buf,
- int where,
- int len)
-{
- int pos;
- int read, nb, sect, offset;
-
- pos = file -> map (fs, file, where, &len);
- if (pos < 0) {
- return -1;
- }
- if (len == 0) {
- return (0);
- }
-
- /* Compute sector number */
- sect = pos / SZ_STD_SECTOR;
- offset = pos % SZ_STD_SECTOR;
- read = 0;
-
- if (offset) {
- /* Read doesn't start at the sector beginning. We need to use our */
- /* cache */
- if (sect != cache_sect) {
- if (dev_read (cache, sect, 1) < 0) {
- return (-1);
- }
- cache_sect = sect;
- }
- nb = min (len, SZ_STD_SECTOR - offset);
-
- memcpy (buf, cache + offset, nb);
- read += nb;
- len -= nb;
- sect += 1;
- }
-
- if (len > SZ_STD_SECTOR) {
- nb = (len - 1) / SZ_STD_SECTOR;
- if (dev_read (buf + read, sect, nb) < 0) {
- return ((read) ? read : -1);
- }
- /* update sector position */
- sect += nb;
-
- /* Update byte position */
- nb *= SZ_STD_SECTOR;
- read += nb;
- len -= nb;
- }
-
- if (len) {
- if (sect != cache_sect) {
- if (dev_read (cache, sect, 1) < 0) {
- return ((read) ? read : -1);
- cache_sect = -1;
- }
- cache_sect = sect;
- }
-
- memcpy (buf + read, cache, len);
- read += len;
- }
- return (read);
-}
+++ /dev/null
-/*
- * (C) Copyright 2002
- * Stäubli Faverges - <www.staubli.com>
- * Pierre AUBERT p.aubert@staubli.com
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
-
-#include <common.h>
-#include <config.h>
-#include <linux/ctype.h>
-
-#include "dos.h"
-#include "fdos.h"
-
-static int dir_read (Fs_t *fs,
- Slot_t *dir,
- Directory_t *dirent,
- int num,
- struct vfat_state *v);
-
-static int unicode_read (char *in, char *out, int num);
-static int match (const char *s, const char *p);
-static unsigned char sum_shortname (char *name);
-static int check_vfat (struct vfat_state *v, Directory_t *dir);
-static char *conv_name (char *name, char *ext, char Case, char *ans);
-
-
-/*-----------------------------------------------------------------------------
- * clear_vfat --
- *-----------------------------------------------------------------------------
- */
-static void clear_vfat (struct vfat_state *v)
-{
- v -> subentries = 0;
- v -> status = 0;
-}
-
-/*-----------------------------------------------------------------------------
- * vfat_lookup --
- *-----------------------------------------------------------------------------
- */
-int vfat_lookup (Slot_t *dir,
- Fs_t *fs,
- Directory_t *dirent,
- int *entry,
- int *vfat_start,
- char *filename,
- int flags,
- char *outname,
- Slot_t *file)
-{
- int found;
- struct vfat_state vfat;
- char newfile [VSE_NAMELEN];
- int vfat_present = 0;
-
- if (*entry == -1) {
- return -1;
- }
-
- found = 0;
- clear_vfat (&vfat);
- while (1) {
- if (dir_read (fs, dir, dirent, *entry, &vfat) < 0) {
- if (vfat_start) {
- *vfat_start = *entry;
- }
- break;
- }
- (*entry)++;
-
- /* Empty slot */
- if (dirent -> name[0] == '\0'){
- if (vfat_start == 0) {
- break;
- }
- continue;
- }
-
- if (dirent -> attr == ATTR_VSE) {
- /* VSE entry, continue */
- continue;
- }
- if ( (dirent -> name [0] == DELMARK) ||
- ((dirent -> attr & ATTR_DIRECTORY) != 0 &&
- (flags & ACCEPT_DIR) == 0) ||
- ((dirent -> attr & ATTR_VOLUME) != 0 &&
- (flags & ACCEPT_LABEL) == 0) ||
- (((dirent -> attr & (ATTR_DIRECTORY | ATTR_VOLUME)) == 0) &&
- (flags & ACCEPT_PLAIN) == 0)) {
- clear_vfat (&vfat);
- continue;
- }
-
- vfat_present = check_vfat (&vfat, dirent);
- if (vfat_start) {
- *vfat_start = *entry - 1;
- if (vfat_present) {
- *vfat_start -= vfat.subentries;
- }
- }
-
- if (dirent -> attr & ATTR_VOLUME) {
- strncpy (newfile, dirent -> name, 8);
- newfile [8] = '\0';
- strncat (newfile, dirent -> ext, 3);
- newfile [11] = '\0';
- }
- else {
- conv_name (dirent -> name, dirent -> ext, dirent -> Case, newfile);
- }
-
- if (flags & MATCH_ANY) {
- found = 1;
- break;
- }
-
- if ((vfat_present && match (vfat.name, filename)) ||
- (match (newfile, filename))) {
- found = 1;
- break;
- }
- clear_vfat (&vfat);
- }
-
- if (found) {
- if ((flags & DO_OPEN) && file) {
- if (open_file (file, dirent) < 0) {
- return (-1);
- }
- }
- if (outname) {
- if (vfat_present) {
- strcpy (outname, vfat.name);
- }
- else {
- strcpy (outname, newfile);
- }
- }
- return (0); /* File found */
- } else {
- *entry = -1;
- return -1; /* File not found */
- }
-}
-
-/*-----------------------------------------------------------------------------
- * dir_read -- Read one directory entry
- *-----------------------------------------------------------------------------
- */
-static int dir_read (Fs_t *fs,
- Slot_t *dir,
- Directory_t *dirent,
- int num,
- struct vfat_state *v)
-{
-
- /* read the directory entry */
- if (read_file (fs,
- dir,
- (char *)dirent,
- num * MDIR_SIZE,
- MDIR_SIZE) != MDIR_SIZE) {
- return (-1);
- }
-
- if (v && (dirent -> attr == ATTR_VSE)) {
- struct vfat_subentry *vse;
- unsigned char id, last_flag;
- char *c;
-
- vse = (struct vfat_subentry *) dirent;
- id = vse -> id & VSE_MASK;
- last_flag = (vse -> id & VSE_LAST);
- if (id > MAX_VFAT_SUBENTRIES) {
- /* Invalid VSE entry */
- return (-1);
- }
-
-
- /* Decode VSE */
- if(v -> sum != vse -> sum) {
- clear_vfat (v);
- v -> sum = vse -> sum;
- }
-
-
- v -> status |= 1 << (id - 1);
- if (last_flag) {
- v -> subentries = id;
- }
-
- c = &(v -> name [VSE_NAMELEN * (id - 1)]);
- c += unicode_read (vse->text1, c, VSE1SIZE);
- c += unicode_read (vse->text2, c, VSE2SIZE);
- c += unicode_read (vse->text3, c, VSE3SIZE);
-
- if (last_flag) {
- *c = '\0'; /* Null terminate long name */
- }
-
- }
- return (0);
-}
-
-/*-----------------------------------------------------------------------------
- * unicode_read --
- *-----------------------------------------------------------------------------
- */
-static int unicode_read (char *in, char *out, int num)
-{
- int j;
-
- for (j = 0; j < num; ++j) {
- if (in [1])
- *out = '_';
- else
- *out = in [0];
- out ++;
- in += 2;
- }
- return num;
-}
-
-/*-----------------------------------------------------------------------------
- * match --
- *-----------------------------------------------------------------------------
- */
-static int match (const char *s, const char *p)
-{
-
- for (; *p != '\0'; ) {
- if (toupper (*s) != toupper (*p)) {
- return (0);
- }
- p++;
- s++;
- }
-
- if (*s != '\0') {
- return (0);
- }
- else {
- return (1);
- }
-}
-/*-----------------------------------------------------------------------------
- * sum_shortname --
- *-----------------------------------------------------------------------------
- */
-static unsigned char sum_shortname (char *name)
-{
- unsigned char sum;
- int j;
-
- for (j = sum = 0; j < 11; ++j) {
- sum = ((sum & 1) ? 0x80 : 0) + (sum >> 1) +
- (name [j] ? name [j] : ' ');
- }
- return (sum);
-}
-/*-----------------------------------------------------------------------------
- * check_vfat --
- * Return 1 if long name is valid, 0 else
- *-----------------------------------------------------------------------------
- */
-static int check_vfat (struct vfat_state *v, Directory_t *dir)
-{
- char name[12];
-
- if (v -> subentries == 0) {
- return 0;
- }
-
- strncpy (name, dir -> name, 8);
- strncpy (name + 8, dir -> ext, 3);
- name [11] = '\0';
-
- if (v -> sum != sum_shortname (name)) {
- return 0;
- }
-
- if( (v -> status & ((1 << v -> subentries) - 1)) !=
- (1 << v -> subentries) - 1) {
- return 0;
- }
- v->name [VSE_NAMELEN * v -> subentries] = 0;
-
- return 1;
-}
-/*-----------------------------------------------------------------------------
- * conv_name --
- *-----------------------------------------------------------------------------
- */
-static char *conv_name (char *name, char *ext, char Case, char *ans)
-{
- char tname [9], text [4];
- int i;
-
- i = 0;
- while (i < 8 && name [i] != ' ' && name [i] != '\0') {
- tname [i] = name [i];
- i++;
- }
- tname [i] = '\0';
-
- if (Case & BASECASE) {
- for (i = 0; i < 8 && tname [i]; i++) {
- tname [i] = tolower (tname [i]);
- }
- }
-
- i = 0;
- while (i < 3 && ext [i] != ' ' && ext [i] != '\0') {
- text [i] = ext [i];
- i++;
- }
- text [i] = '\0';
-
- if (Case & EXTCASE){
- for (i = 0; i < 3 && text [i]; i++) {
- text [i] = tolower (text [i]);
- }
- }
-
- if (*text) {
- strcpy (ans, tname);
- strcat (ans, ".");
- strcat (ans, text);
- }
- else {
- strcpy(ans, tname);
- }
- return (ans);
-}
int ubifs_decompress(const void *buf, int len, void *out, int *out_len,
int compr_type);
+/* these are used in cmd_ubifs.c */
+int ubifs_init(void);
+int ubifs_mount(char *vol_name);
+void ubifs_umount(struct ubifs_info *c);
+int ubifs_ls(char *dir_name);
+int ubifs_load(char *filename, u32 addr, u32 size);
+
#include "debug.h"
#include "misc.h"
#include "key.h"
/* common/memsize.c */
long get_ram_size (long *, long);
+phys_size_t get_effective_memsize(void);
/* $(BOARD)/$(BOARD).c */
void reset_phy (void);
#define CONFIG_CMD_EXT2 /* EXT2 Support */
#define CONFIG_CMD_FAT /* FAT support */
#define CONFIG_CMD_FDC /* Floppy Disk Support */
-#define CONFIG_CMD_FDOS /* Floppy DOS support */
#define CONFIG_CMD_FLASH /* flinfo, erase, protect */
#define CONFIG_CMD_FPGA /* FPGA configuration Support */
#define CONFIG_CMD_FUSE /* Device fuse support */
#define CONFIG_SYS_TEXT_BASE_SPL 0xfff00000
#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE_SPL /* start of monitor */
#else
-#define CONFIG_SYS_LDSCRIPT $(TOPDIR)/$(CPUDIR)/u-boot-nand.lds
+#define CONFIG_SYS_LDSCRIPT $(CPUDIR)/u-boot-nand.lds
#define CONFIG_SYS_TEXT_BASE 0xf8f82000
#endif /* CONFIG_NAND_SPL */
#endif
#endif
#ifndef CONFIG_SYS_TEXT_BASE
-#define CONFIG_SYS_TEXT_BASE 0xeff80000
+#define CONFIG_SYS_TEXT_BASE 0xeff40000
#endif
#ifndef CONFIG_RESET_VECTOR_ADDRESS
/* NAND boot: 4K NAND loader config */
#define CONFIG_SYS_NAND_SPL_SIZE 0x1000
-#define CONFIG_SYS_NAND_U_BOOT_SIZE ((512 << 10) - 0x2000)
+#define CONFIG_SYS_NAND_U_BOOT_SIZE ((768 << 10) - 0x2000)
#define CONFIG_SYS_NAND_U_BOOT_DST (CONFIG_SYS_INIT_L2_ADDR)
#define CONFIG_SYS_NAND_U_BOOT_START \
(CONFIG_SYS_INIT_L2_ADDR + CONFIG_SYS_NAND_SPL_SIZE)
#if defined(CONFIG_RAMBOOT_NAND)
#define CONFIG_ENV_IS_IN_NAND 1
#define CONFIG_ENV_SIZE CONFIG_SYS_NAND_BLOCK_SIZE
-#define CONFIG_ENV_OFFSET ((512 * 1024) + CONFIG_SYS_NAND_BLOCK_SIZE)
+#define CONFIG_ENV_OFFSET ((768 * 1024) + CONFIG_SYS_NAND_BLOCK_SIZE)
#define CONFIG_ENV_RANGE (3 * CONFIG_ENV_SIZE)
#elif defined(CONFIG_RAMBOOT_SPIFLASH)
#define CONFIG_ENV_IS_IN_SPI_FLASH
#endif
#else
#define CONFIG_ENV_IS_IN_FLASH 1
- #if CONFIG_SYS_MONITOR_BASE > 0xfff80000
- #define CONFIG_ENV_ADDR 0xfff80000
- #else
#define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE - CONFIG_ENV_SECT_SIZE)
- #endif
#define CONFIG_ENV_SIZE 0x2000
#define CONFIG_ENV_SECT_SIZE 0x20000 /* 128K (one sector) */
#endif
#define CONFIG_SYS_TEXT_BASE_SPL 0xfff00000
#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE_SPL /* start of monitor */
#else
-#define CONFIG_SYS_LDSCRIPT $(TOPDIR)/$(CPUDIR)/u-boot-nand.lds
+#define CONFIG_SYS_LDSCRIPT $(CPUDIR)/u-boot-nand.lds
#define CONFIG_SYS_TEXT_BASE 0xf8f82000
#endif
#endif
#define CONFIG_SYS_TEXT_BASE_SPL 0xfff00000
#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE_SPL /* start of monitor */
#else
-#define CONFIG_SYS_LDSCRIPT $(TOPDIR)/$(CPUDIR)/u-boot-nand.lds
+#define CONFIG_SYS_LDSCRIPT $(CPUDIR)/u-boot-nand.lds
#define CONFIG_SYS_TEXT_BASE 0xf8f82000
#endif /* CONFIG_NAND_SPL */
#endif
#define CONFIG_NAND_FSL_IFC
#ifdef CONFIG_SDCARD
-#define CONFIG_RAMBOOT_SDCARD
-#define CONFIG_SYS_TEXT_BASE 0x11000000
-#define CONFIG_RESET_VECTOR_ADDRESS 0x110bfffc
+#define CONFIG_SPL
+#define CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT
+#define CONFIG_SPL_DRIVERS_MISC_SUPPORT
+#define CONFIG_SPL_ENV_SUPPORT
+#define CONFIG_SPL_SERIAL_SUPPORT
+#define CONFIG_SPL_MMC_SUPPORT
+#define CONFIG_SPL_MMC_MINIMAL
+#define CONFIG_SPL_FLUSH_IMAGE
+#define CONFIG_SPL_TARGET "u-boot-with-spl.bin"
+#define CONFIG_SPL_LIBGENERIC_SUPPORT
+#define CONFIG_SPL_LIBCOMMON_SUPPORT
+#define CONFIG_SPL_I2C_SUPPORT
+#define CONFIG_FSL_LAW /* Use common FSL init code */
+#define CONFIG_SYS_TEXT_BASE 0x11001000
+#define CONFIG_SPL_TEXT_BASE 0xD0001000
+#define CONFIG_SPL_PAD_TO 0x18000
+#define CONFIG_SPL_MAX_SIZE (96 * 1024)
+#define CONFIG_SYS_MMC_U_BOOT_SIZE (512 << 10)
+#define CONFIG_SYS_MMC_U_BOOT_DST (0x11000000)
+#define CONFIG_SYS_MMC_U_BOOT_START (0x11000000)
+#define CONFIG_SYS_MMC_U_BOOT_OFFS (96 << 10)
+#define CONFIG_SYS_MPC85XX_NO_RESETVEC
+#define CONFIG_SYS_LDSCRIPT "arch/powerpc/cpu/mpc85xx/u-boot.lds"
+#define CONFIG_SPL_MMC_BOOT
+#ifdef CONFIG_SPL_BUILD
+#define CONFIG_SPL_COMMON_INIT_DDR
+#endif
#endif
#ifdef CONFIG_SPIFLASH
+#ifdef CONFIG_SECURE_BOOT
#define CONFIG_RAMBOOT_SPIFLASH
#define CONFIG_SYS_TEXT_BASE 0x11000000
-#define CONFIG_RESET_VECTOR_ADDRESS 0x110bfffc
+#define CONFIG_RESET_VECTOR_ADDRESS 0x1107fffc
+#else
+#define CONFIG_SPL
+#define CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT
+#define CONFIG_SPL_DRIVERS_MISC_SUPPORT
+#define CONFIG_SPL_ENV_SUPPORT
+#define CONFIG_SPL_SERIAL_SUPPORT
+#define CONFIG_SPL_SPI_SUPPORT
+#define CONFIG_SPL_SPI_FLASH_SUPPORT
+#define CONFIG_SPL_SPI_FLASH_MINIMAL
+#define CONFIG_SPL_FLUSH_IMAGE
+#define CONFIG_SPL_TARGET "u-boot-with-spl.bin"
+#define CONFIG_SPL_LIBGENERIC_SUPPORT
+#define CONFIG_SPL_LIBCOMMON_SUPPORT
+#define CONFIG_SPL_I2C_SUPPORT
+#define CONFIG_FSL_LAW /* Use common FSL init code */
+#define CONFIG_SYS_TEXT_BASE 0x11001000
+#define CONFIG_SPL_TEXT_BASE 0xD0001000
+#define CONFIG_SPL_PAD_TO 0x18000
+#define CONFIG_SPL_MAX_SIZE (96 * 1024)
+#define CONFIG_SYS_SPI_FLASH_U_BOOT_SIZE (512 << 10)
+#define CONFIG_SYS_SPI_FLASH_U_BOOT_DST (0x11000000)
+#define CONFIG_SYS_SPI_FLASH_U_BOOT_START (0x11000000)
+#define CONFIG_SYS_SPI_FLASH_U_BOOT_OFFS (96 << 10)
+#define CONFIG_SYS_MPC85XX_NO_RESETVEC
+#define CONFIG_SYS_LDSCRIPT "arch/powerpc/cpu/mpc85xx/u-boot.lds"
+#define CONFIG_SPL_SPI_BOOT
+#ifdef CONFIG_SPL_BUILD
+#define CONFIG_SPL_COMMON_INIT_DDR
+#endif
+#endif
#endif
#ifdef CONFIG_NAND
#define CONFIG_SPL
+#ifdef CONFIG_SECURE_BOOT
#define CONFIG_SPL_INIT_MINIMAL
#define CONFIG_SPL_SERIAL_SUPPORT
#define CONFIG_SPL_NAND_SUPPORT
#define CONFIG_SYS_NAND_U_BOOT_START 0x00200000
#define CONFIG_SYS_NAND_U_BOOT_OFFS 0
#define CONFIG_SYS_LDSCRIPT "arch/powerpc/cpu/mpc85xx/u-boot-nand.lds"
+#else
+#define CONFIG_TPL
+#ifdef CONFIG_TPL_BUILD
+#define CONFIG_SPL_NAND_BOOT
+#define CONFIG_SPL_FLUSH_IMAGE
+#define CONFIG_SPL_ENV_SUPPORT
+#define CONFIG_SPL_NAND_INIT
+#define CONFIG_SPL_SERIAL_SUPPORT
+#define CONFIG_SPL_LIBGENERIC_SUPPORT
+#define CONFIG_SPL_LIBCOMMON_SUPPORT
+#define CONFIG_SPL_I2C_SUPPORT
+#define CONFIG_SPL_NAND_SUPPORT
+#define CONFIG_SPL_DRIVERS_MISC_SUPPORT
+#define CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT
+#define CONFIG_SPL_COMMON_INIT_DDR
+#define CONFIG_SPL_MAX_SIZE (128 << 10)
+#define CONFIG_SPL_TEXT_BASE 0xD0001000
+#define CONFIG_SYS_MPC85XX_NO_RESETVEC
+#define CONFIG_SYS_NAND_U_BOOT_SIZE (576 << 10)
+#define CONFIG_SYS_NAND_U_BOOT_DST (0x11000000)
+#define CONFIG_SYS_NAND_U_BOOT_START (0x11000000)
+#define CONFIG_SYS_NAND_U_BOOT_OFFS ((128 + 128) << 10)
+#elif defined(CONFIG_SPL_BUILD)
+#define CONFIG_SPL_INIT_MINIMAL
+#define CONFIG_SPL_SERIAL_SUPPORT
+#define CONFIG_SPL_NAND_SUPPORT
+#define CONFIG_SPL_NAND_MINIMAL
+#define CONFIG_SPL_FLUSH_IMAGE
+#define CONFIG_SPL_TEXT_BASE 0xff800000
+#define CONFIG_SPL_MAX_SIZE 8192
+#define CONFIG_SYS_NAND_U_BOOT_SIZE (128 << 10)
+#define CONFIG_SYS_NAND_U_BOOT_DST 0xD0000000
+#define CONFIG_SYS_NAND_U_BOOT_START 0xD0000000
+#define CONFIG_SYS_NAND_U_BOOT_OFFS (128 << 10)
+#endif
+#define CONFIG_SPL_PAD_TO 0x20000
+#define CONFIG_TPL_PAD_TO 0x20000
+#define CONFIG_SPL_TARGET "u-boot-with-spl.bin"
+#define CONFIG_SYS_TEXT_BASE 0x11001000
+#define CONFIG_SYS_LDSCRIPT "arch/powerpc/cpu/mpc85xx/u-boot-nand.lds"
+#endif
#endif
-
#ifdef CONFIG_NAND_SECBOOT /* NAND Boot */
#define CONFIG_RAMBOOT_NAND
#define CONFIG_SYS_MONITOR_LEN (256 * 1024) /* Reserve 256 kB for Mon*/
#define CONFIG_SYS_MALLOC_LEN (1024 * 1024) /* Reserved for malloc*/
+/*
+ * Config the L2 Cache as L2 SRAM
+ */
+#if defined(CONFIG_SPL_BUILD)
+#if defined(CONFIG_SDCARD) || defined(CONFIG_SPIFLASH)
+#define CONFIG_SYS_INIT_L2_ADDR 0xD0000000
+#define CONFIG_SYS_INIT_L2_ADDR_PHYS CONFIG_SYS_INIT_L2_ADDR
+#define CONFIG_SYS_L2_SIZE (256 << 10)
+#define CONFIG_SYS_INIT_L2_END (CONFIG_SYS_INIT_L2_ADDR + CONFIG_SYS_L2_SIZE)
+#define CONFIG_SPL_RELOC_TEXT_BASE 0xD0001000
+#define CONFIG_SPL_RELOC_STACK (CONFIG_SYS_INIT_L2_ADDR + 112 * 1024)
+#define CONFIG_SPL_RELOC_STACK_SIZE (16 << 10)
+#define CONFIG_SPL_RELOC_MALLOC_ADDR (CONFIG_SYS_INIT_L2_ADDR + 128 * 1024)
+#define CONFIG_SPL_RELOC_MALLOC_SIZE (128 << 10)
+#define CONFIG_SPL_GD_ADDR (CONFIG_SYS_INIT_L2_ADDR + 96 * 1024)
+#elif defined(CONFIG_NAND)
+#ifdef CONFIG_TPL_BUILD
+#define CONFIG_SYS_INIT_L2_ADDR 0xD0000000
+#define CONFIG_SYS_INIT_L2_ADDR_PHYS CONFIG_SYS_INIT_L2_ADDR
+#define CONFIG_SYS_L2_SIZE (256 << 10)
+#define CONFIG_SYS_INIT_L2_END (CONFIG_SYS_INIT_L2_ADDR + CONFIG_SYS_L2_SIZE)
+#define CONFIG_SPL_RELOC_TEXT_BASE 0xD0001000
+#define CONFIG_SPL_RELOC_STACK (CONFIG_SYS_INIT_L2_ADDR + 192 * 1024)
+#define CONFIG_SPL_RELOC_MALLOC_ADDR (CONFIG_SYS_INIT_L2_ADDR + 208 * 1024)
+#define CONFIG_SPL_RELOC_MALLOC_SIZE (48 << 10)
+#define CONFIG_SPL_GD_ADDR (CONFIG_SYS_INIT_L2_ADDR + 176 * 1024)
+#else
+#define CONFIG_SYS_INIT_L2_ADDR 0xD0000000
+#define CONFIG_SYS_INIT_L2_ADDR_PHYS CONFIG_SYS_INIT_L2_ADDR
+#define CONFIG_SYS_L2_SIZE (256 << 10)
+#define CONFIG_SYS_INIT_L2_END (CONFIG_SYS_INIT_L2_ADDR + CONFIG_SYS_L2_SIZE)
+#define CONFIG_SPL_RELOC_TEXT_BASE (CONFIG_SYS_INIT_L2_END - 0x3000)
+#define CONFIG_SPL_RELOC_STACK ((CONFIG_SYS_INIT_L2_END - 1) & ~0xF)
+#endif
+#endif
+#endif
+
/* Serial Port */
#define CONFIG_CONS_INDEX 1
#undef CONFIG_SERIAL_SOFTWARE_FIFO
#define CONFIG_SYS_NS16550_SERIAL
#define CONFIG_SYS_NS16550_REG_SIZE 1
#define CONFIG_SYS_NS16550_CLK get_bus_freq(0)
-#ifdef CONFIG_SPL_BUILD
+#if defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_INIT_MINIMAL)
#define CONFIG_NS16550_MIN_FUNCTIONS
#endif
/*
* Environment
*/
-#if defined(CONFIG_RAMBOOT_SDCARD)
+#if defined(CONFIG_SDCARD)
#define CONFIG_ENV_IS_IN_MMC
#define CONFIG_FSL_FIXED_MMC_LOCATION
#define CONFIG_SYS_MMC_ENV_DEV 0
#define CONFIG_ENV_SIZE 0x2000
-#elif defined(CONFIG_RAMBOOT_SPIFLASH)
+#elif defined(CONFIG_SPIFLASH)
#define CONFIG_ENV_IS_IN_SPI_FLASH
#define CONFIG_ENV_SPI_BUS 0
#define CONFIG_ENV_SPI_CS 0
#define CONFIG_ENV_SIZE 0x2000
#elif defined(CONFIG_NAND)
#define CONFIG_ENV_IS_IN_NAND
+#ifdef CONFIG_TPL_BUILD
+#define CONFIG_ENV_SIZE 0x2000
+#define CONFIG_ENV_ADDR (CONFIG_SYS_INIT_L2_ADDR + (160 << 10))
+#else
#if defined(CONFIG_P1010RDB_PA)
#define CONFIG_ENV_SIZE CONFIG_SYS_NAND_BLOCK_SIZE
#define CONFIG_ENV_RANGE (3 * CONFIG_ENV_SIZE) /* 3*16=48K for env */
#define CONFIG_ENV_SIZE (16 * 1024)
#define CONFIG_ENV_RANGE (32 * CONFIG_ENV_SIZE) /* new block size 512K */
#endif
-#define CONFIG_ENV_OFFSET ((768 * 1024) + CONFIG_SYS_NAND_BLOCK_SIZE)
+#endif
+#define CONFIG_ENV_OFFSET (1024 * 1024)
#elif defined(CONFIG_SYS_RAMBOOT)
#define CONFIG_ENV_IS_NOWHERE /* Store ENV in memory only */
#define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE - 0x1000)
#define CONFIG_FSL_LAW /* Use common FSL init code */
#define CONFIG_SYS_TEXT_BASE 0x11001000
#define CONFIG_SPL_TEXT_BASE 0xf8f81000
-#define CONFIG_SPL_PAD_TO 0x18000
-#define CONFIG_SPL_MAX_SIZE (96 * 1024)
+#define CONFIG_SPL_PAD_TO 0x20000
+#define CONFIG_SPL_MAX_SIZE (128 * 1024)
#define CONFIG_SYS_MMC_U_BOOT_SIZE (768 << 10)
#define CONFIG_SYS_MMC_U_BOOT_DST (0x11000000)
#define CONFIG_SYS_MMC_U_BOOT_START (0x11000000)
-#define CONFIG_SYS_MMC_U_BOOT_OFFS (96 << 10)
+#define CONFIG_SYS_MMC_U_BOOT_OFFS (128 << 10)
#define CONFIG_SYS_MPC85XX_NO_RESETVEC
#define CONFIG_SYS_LDSCRIPT "arch/powerpc/cpu/mpc85xx/u-boot.lds"
#define CONFIG_SPL_MMC_BOOT
#define CONFIG_FSL_LAW /* Use common FSL init code */
#define CONFIG_SYS_TEXT_BASE 0x11001000
#define CONFIG_SPL_TEXT_BASE 0xf8f81000
-#define CONFIG_SPL_PAD_TO 0x18000
-#define CONFIG_SPL_MAX_SIZE (96 * 1024)
+#define CONFIG_SPL_PAD_TO 0x20000
+#define CONFIG_SPL_MAX_SIZE (128 * 1024)
#define CONFIG_SYS_SPI_FLASH_U_BOOT_SIZE (768 << 10)
#define CONFIG_SYS_SPI_FLASH_U_BOOT_DST (0x11000000)
#define CONFIG_SYS_SPI_FLASH_U_BOOT_START (0x11000000)
-#define CONFIG_SYS_SPI_FLASH_U_BOOT_OFFS (96 << 10)
+#define CONFIG_SYS_SPI_FLASH_U_BOOT_OFFS (128 << 10)
#define CONFIG_SYS_MPC85XX_NO_RESETVEC
#define CONFIG_SYS_LDSCRIPT "arch/powerpc/cpu/mpc85xx/u-boot.lds"
#define CONFIG_SPL_SPI_BOOT
#define CONFIG_SYS_L2_SIZE (256 << 10)
#define CONFIG_SYS_INIT_L2_END (CONFIG_SYS_INIT_L2_ADDR + CONFIG_SYS_L2_SIZE)
#define CONFIG_SPL_RELOC_TEXT_BASE 0xf8f81000
-#define CONFIG_SPL_RELOC_STACK (CONFIG_SYS_INIT_L2_ADDR + 128 * 1024)
+#define CONFIG_SPL_RELOC_STACK (CONFIG_SYS_INIT_L2_ADDR + 116 * 1024)
#define CONFIG_SPL_RELOC_STACK_SIZE (32 << 10)
-#define CONFIG_SPL_RELOC_MALLOC_ADDR (CONFIG_SYS_INIT_L2_ADDR + 160 * 1024)
-#define CONFIG_SPL_RELOC_MALLOC_SIZE (96 << 10)
+#define CONFIG_SPL_RELOC_MALLOC_ADDR (CONFIG_SYS_INIT_L2_ADDR + 148 * 1024)
+#define CONFIG_SPL_RELOC_MALLOC_SIZE (108 << 10)
#define CONFIG_SPL_GD_ADDR (CONFIG_SYS_INIT_L2_ADDR + 112 * 1024)
#elif defined(CONFIG_NAND)
#ifdef CONFIG_TPL_BUILD
#ifdef CONFIG_NAND_SPL
#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE_SPL /* start of monitor */
#else
-#define CONFIG_SYS_LDSCRIPT $(TOPDIR)/$(CPUDIR)/u-boot-nand.lds
+#define CONFIG_SYS_LDSCRIPT $(CPUDIR)/u-boot-nand.lds
#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* start of monitor */
#endif /* CONFIG_NAND_SPL */
#endif
#define CONFIG_SYS_TEXT_BASE_SPL 0xfff00000
#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE_SPL /* start of monitor */
#else
-#define CONFIG_SYS_LDSCRIPT $(TOPDIR)/$(CPUDIR)/u-boot-nand.lds
+#define CONFIG_SYS_LDSCRIPT $(CPUDIR)/u-boot-nand.lds
#define CONFIG_SYS_TEXT_BASE 0xf8f82000
#endif /* CONFIG_NAND_SPL */
#endif
*/
/*
- * T2080 QDS board configuration file
+ * T2080/T2081 QDS board configuration file
*/
-#ifndef __T2080QDS_H
-#define __T2080QDS_H
+#ifndef __T208xQDS_H
+#define __T208xQDS_H
-#define CONFIG_T2080QDS
#define CONFIG_ICS307_REFCLK_HZ 25000000 /* ICS307 ref clk freq */
#define CONFIG_MMC
#define CONFIG_SPI_FLASH
#define CONFIG_USB_EHCI
+#if defined(CONFIG_PPC_T2080)
+#define CONFIG_T2080QDS
#define CONFIG_FSL_SATA_V2
#define CONFIG_SYS_SRIO /* Enable Serial RapidIO Support */
#define CONFIG_SRIO1 /* SRIO port 1 */
#define CONFIG_SRIO2 /* SRIO port 2 */
+#elif defined(CONFIG_PPC_T2081)
+#define CONFIG_T2081QDS
+#endif
/* High Level Configuration Options */
#define CONFIG_PHYS_64BIT
#ifdef CONFIG_RAMBOOT_PBL
#define CONFIG_RAMBOOT_TEXT_BASE CONFIG_SYS_TEXT_BASE
#define CONFIG_RESET_VECTOR_ADDRESS 0xfffffffc
-#define CONFIG_SYS_FSL_PBL_PBI $(SRCTREE)/board/freescale/t2080qds/t2080_pbi.cfg
-#define CONFIG_SYS_FSL_PBL_RCW $(SRCTREE)/board/freescale/t2080qds/t2080_rcw.cfg
+#define CONFIG_SYS_FSL_PBL_PBI $(SRCTREE)/board/freescale/t208xqds/t208x_pbi.cfg
+#if defined(CONFIG_PPC_T2080)
+#define CONFIG_SYS_FSL_PBL_RCW $(SRCTREE)/board/freescale/t208xqds/t2080_rcw.cfg
+#elif defined(CONFIG_PPC_T2081)
+#define CONFIG_SYS_FSL_PBL_RCW $(SRCTREE)/board/freescale/t208xqds/t2081_rcw.cfg
+#endif
#endif
#define CONFIG_SRIO_PCIE_BOOT_MASTER
#define CONFIG_FSL_ESPI
#define CONFIG_SPI_FLASH_SST
#define CONFIG_SPI_FLASH_STMICRO
+#if defined(CONFIG_T2080QDS)
#define CONFIG_SPI_FLASH_SPANSION
+#elif defined(CONFIG_T2081QDS)
+#define CONFIG_SPI_FLASH_EON
+#endif
+
#define CONFIG_CMD_SF
#define CONFIG_SF_DEFAULT_SPEED 10000000
#define CONFIG_SF_DEFAULT_MODE 0
#ifdef CONFIG_PCI
#define CONFIG_PCI_INDIRECT_BRIDGE
-#define CONFIG_FSL_PCIE_RESET /* need PCIe reset errata LSZ ADD */
+#define CONFIG_FSL_PCIE_RESET /* need PCIe reset errata */
#define CONFIG_NET_MULTI
#define CONFIG_E1000
#define CONFIG_PCI_PNP /* do pci plug-and-play */
#undef CONFIG_CMD_USB
#endif
-#endif /* __T2080QDS_H */
+#endif /* __T208xQDS_H */
#define CONFIG_OMAP_USB_PHY
#define CONFIG_AM437X_USB2PHY2_HOST
+/* SPI */
+#undef CONFIG_OMAP3_SPI
+#define CONFIG_TI_QSPI
+#define CONFIG_SPI_FLASH
+#define CONFIG_SPI_FLASH_MACRONIX
+#define CONFIG_CMD_SF
+#define CONFIG_CMD_SPI
+#define CONFIG_TI_SPI_MMAP
+#define CONFIG_QSPI_SEL_GPIO 48
+#define CONFIG_SF_DEFAULT_SPEED 48000000
+#define CONFIG_DEFAULT_SPI_MODE SPI_MODE_3
+
+/* SPI SPL */
+#define CONFIG_SPL_SPI_SUPPORT
+#define CONFIG_SPL_SPI_LOAD
+#define CONFIG_SPL_SPI_FLASH_SUPPORT
+#define CONFIG_SPL_SPI_BUS 0
+#define CONFIG_SPL_SPI_CS 0
+#define CONFIG_SYS_SPI_U_BOOT_OFFS 0x20000
+
/* Enhance our eMMC support / experience. */
#define CONFIG_CMD_GPT
#define CONFIG_EFI_PARTITION
#define CONFIG_DISPLAY_CPUINFO
#define CONFIG_DISPLAY_BOARDINFO
-/* Enable fdt support for Exynos5250 */
-#define CONFIG_ARCH_DEVICE_TREE exynos5250
#define CONFIG_OF_CONTROL
#define CONFIG_OF_SEPARATE
* Console configuration
*/
#define CONFIG_SYS_LONGHELP
-#define CONFIG_SYS_PROMPT "axs# "
+#define CONFIG_SYS_PROMPT "AXS# "
#define CONFIG_SYS_CBSIZE 256
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
#define CONFIG_FSL_LAW /* Use common FSL init code */
#define CONFIG_SYS_TEXT_BASE 0x11001000
#define CONFIG_SPL_TEXT_BASE 0xf8f81000
-#define CONFIG_SPL_PAD_TO 0x18000
-#define CONFIG_SPL_MAX_SIZE (96 * 1024)
+#define CONFIG_SPL_PAD_TO 0x20000
+#define CONFIG_SPL_MAX_SIZE (128 * 1024)
#define CONFIG_SYS_MMC_U_BOOT_SIZE (768 << 10)
#define CONFIG_SYS_MMC_U_BOOT_DST (0x11000000)
#define CONFIG_SYS_MMC_U_BOOT_START (0x11000000)
-#define CONFIG_SYS_MMC_U_BOOT_OFFS (96 << 10)
+#define CONFIG_SYS_MMC_U_BOOT_OFFS (128 << 10)
#define CONFIG_SYS_MPC85XX_NO_RESETVEC
#define CONFIG_SYS_LDSCRIPT "arch/powerpc/cpu/mpc85xx/u-boot.lds"
#define CONFIG_SPL_MMC_BOOT
#define CONFIG_FSL_LAW /* Use common FSL init code */
#define CONFIG_SYS_TEXT_BASE 0x11001000
#define CONFIG_SPL_TEXT_BASE 0xf8f81000
-#define CONFIG_SPL_PAD_TO 0x18000
-#define CONFIG_SPL_MAX_SIZE (96 * 1024)
+#define CONFIG_SPL_PAD_TO 0x20000
+#define CONFIG_SPL_MAX_SIZE (128 * 1024)
#define CONFIG_SYS_SPI_FLASH_U_BOOT_SIZE (768 << 10)
#define CONFIG_SYS_SPI_FLASH_U_BOOT_DST (0x11000000)
#define CONFIG_SYS_SPI_FLASH_U_BOOT_START (0x11000000)
-#define CONFIG_SYS_SPI_FLASH_U_BOOT_OFFS (96 << 10)
+#define CONFIG_SYS_SPI_FLASH_U_BOOT_OFFS (128 << 10)
#define CONFIG_SYS_MPC85XX_NO_RESETVEC
#define CONFIG_SYS_LDSCRIPT "arch/powerpc/cpu/mpc85xx/u-boot.lds"
#define CONFIG_SPL_SPI_BOOT
#define CONFIG_SYS_INIT_L2_ADDR_PHYS CONFIG_SYS_INIT_L2_ADDR
#define CONFIG_SYS_INIT_L2_END (CONFIG_SYS_INIT_L2_ADDR + CONFIG_SYS_L2_SIZE)
#define CONFIG_SPL_RELOC_TEXT_BASE 0xf8f81000
-#define CONFIG_SPL_RELOC_STACK (CONFIG_SYS_INIT_L2_ADDR + 128 * 1024)
-#define CONFIG_SPL_RELOC_STACK_SIZE (32 << 10)
-#define CONFIG_SPL_RELOC_MALLOC_ADDR (CONFIG_SYS_INIT_L2_ADDR + 160 * 1024)
-#define CONFIG_SPL_RELOC_MALLOC_SIZE (96 << 10)
#define CONFIG_SPL_GD_ADDR (CONFIG_SYS_INIT_L2_ADDR + 112 * 1024)
+#define CONFIG_SPL_RELOC_STACK (CONFIG_SYS_INIT_L2_ADDR + 116 * 1024)
+#define CONFIG_SPL_RELOC_STACK_SIZE (32 << 10)
+#define CONFIG_SPL_RELOC_MALLOC_ADDR (CONFIG_SYS_INIT_L2_ADDR + 148 * 1024)
+#if defined(CONFIG_P2020RDB)
+#define CONFIG_SPL_RELOC_MALLOC_SIZE (364 << 10)
+#else
+#define CONFIG_SPL_RELOC_MALLOC_SIZE (108 << 10)
+#endif
#elif defined(CONFIG_NAND)
#ifdef CONFIG_TPL_BUILD
#define CONFIG_SYS_INIT_L2_ADDR 0xf8f80000
#undef CONFIG_DEFAULT_DEVICE_TREE
#define CONFIG_DEFAULT_DEVICE_TREE exynos5420-smdk5420
-#define CONFIG_ARCH_DEVICE_TREE exynos5420
-
#define CONFIG_VAR_SIZE_SPL
#define CONFIG_SYS_SDRAM_BASE 0x20000000
/* I2C driver configuration */
#define CONFIG_HARD_I2C
#define CONFIG_DW_I2C
+#if defined(CONFIG_SPEAR600)
+#define CONFIG_SYS_I2C_BASE 0xD0200000
+#elif defined(CONFIG_SPEAR300)
+#define CONFIG_SYS_I2C_BASE 0xD0180000
+#elif defined(CONFIG_SPEAR310)
+#define CONFIG_SYS_I2C_BASE 0xD0180000
+#elif defined(CONFIG_SPEAR320)
+#define CONFIG_SYS_I2C_BASE 0xD0180000
+#endif
#define CONFIG_SYS_I2C_SPEED 400000
#define CONFIG_SYS_I2C_SLAVE 0x02
/* I2C config options */
#define CONFIG_HARD_I2C
#define CONFIG_DW_I2C
+#define CONFIG_SYS_I2C_BASE 0xD0200000
#define CONFIG_SYS_I2C_SPEED 400000
#define CONFIG_SYS_I2C_SLAVE 0x02
#define CONFIG_I2C_CHIPADDRESS 0x50
# define CONFIG_DOS_PARTITION
#endif
+#define CONFIG_SYS_I2C_ZYNQ
/* I2C */
-#if defined(CONFIG_ZYNQ_I2C0) || defined(CONFIG_ZYNQ_I2C1)
+#if defined(CONFIG_SYS_I2C_ZYNQ)
# define CONFIG_CMD_I2C
# define CONFIG_SYS_I2C
-# define CONFIG_SYS_I2C_ZYNQ
# define CONFIG_SYS_I2C_ZYNQ_SPEED 100000
-# define CONFIG_SYS_I2C_ZYNQ_SLAVE 1
+# define CONFIG_SYS_I2C_ZYNQ_SLAVE 0
#endif
/* EEPROM */
#include <common_timing_params.h>
+#ifdef CONFIG_SYS_FSL_DDR_LE
+#define ddr_in32(a) in_le32(a)
+#define ddr_out32(a, v) out_le32(a, v)
+#else
+#define ddr_in32(a) in_be32(a)
+#define ddr_out32(a, v) out_be32(a, v)
+#endif
+
#if defined(CONFIG_DDR_SPD) || defined(CONFIG_SPD_EEPROM)
/*
* Bind the main DDR setup driver's generic names
int do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]);
unsigned int check_fsl_memctl_config_regs(const fsl_ddr_cfg_regs_t *ddr);
+void board_add_ram_info(int use_default);
/* processor specific function */
void fsl_ddr_set_memctl_regs(const fsl_ddr_cfg_regs_t *regs,
#define FSL_DDR_PAGE_INTERLEAVING 0x1
#define FSL_DDR_BANK_INTERLEAVING 0x2
#define FSL_DDR_SUPERBANK_INTERLEAVING 0x3
+#define FSL_DDR_256B_INTERLEAVING 0x8
#define FSL_DDR_3WAY_1KB_INTERLEAVING 0xA
#define FSL_DDR_3WAY_4KB_INTERLEAVING 0xC
#define FSL_DDR_3WAY_8KB_INTERLEAVING 0xD
uint (*set_bus_speed)(struct i2c_adapter *adap,
uint speed);
int speed;
+ int waitdelay;
int slaveaddr;
int init_done;
int hwadapnr;
$(nandobj)System.map
$(nandobj)u-boot-spl-16k.bin: $(nandobj)u-boot-spl
- $(OBJCOPY) ${OBJCFLAGS} --pad-to=$(PAD_TO) -O binary $< $@
+ $(OBJCOPY) $(OBJCOPYFLAGS) --pad-to=$(PAD_TO) -O binary $< $@
$(nandobj)u-boot-spl.bin: $(nandobj)u-boot-spl
- $(OBJCOPY) ${OBJCFLAGS} -O binary $< $@
+ $(OBJCOPY) $(OBJCOPYFLAGS) -O binary $< $@
$(nandobj)u-boot-spl: $(OBJS) $(nandobj)u-boot.lds
cd $(LNDIR) && $(LD) $(LDFLAGS) $(__OBJS) $(PLATFORM_LIBS) \
all: $(nandobj)u-boot-spl.bin $(nandobj)u-boot-spl-16k.bin
$(nandobj)u-boot-spl-16k.bin: $(nandobj)u-boot-spl
- $(OBJCOPY) ${OBJCFLAGS} --pad-to=$(PAD_TO) -O binary $< $@
+ $(OBJCOPY) $(OBJCOPYFLAGS) --pad-to=$(PAD_TO) -O binary $< $@
$(nandobj)u-boot-spl.bin: $(nandobj)u-boot-spl
- $(OBJCOPY) ${OBJCFLAGS} -O binary $< $@
+ $(OBJCOPY) $(OBJCOPYFLAGS) -O binary $< $@
$(nandobj)u-boot-spl: $(OBJS) $(nandobj)u-boot.lds
cd $(LNDIR) && $(LD) $(LDFLAGS) $(__OBJS) $(PLATFORM_LIBS) \
all: $(nandobj)u-boot-spl.bin $(nandobj)u-boot-spl-16k.bin
$(nandobj)u-boot-spl-16k.bin: $(nandobj)u-boot-spl
- $(OBJCOPY) ${OBJCFLAGS} --pad-to=$(PAD_TO) -O binary $< $@
+ $(OBJCOPY) $(OBJCOPYFLAGS) --pad-to=$(PAD_TO) -O binary $< $@
$(nandobj)u-boot-spl.bin: $(nandobj)u-boot-spl
- $(OBJCOPY) ${OBJCFLAGS} -O binary $< $@
+ $(OBJCOPY) $(OBJCOPYFLAGS) -O binary $< $@
$(nandobj)u-boot-spl: $(OBJS) $(nandobj)u-boot.lds
cd $(LNDIR) && $(LD) $(LDFLAGS) $(__OBJS) $(PLATFORM_LIBS) \
all: $(nandobj)u-boot-spl.bin $(nandobj)u-boot-spl-16k.bin
$(nandobj)u-boot-spl-16k.bin: $(nandobj)u-boot-spl
- $(OBJCOPY) ${OBJCFLAGS} --pad-to=$(PAD_TO) -O binary $< $@
+ $(OBJCOPY) $(OBJCOPYFLAGS) --pad-to=$(PAD_TO) -O binary $< $@
$(nandobj)u-boot-spl.bin: $(nandobj)u-boot-spl
- $(OBJCOPY) ${OBJCFLAGS} -O binary $< $@
+ $(OBJCOPY) $(OBJCOPYFLAGS) -O binary $< $@
$(nandobj)u-boot-spl: $(OBJS) $(nandobj)u-boot.lds
cd $(LNDIR) && $(LD) $(LDFLAGS) $(__OBJS) $(PLATFORM_LIBS) \
all: $(nandobj)u-boot-spl.bin $(nandobj)u-boot-spl-16k.bin
$(nandobj)u-boot-spl-16k.bin: $(nandobj)u-boot-spl
- $(OBJCOPY) ${OBJCFLAGS} --pad-to=$(PAD_TO) -O binary $< $@
+ $(OBJCOPY) $(OBJCOPYFLAGS) --pad-to=$(PAD_TO) -O binary $< $@
$(nandobj)u-boot-spl.bin: $(nandobj)u-boot-spl
- $(OBJCOPY) ${OBJCFLAGS} -O binary $< $@
+ $(OBJCOPY) $(OBJCOPYFLAGS) -O binary $< $@
$(nandobj)u-boot-spl: $(OBJS) $(nandobj)u-boot.lds
cd $(LNDIR) && $(LD) $(LDFLAGS) $(__OBJS) $(PLATFORM_LIBS) \
all: $(nandobj)u-boot-spl.bin $(nandobj)u-boot-spl-16k.bin
$(nandobj)u-boot-spl-16k.bin: $(nandobj)u-boot-spl
- $(OBJCOPY) ${OBJCFLAGS} --pad-to=$(PAD_TO) -O binary $< $@
+ $(OBJCOPY) $(OBJCOPYFLAGS) --pad-to=$(PAD_TO) -O binary $< $@
$(nandobj)u-boot-spl.bin: $(nandobj)u-boot-spl
- $(OBJCOPY) ${OBJCFLAGS} -O binary $< $@
+ $(OBJCOPY) $(OBJCOPYFLAGS) -O binary $< $@
$(nandobj)u-boot-spl: $(OBJS) $(nandobj)u-boot.lds
cd $(LNDIR) && $(LD) $(LDFLAGS) $(__OBJS) $(PLATFORM_LIBS) \
all: $(nandobj)u-boot-spl.bin $(nandobj)u-boot-spl-16k.bin
$(nandobj)u-boot-spl-16k.bin: $(nandobj)u-boot-spl
- $(OBJCOPY) ${OBJCFLAGS} --pad-to=$(PAD_TO) -O binary $< $@
+ $(OBJCOPY) $(OBJCOPYFLAGS) --pad-to=$(PAD_TO) -O binary $< $@
$(nandobj)u-boot-spl.bin: $(nandobj)u-boot-spl
- $(OBJCOPY) ${OBJCFLAGS} -O binary $< $@
+ $(OBJCOPY) $(OBJCOPYFLAGS) -O binary $< $@
$(nandobj)u-boot-spl: $(OBJS) $(nandobj)u-boot-nand_spl.lds
cd $(LNDIR) && $(LD) $(LDFLAGS) $(__OBJS) $(PLATFORM_LIBS) \
all: $(nandobj)u-boot-spl.bin $(nandobj)u-boot-spl-16k.bin
$(nandobj)u-boot-spl-16k.bin: $(nandobj)u-boot-spl
- $(OBJCOPY) ${OBJCFLAGS} --pad-to=$(PAD_TO) -O binary $< $@
+ $(OBJCOPY) $(OBJCOPYFLAGS) --pad-to=$(PAD_TO) -O binary $< $@
$(nandobj)u-boot-spl.bin: $(nandobj)u-boot-spl
- $(OBJCOPY) ${OBJCFLAGS} -O binary $< $@
+ $(OBJCOPY) $(OBJCOPYFLAGS) -O binary $< $@
$(nandobj)u-boot-spl: $(OBJS) $(nandobj)u-boot-nand_spl.lds
cd $(LNDIR) && $(LD) $(LDFLAGS) $(__OBJS) $(PLATFORM_LIBS) \
all: $(nandobj)u-boot-spl.bin $(nandobj)u-boot-spl-16k.bin
$(nandobj)u-boot-spl-16k.bin: $(nandobj)u-boot-spl
- $(OBJCOPY) ${OBJCFLAGS} --pad-to=$(PAD_TO) -O binary $< $@
+ $(OBJCOPY) $(OBJCOPYFLAGS) --pad-to=$(PAD_TO) -O binary $< $@
$(nandobj)u-boot-spl.bin: $(nandobj)u-boot-spl
- $(OBJCOPY) ${OBJCFLAGS} -O binary $< $@
+ $(OBJCOPY) $(OBJCOPYFLAGS) -O binary $< $@
$(nandobj)u-boot-spl: $(OBJS) $(nandobj)u-boot-nand_spl.lds
cd $(LNDIR) && $(LD) $(LDFLAGS) $(__OBJS) $(PLATFORM_LIBS) \
all: $(nandobj)u-boot-spl.bin $(nandobj)u-boot-spl-16k.bin
$(nandobj)u-boot-spl-16k.bin: $(nandobj)u-boot-spl
- $(OBJCOPY) ${OBJCFLAGS} --pad-to=$(PAD_TO) -O binary $< $@
+ $(OBJCOPY) $(OBJCOPYFLAGS) --pad-to=$(PAD_TO) -O binary $< $@
$(nandobj)u-boot-spl.bin: $(nandobj)u-boot-spl
- $(OBJCOPY) ${OBJCFLAGS} -O binary $< $@
+ $(OBJCOPY) $(OBJCOPYFLAGS) -O binary $< $@
$(nandobj)u-boot-spl: $(OBJS) $(nandobj)u-boot-nand_spl.lds
cd $(LNDIR) && $(LD) $(LDFLAGS) $(__OBJS) $(PLATFORM_LIBS) \
all: $(nandobj)u-boot-spl.bin $(nandobj)u-boot-spl-16k.bin
$(nandobj)u-boot-spl-16k.bin: $(nandobj)u-boot-spl
- $(OBJCOPY) ${OBJCFLAGS} --pad-to=$(PAD_TO) -O binary $< $@
+ $(OBJCOPY) $(OBJCOPYFLAGS) --pad-to=$(PAD_TO) -O binary $< $@
$(nandobj)u-boot-spl.bin: $(nandobj)u-boot-spl
- $(OBJCOPY) ${OBJCFLAGS} -O binary $< $@
+ $(OBJCOPY) $(OBJCOPYFLAGS) -O binary $< $@
$(nandobj)u-boot-spl: $(OBJS) $(nandobj)u-boot-nand_spl.lds
cd $(LNDIR) && $(LD) $(LDFLAGS) $(__OBJS) $(PLATFORM_LIBS) \
all: $(nandobj)u-boot-spl.bin $(nandobj)u-boot-spl-16k.bin
$(nandobj)u-boot-spl-16k.bin: $(nandobj)u-boot-spl
- $(OBJCOPY) ${OBJCFLAGS} --pad-to=$(PAD_TO) -O binary $< $@
+ $(OBJCOPY) $(OBJCOPYFLAGS) --pad-to=$(PAD_TO) -O binary $< $@
$(nandobj)u-boot-spl.bin: $(nandobj)u-boot-spl
- $(OBJCOPY) ${OBJCFLAGS} -O binary $< $@
+ $(OBJCOPY) $(OBJCOPYFLAGS) -O binary $< $@
$(nandobj)u-boot-spl: $(OBJS) $(nandobj)u-boot.lds
cd $(LNDIR) && $(LD) $(LDFLAGS) $(__OBJS) $(PLATFORM_LIBS) \
--- /dev/null
+#!/bin/sh
+# Test for gcc '-fstack-usage' support
+# Copyright (C) 2013, Masahiro Yamada <yamada.m@jp.panasonic.com>
+#
+# SPDX-License-Identifier: GPL-2.0+
+#
+
+TMP="$$"
+
+cat <<END | $@ -Werror -fstack-usage -x c - -c -o $TMP >/dev/null 2>&1 \
+ && echo "y"
+int main(void)
+{
+ return 0;
+}
+END
+
+rm -f $TMP $TMP.su
sub get_kernel_version() {
my $version = 'unknown kernel version';
- if (defined($ENV{'U_BOOT_VERSION'})) {
- $version = $ENV{'U_BOOT_VERSION'};
+ if (defined($ENV{'UBOOTVERSION'})) {
+ $version = $ENV{'UBOOTVERSION'};
}
return $version;
}
# Add GCC lib
ifeq ("$(USE_PRIVATE_LIBGCC)", "yes")
-PLATFORM_LIBS := $(SPLTREE)/arch/$(ARCH)/lib/lib.a
+PLATFORM_LIBGCC = $(SPLTREE)/arch/$(ARCH)/lib/lib.a
+PLATFORM_LIBS := $(filter-out %/lib.a, $(filter-out -lgcc, $(PLATFORM_LIBS))) $(PLATFORM_LIBGCC)
endif
u-boot-spl-init := $(head-y)
$(shell $(LD) --version | \
sed -ne 's/GNU ld version \([0-9][0-9]*\)\.\([0-9][0-9]*\).*/-DLD_MAJOR=\1 -DLD_MINOR=\2/p')
-$(OBJTREE)/MLO: $(obj)/u-boot-spl.bin
- $(OBJTREE)/tools/mkimage -T omapimage \
- -a $(CONFIG_SPL_TEXT_BASE) -d $< $@
+quiet_cmd_mkimage = UIMAGE $@
+cmd_mkimage = $(objtree)/tools/mkimage $(MKIMAGEFLAGS_$(@F)) -d $< $@ \
+ $(if $(KBUILD_VERBOSE:1=), >/dev/null)
-$(OBJTREE)/MLO.byteswap: $(obj)/u-boot-spl.bin
- $(OBJTREE)/tools/mkimage -T omapimage -n byteswap \
- -a $(CONFIG_SPL_TEXT_BASE) -d $< $@
+MKIMAGEFLAGS_MLO = -T omapimage -a $(CONFIG_SPL_TEXT_BASE)
-$(objtree)/SPL : $(obj)/u-boot-spl.bin
- $(MAKE) $(build)=spl/arch/arm/imx-common $@
+MKIMAGEFLAGS_MLO.byteswap = -T omapimage -n byteswap -a $(CONFIG_SPL_TEXT_BASE)
+
+MLO MLO.byteswap: $(obj)/u-boot-spl.bin
+ $(call if_changed,mkimage)
ALL-y += $(obj)/$(SPL_BIN).bin
$(OBJTREE)/tools/mkexynosspl) $(VAR_SIZE_PARAM) $< $@
endif
-$(obj)/$(SPL_BIN).bin: $(obj)/$(SPL_BIN)
- $(OBJCOPY) $(OBJCFLAGS) $(SPL_OBJCFLAGS) -O binary $< $@
+quiet_cmd_objcopy = OBJCOPY $@
+cmd_objcopy = $(OBJCOPY) $(OBJCOPYFLAGS) $(OBJCOPYFLAGS_$(@F)) $< $@
+
+OBJCOPYFLAGS_$(SPL_BIN).bin = $(SPL_OBJCFLAGS) -O binary
+
+$(obj)/$(SPL_BIN).bin: $(obj)/$(SPL_BIN) FORCE
+ $(call if_changed,objcopy)
LDFLAGS_$(SPL_BIN) += -T u-boot-spl.lds $(LDFLAGS_FINAL)
ifneq ($(CONFIG_SPL_TEXT_BASE),)
# FIX ME
cpp_flags := $(KBUILD_CPPFLAGS) $(CPPFLAGS) $(UBOOTINCLUDE) $(NOSTDINC_FLAGS)
+quiet_cmd_cpp_lds = LDS $@
+cmd_cpp_lds = $(CPP) $(cpp_flags) $(LDPPFLAGS) -ansi -D__ASSEMBLY__ \
+ -x assembler-with-cpp -P -o $@ $<
+
$(obj)/u-boot-spl.lds: $(LDSCRIPT) FORCE
- $(CPP) $(cpp_flags) $(LDPPFLAGS) -I$(obj). -ansi -D__ASSEMBLY__ -P - < $< > $@
+ $(call if_changed,cpp_lds)
+
+# read all saved command lines
+
+targets := $(wildcard $(sort $(targets)))
+cmd_files := $(wildcard $(obj)/.*.cmd $(foreach f,$(targets),$(dir $(f)).$(notdir $(f)).cmd))
+
+ifneq ($(cmd_files),)
+ $(cmd_files): ; # Do not try to update included dependency files
+ include $(cmd_files)
+endif
PHONY += FORCE
FORCE:
+++ /dev/null
-#!/bin/sh
-
-# Adapted from Linux kernel's "Kbuild":
-# commit 1cdf25d704f7951d02a04064c97db547d6021872
-# Author: Christoph Lameter <clameter@sgi.com>
-
-mkdir -p $(dirname $2)
-
-# Default sed regexp - multiline due to syntax constraints
-SED_CMD="/^->/{s:->#\(.*\):/* \1 */:; \
- s:^->\([^ ]*\) [\$#]*\([-0-9]*\) \(.*\):#define \1 (\2) /* \3 */:; \
- s:^->\([^ ]*\) [\$#]*\([^ ]*\) \(.*\):#define \1 \2 /* \3 */:; \
- s:->::; p;}"
-
-(set -e
- echo "#ifndef __ASM_OFFSETS_H__"
- echo "#define __ASM_OFFSETS_H__"
- echo "/*"
- echo " * DO NOT MODIFY."
- echo " *"
- echo " * This file was generated by $(basename $0)"
- echo " *"
- echo " */"
- echo ""
- sed -ne "${SED_CMD}" $1
- echo ""
- echo "#endif" ) > $2
projects / karo-tx-uboot.git / commitdiff