endmenu # General setup
+menuconfig EXPERT
+ bool "Configure standard U-Boot features (expert users)"
+ help
+ This option allows certain base U-Boot options and settings
+ to be disabled or tweaked. This is for specialized
+ environments which can tolerate a "non-standard" U-Boot.
+ Only use this if you really know what you are doing.
+
menu "Boot images"
config SPL_BUILD
help
If you want to build TPL as well as the normal image and SPL, say Y.
+config FIT
+ bool "Support Flattened Image Tree"
+ depends on !SPL_BUILD
+ help
+ This option allows to boot the new uImage structrure,
+ Flattened Image Tree. FIT is formally a FDT, which can include
+ images of various types (kernel, FDT blob, ramdisk, etc.)
+ in a single blob. To boot this new uImage structure,
+ pass the the address of the blob to the "bootm" command.
+
+config FIT_VERBOSE
+ bool "Display verbose messages on FIT boot"
+ depends on FIT
+
+config FIT_SIGNATURE
+ bool "Enabel signature verification of FIT uImages"
+ depends on FIT
+ help
+ This option enables signature verification of FIT uImages,
+ using a hash signed and verified using RSA.
+ See doc/uImage.FIT/signature.txt for more details.
+
config SYS_EXTRA_OPTIONS
string "Extra Options (DEPRECATED)"
depends on !SPL_BUILD
F: arch/arm/cpu/arm926ejs/spear/
F: arch/arm/include/asm/arch-spear/
+ARM STM STV0991
+M: Vikas Manocha <vikas.manocha@st.com>
+S: Maintained
+F: arch/arm/cpu/armv7/stv0991/
+F: arch/arm/include/asm/arch-stv0991/
+
ARM SUNXI
M: Ian Campbell <ijc@hellion.org.uk>
M: Hans De Goede <hdegoede@redhat.com>
F: drivers/mtd/jedec_flash.c
COLDFIRE
-M: Jason Jin <jason.jin@freescale.com>
+M: Huan Wang <alison.wang@freescale.com>
+M: Angelo Dureghello <angelo@sysam.it>
S: Maintained
T: git git://git.denx.de/u-boot-coldfire.git
F: arch/m68k/
UBI
M: Kyungmin Park <kmpark@infradead.org>
+M: Heiko Schocher <hs@denx.de>
S: Maintained
T: git git://git.denx.de/u-boot-ubi.git
F: drivers/mtd/ubi/
VERSION = 2015
PATCHLEVEL = 01
SUBLEVEL =
-EXTRAVERSION = -rc1
+EXTRAVERSION = -rc3
NAME =
# *DOCUMENTATION*
-path ./include/config/auto.conf -newer $(KCONFIG_CONFIG)))
ifneq ($(autoconf_is_current),)
include $(srctree)/config.mk
+include $(srctree)/arch/$(ARCH)/Makefile
endif
# If board code explicitly specified LDSCRIPT or CONFIG_SYS_LDSCRIPT, use
#########################################################################
# U-Boot objects....order is important (i.e. start must be first)
-head-y := $(CPUDIR)/start.o
-head-$(CONFIG_4xx) += arch/powerpc/cpu/ppc4xx/resetvec.o
-head-$(CONFIG_MPC85xx) += arch/powerpc/cpu/mpc85xx/resetvec.o
-
HAVE_VENDOR_COMMON_LIB = $(if $(wildcard $(srctree)/board/$(VENDOR)/common/Makefile),y,n)
libs-y += lib/
libs-$(HAVE_VENDOR_COMMON_LIB) += board/$(VENDOR)/common/
-libs-y += $(CPUDIR)/
-ifdef SOC
-libs-y += $(CPUDIR)/$(SOC)/
-endif
libs-$(CONFIG_OF_EMBED) += dts/
-libs-y += arch/$(ARCH)/lib/
libs-y += fs/
libs-y += net/
libs-y += disk/
libs-y += drivers/usb/phy/
libs-y += drivers/usb/ulpi/
libs-y += common/
-libs-y += lib/libfdt/
libs-$(CONFIG_API) += api/
libs-$(CONFIG_HAS_POST) += post/
libs-y += test/
libs-y += test/dm/
-ifneq (,$(filter $(SOC), mx25 mx27 mx5 mx6 mx31 mx35 mxs vf610))
-libs-y += arch/$(ARCH)/imx-common/
-endif
-
-ifneq (,$(filter $(SOC), armada-xp kirkwood))
-libs-y += arch/$(ARCH)/mvebu-common/
-endif
-
-libs-$(CONFIG_ARM) += arch/arm/cpu/
-libs-$(CONFIG_PPC) += arch/powerpc/cpu/
-
libs-y += $(if $(BOARDDIR),board/$(BOARDDIR)/)
libs-y := $(sort $(libs-y))
endif
ALL-$(CONFIG_REMAKE_ELF) += u-boot.elf
+# We can't do this yet due to the need for binary blobs
+# ALL-$(CONFIG_X86_RESET_VECTOR) += u-boot.rom
+
# enable combined SPL/u-boot/dtb rules for tegra
ifneq ($(CONFIG_TEGRA),)
ifeq ($(CONFIG_SPL),y)
u-boot.hex u-boot.srec: u-boot FORCE
$(call if_changed,objcopy)
-OBJCOPYFLAGS_u-boot.bin := -O binary
+OBJCOPYFLAGS_u-boot.bin := -O binary \
+ $(if $(CONFIG_X86_RESET_VECTOR),-R .start16 -R .resetvec)
binary_size_check: u-boot.bin FORCE
@file_size=$(shell wc -c u-boot.bin | awk '{print $$1}') ; \
$(call if_changed,mkimage)
@dd if=/dev/zero bs=8 count=1 2>/dev/null >> $@
+# x86 uses a large ROM. We fill it with 0xff, put the 16-bit stuff (including
+# reset vector) at the top, Intel ME descriptor at the bottom, and U-Boot in
+# the middle.
+ifneq ($(CONFIG_X86_RESET_VECTOR),)
+rom: u-boot.rom FORCE
+
+u-boot.rom: u-boot-x86-16bit.bin u-boot-dtb.bin \
+ $(srctree)/board/$(BOARDDIR)/mrc.bin
+ $(objtree)/tools/ifdtool -c -r $(CONFIG_ROM_SIZE) u-boot.tmp
+ if [ -n "$(CONFIG_HAVE_INTEL_ME)" ]; then \
+ $(objtree)/tools/ifdtool -D \
+ $(srctree)/board/$(BOARDDIR)/descriptor.bin u-boot.tmp; \
+ $(objtree)/tools/ifdtool \
+ -i ME:$(srctree)/board/$(BOARDDIR)/me.bin u-boot.tmp; \
+ fi
+ $(objtree)/tools/ifdtool -w \
+ $(CONFIG_SYS_TEXT_BASE):$(objtree)/u-boot-dtb.bin u-boot.tmp
+ $(objtree)/tools/ifdtool -w \
+ $(CONFIG_X86_MRC_START):$(srctree)/board/$(BOARDDIR)/mrc.bin \
+ u-boot.tmp
+ $(objtree)/tools/ifdtool -w \
+ $(CONFIG_SYS_X86_START16):$(objtree)/u-boot-x86-16bit.bin \
+ u-boot.tmp
+ $(objtree)/tools/ifdtool -w \
+ $(CONFIG_X86_OPTION_ROM_ADDR):$(srctree)/board/$(BOARDDIR)/$(CONFIG_X86_OPTION_ROM_FILENAME) \
+ u-boot.tmp
+ mv u-boot.tmp $@
+
+OBJCOPYFLAGS_u-boot-x86-16bit.bin := -O binary -j .start16 -j .resetvec
+u-boot-x86-16bit.bin: u-boot FORCE
+ $(call if_changed,objcopy)
+endif
+
ifneq ($(CONFIG_SUNXI),)
OBJCOPYFLAGS_u-boot-sunxi-with-spl.bin = -I binary -O binary \
--pad-to=$(CONFIG_SPL_PAD_TO) --gap-fill=0xff
#concatenated with u-boot binary. It is need by PowerPC SoC having
#internal SRAM <= 512KB.
MKIMAGEFLAGS_u-boot-spl.pbl = -n $(srctree)/$(CONFIG_SYS_FSL_PBL_RCW:"%"=%) \
- -R $(srctree)/$(CONFIG_SYS_FSL_PBL_PBI:"%"=%) -T pblimage
+ -R $(srctree)/$(CONFIG_SYS_FSL_PBL_PBI:"%"=%) -T pblimage \
+ -A $(ARCH) -a $(CONFIG_SPL_TEXT_BASE)
spl/u-boot-spl.pbl: spl/u-boot-spl.bin FORCE
$(call if_changed,mkimage)
+ifeq ($(ARCH),arm)
+UBOOT_BINLOAD := u-boot.img
+else
+UBOOT_BINLOAD := u-boot.bin
+endif
+
OBJCOPYFLAGS_u-boot-with-spl-pbl.bin = -I binary -O binary --pad-to=$(CONFIG_SPL_PAD_TO) \
--gap-fill=0xff
-u-boot-with-spl-pbl.bin: spl/u-boot-spl.pbl u-boot.bin FORCE
+u-boot-with-spl-pbl.bin: spl/u-boot-spl.pbl $(UBOOT_BINLOAD) FORCE
$(call if_changed,pad_cat)
# PPC4xx needs the SPL at the end of the image, since the reset vector
Enables a workaround for IFC erratum A003399. It is only
requred during NOR boot.
+ CONFIG_A008044_WORKAROUND
+ Enables a workaround for T1040/T1042 erratum A008044. It is only
+ requred during NAND boot and valid for Rev 1.0 SoC revision
+
CONFIG_SYS_FSL_CORENET_SNOOPVEC_COREONLY
This is the value to write into CCSR offset 0x18600
exists, unlike the similar options in the Linux kernel. Do not
set these options unless they apply!
+- Driver Model
+ Driver model is a new framework for devices in U-Boot
+ introduced in early 2014. U-Boot is being progressively
+ moved over to this. It offers a consistent device structure,
+ supports grouping devices into classes and has built-in
+ handling of platform data and device tree.
+
+ To enable transition to driver model in a relatively
+ painful fashion, each subsystem can be independently
+ switched between the legacy/ad-hoc approach and the new
+ driver model using the options below. Also, many uclass
+ interfaces include compatibility features which may be
+ removed once the conversion of that subsystem is complete.
+ As a result, the API provided by the subsystem may in fact
+ not change with driver model.
+
+ See doc/driver-model/README.txt for more information.
+
+ CONFIG_DM
+
+ Enable driver model. This brings in the core support,
+ including scanning of platform data on start-up. If
+ CONFIG_OF_CONTROL is enabled, the device tree will be
+ scanned also when available.
+
+ CONFIG_CMD_DM
+
+ Enable driver model test commands. These allow you to print
+ out the driver model tree and the uclasses.
+
+ CONFIG_DM_DEMO
+
+ Enable some demo devices and the 'demo' command. These are
+ really only useful for playing around while trying to
+ understand driver model in sandbox.
+
+ CONFIG_SPL_DM
+
+ Enable driver model in SPL. You will need to provide a
+ suitable malloc() implementation. If you are not using the
+ full malloc() enabled by CONFIG_SYS_SPL_MALLOC_START,
+ consider using CONFIG_SYS_MALLOC_SIMPLE. In that case you
+ must provide CONFIG_SYS_MALLOC_F_LEN to set the size.
+ In most cases driver model will only allocate a few uclasses
+ and devices in SPL, so 1KB should be enable. See
+ CONFIG_SYS_MALLOC_F_LEN for more details on how to enable
+ it.
+
+ CONFIG_DM_SERIAL
+
+ Enable driver model for serial. This replaces
+ drivers/serial/serial.c with the serial uclass, which
+ implements serial_putc() etc. The uclass interface is
+ defined in include/serial.h.
+
+ CONFIG_DM_GPIO
+
+ Enable driver model for GPIO access. The standard GPIO
+ interface (gpio_get_value(), etc.) is then implemented by
+ the GPIO uclass. Drivers provide methods to query the
+ particular GPIOs that they provide. The uclass interface
+ is defined in include/asm-generic/gpio.h.
+
+ CONFIG_DM_SPI
+
+ Enable driver model for SPI. The SPI slave interface
+ (spi_setup_slave(), spi_xfer(), etc.) is then implemented by
+ the SPI uclass. Drivers provide methods to access the SPI
+ buses that they control. The uclass interface is defined in
+ include/spi.h. The existing spi_slave structure is attached
+ as 'parent data' to every slave on each bus. Slaves
+ typically use driver-private data instead of extending the
+ spi_slave structure.
+
+ CONFIG_DM_SPI_FLASH
+
+ Enable driver model for SPI flash. This SPI flash interface
+ (spi_flash_probe(), spi_flash_write(), etc.) is then
+ implemented by the SPI flash uclass. There is one standard
+ SPI flash driver which knows how to probe most chips
+ supported by U-Boot. The uclass interface is defined in
+ include/spi_flash.h, but is currently fully compatible
+ with the old interface to avoid confusion and duplication
+ during the transition parent. SPI and SPI flash must be
+ enabled together (it is not possible to use driver model
+ for one and not the other).
+
+ CONFIG_DM_CROS_EC
+
+ Enable driver model for the Chrome OS EC interface. This
+ allows the cros_ec SPI driver to operate with CONFIG_DM_SPI
+ but otherwise makes few changes. Since cros_ec also supports
+ I2C and LPC (which don't support driver model yet), a full
+ conversion is not yet possible.
+
+
+ ** Code size options: The following options are enabled by
+ default except in SPL. Enable them explicitly to get these
+ features in SPL.
+
+ CONFIG_DM_WARN
+
+ Enable the dm_warn() function. This can use up quite a bit
+ of space for its strings.
+
+ CONFIG_DM_STDIO
+
+ Enable registering a serial device with the stdio library.
+
+ CONFIG_DM_DEVICE_REMOVE
+
+ Enable removing of devices.
+
+
- Linux Kernel Interface:
CONFIG_CLOCKS_IN_MHZ
Board code has addition modification that it wants to make
to the flat device tree before handing it off to the kernel
+ CONFIG_OF_SYSTEM_SETUP
+
+ Other code has addition modification that it wants to make
+ to the flat device tree before handing it off to the kernel.
+ This causes ft_system_setup() to be called before booting
+ the kernel.
+
CONFIG_OF_BOOT_CPU
This define fills in the correct boot CPU in the boot
CONFIG_CMD_EXT4 * ext4 command support
CONFIG_CMD_FS_GENERIC * filesystem commands (e.g. load, ls)
that work for multiple fs types
+ CONFIG_CMD_FS_UUID * Look up a filesystem UUID
CONFIG_CMD_SAVEENV saveenv
CONFIG_CMD_FDC * Floppy Disk Support
CONFIG_CMD_FAT * FAT command support
Enable auto completion of commands using TAB.
- CONFIG_SYS_HUSH_PARSER
-
- Define this variable to enable the "hush" shell (from
- Busybox) as command line interpreter, thus enabling
- powerful command line syntax like
- if...then...else...fi conditionals or `&&' and '||'
- constructs ("shell scripts").
-
- If undefined, you get the old, much simpler behaviour
- with a somewhat smaller memory footprint.
-
-
CONFIG_SYS_PROMPT_HUSH_PS2
This defines the secondary prompt string, which is
to 128 or 256, although it does not have to be power of 2).
default: 4096
-
+
CONFIG_MTD_UBI_BEB_LIMIT
This option specifies the maximum bad physical eraseblocks UBI
expects on the MTD device (per 1024 eraseblocks). If the
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR,
CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS,
- CONFIG_SYS_MMC_SD_FS_BOOT_PARTITION
- Address, size and partition on the MMC to load U-Boot from
+ Address and partition on the MMC to load U-Boot from
when the MMC is being used in raw mode.
+ CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION
+ Partition on the MMC to load U-Boot from when the MMC is being
+ used in raw mode
+
CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR
Sector to load kernel uImage from when MMC is being
used in raw mode (for Falcon mode)
parameters from when MMC is being used in raw mode
(for falcon mode)
+ CONFIG_SYS_MMCSD_FS_BOOT_PARTITION
+ Partition on the MMC to load U-Boot from when the MMC is being
+ used in fs mode
+
CONFIG_SPL_FAT_SUPPORT
Support for fs/fat/libfat.o in SPL binary
Support for the MTD subsystem within SPL. Useful for
environment on NAND support within SPL.
+ CONFIG_SPL_NAND_RAW_ONLY
+ Support to boot only raw u-boot.bin images. Use this only
+ if you need to save space.
+
CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT
Set for the SPL on PPC mpc8xxx targets, support for
drivers/ddr/fsl/libddr.o in SPL binary.
Pre-relocation malloc() is only supported on ARM and sandbox
at present but is fairly easy to enable for other archs.
+- CONFIG_SYS_MALLOC_SIMPLE
+ Provides a simple and small malloc() and calloc() for those
+ boards which do not use the full malloc in SPL (which is
+ enabled with CONFIG_SYS_SPL_MALLOC_START).
+
- CONFIG_SYS_BOOTM_LEN:
Normally compressed uImages are limited to an
uncompressed size of 8 MBytes. If this is not enough,
--- /dev/null
+#
+# SPDX-License-Identifier: GPL-2.0+
+#
+
+head-y := arch/arc/cpu/$(CPU)/start.o
+
+libs-y += arch/arc/cpu/$(CPU)/
+libs-y += arch/arc/lib/
select CPU_ARM926EJS
config TARGET_CORVUS
+ select SUPPORT_SPL
bool "Support corvus"
select CPU_ARM926EJS
config TARGET_TAURUS
+ select SUPPORT_SPL
bool "Support taurus"
select CPU_ARM926EJS
bool "Support spear600"
select CPU_ARM926EJS
+config TARGET_STV0991
+ bool "Support stv0991"
+ select CPU_V7
+
config TARGET_X600
bool "Support x600"
select CPU_ARM926EJS
bool "Support mx35pdk"
select CPU_ARM1136
-config TARGET_RPI_B
- bool "Support rpi_b"
+config TARGET_RPI
+ bool "Support rpi"
select CPU_ARM1176
config TARGET_TNETV107X_EVM
config TARGET_VEXPRESS_CA15_TC2
bool "Support vexpress_ca15_tc2"
select CPU_V7
+ select CPU_V7_HAS_NONSEC
+ select CPU_V7_HAS_VIRT
config TARGET_VEXPRESS_CA5X2
bool "Support vexpress_ca5x2"
select CPU_V7
select SUPPORT_SPL
+config TARGET_SAMA5D4_XPLAINED
+ bool "Support sama5d4_xplained"
+ select CPU_V7
+
+config TARGET_SAMA5D4EK
+ bool "Support sama5d4ek"
+ select CPU_V7
+
config TARGET_BCM28155_AP
bool "Support bcm28155_ap"
select CPU_V7
-config TARGET_BCM958300K
- bool "Support bcm958300k"
+config TARGET_BCMCYGNUS
+ bool "Support bcmcygnus"
select CPU_V7
-config TARGET_BCM958622HR
- bool "Support bcm958622hr"
+config TARGET_BCMNSP
+ bool "Support bcmnsp"
select CPU_V7
config ARCH_EXYNOS
config TARGET_MX6SABRESD
bool "Support mx6sabresd"
select CPU_V7
+ select SUPPORT_SPL
config TARGET_MX6SLEVK
bool "Support mx6slevk"
select CPU_V7
select SUPPORT_SPL
+config TARGET_TBS2910
+ bool "Support tbs2910"
+ select CPU_V7
+
config TARGET_TQMA6
bool "TQ Systems TQMa6 board"
select CPU_V7
select ARM64
config TARGET_LS1021AQDS
- bool "Support ls1021aqds_nor"
+ bool "Support ls1021aqds"
select CPU_V7
+ select SUPPORT_SPL
config TARGET_LS1021ATWR
- bool "Support ls1021atwr_nor"
+ bool "Support ls1021atwr"
select CPU_V7
+ select SUPPORT_SPL
config TARGET_BALLOON3
bool "Support balloon3"
bool "Panasonic UniPhier platform"
select CPU_V7
select SUPPORT_SPL
+ select OF_CONTROL if !SPL_BUILD
endchoice
source "arch/arm/cpu/armv7/zynq/Kconfig"
+source "arch/arm/cpu/armv7/Kconfig"
+
source "board/aristainetos/Kconfig"
source "board/BuR/kwb/Kconfig"
source "board/BuR/tseries/Kconfig"
source "board/atmel/at91sam9x5ek/Kconfig"
source "board/atmel/sama5d3_xplained/Kconfig"
source "board/atmel/sama5d3xek/Kconfig"
+source "board/atmel/sama5d4_xplained/Kconfig"
+source "board/atmel/sama5d4ek/Kconfig"
source "board/bachmann/ot1200/Kconfig"
source "board/balloon3/Kconfig"
source "board/barco/titanium/Kconfig"
source "board/bluewater/snapper9260/Kconfig"
source "board/boundary/nitrogen6x/Kconfig"
source "board/broadcom/bcm28155_ap/Kconfig"
-source "board/broadcom/bcm958300k/Kconfig"
-source "board/broadcom/bcm958622hr/Kconfig"
+source "board/broadcom/bcmcygnus/Kconfig"
+source "board/broadcom/bcmnsp/Kconfig"
source "board/calao/sbc35_a9g20/Kconfig"
source "board/calao/tny_a9260/Kconfig"
source "board/calao/usb_a9263/Kconfig"
source "board/phytec/pcm051/Kconfig"
source "board/ppcag/bg0900/Kconfig"
source "board/pxa255_idp/Kconfig"
-source "board/raspberrypi/rpi_b/Kconfig"
+source "board/raspberrypi/rpi/Kconfig"
source "board/ronetix/pm9261/Kconfig"
source "board/ronetix/pm9263/Kconfig"
source "board/ronetix/pm9g45/Kconfig"
source "board/spear/x600/Kconfig"
source "board/st-ericsson/snowball/Kconfig"
source "board/st-ericsson/u8500/Kconfig"
+source "board/st/stv0991/Kconfig"
source "board/sunxi/Kconfig"
source "board/syteco/jadecpu/Kconfig"
source "board/syteco/zmx25/Kconfig"
source "board/taskit/stamp9g20/Kconfig"
+source "board/tbs/tbs2910/Kconfig"
source "board/ti/am335x/Kconfig"
source "board/ti/am43xx/Kconfig"
source "board/ti/ti814x/Kconfig"
--- /dev/null
+#
+# SPDX-License-Identifier: GPL-2.0+
+#
+
+head-y := arch/arm/cpu/$(CPU)/start.o
+
+ifeq ($(CONFIG_SPL_BUILD),y)
+ifneq ($(CONFIG_SPL_START_S_PATH),)
+head-y := $(CONFIG_SPL_START_S_PATH:"%"=%)/start.o
+endif
+endif
+
+libs-y += arch/arm/cpu/$(CPU)/
+libs-y += arch/arm/cpu/
+libs-y += arch/arm/lib/
+
+ifeq ($(CONFIG_SPL_BUILD),y)
+ifneq (,$(CONFIG_MX23)$(CONFIG_MX35)$(filter $(SOC), mx25 mx27 mx5 mx6 mx31 mx35))
+libs-y += arch/arm/imx-common/
+endif
+else
+ifneq (,$(filter $(SOC), mx25 mx27 mx5 mx6 mx31 mx35 mxs vf610))
+libs-y += arch/arm/imx-common/
+endif
+endif
+
+ifneq (,$(filter $(SOC), armada-xp kirkwood))
+libs-y += arch/arm/mvebu-common/
+endif
extra-y = start.o
obj-y = cpu.o
+
+obj-$(CONFIG_MX31) += mx31/
+obj-$(CONFIG_MX35) += mx35/
extra-y = start.o
obj-y = cpu.o
+
+obj-$(CONFIG_BCM2835) += bcm2835/
+obj-$(CONFIG_TNETV107X) += tnetv107x/
#define BIT(x) (1 << (x))
#define MAX_PREDIV 64
-#define MAX_POSTDIV 8
+#define MAX_POSTDIV 8UL
#define MAX_MULT 512
#define MAX_DIV (MAX_PREDIV * MAX_POSTDIV)
pllctl_reg_write(data->pll, ctl, tmp);
mult = data->pll_freq / fpll;
- for (mult = max(mult, 1); mult <= MAX_MULT; mult++) {
+ for (mult = max(mult, 1UL); mult <= MAX_MULT; mult++) {
div = (fpll * mult) / data->pll_freq;
if (div < 1 || div > MAX_DIV)
continue;
obj-y = interrupts.o cpu.o
obj-$(CONFIG_TEGRA) += tegra-common/
+obj-$(CONFIG_TEGRA20) += tegra20/
+obj-$(CONFIG_TEGRA30) += tegra30/
+obj-$(CONFIG_TEGRA114) += tegra114/
+obj-$(CONFIG_TEGRA124) += tegra124/
obj-y += cpu.o
obj-$(CONFIG_USE_IRQ) += interrupts.o
+
+obj-$(if $(filter a320,$(SOC)),y) += a320/
+obj-$(CONFIG_AT91FAMILY) += at91/
+obj-$(CONFIG_EP93XX) += ep93xx/
+obj-$(CONFIG_IMX) += imx/
+obj-$(CONFIG_KS8695) += ks8695/
+obj-$(CONFIG_S3C24X0) += s3c24x0/
extra-y :=
endif
endif
+
+obj-$(CONFIG_ARMADA100) += armada100/
+obj-$(CONFIG_AT91FAMILY) += at91/
+obj-$(CONFIG_ARCH_DAVINCI) += davinci/
+obj-$(CONFIG_KIRKWOOD) += kirkwood/
+obj-$(if $(filter lpc32xx,$(SOC)),y) += lpc32xx/
+obj-$(CONFIG_MB86R0x) += mb86r0x/
+obj-$(CONFIG_MX25) += mx25/
+obj-$(CONFIG_MX27) += mx27/
+obj-$(if $(filter mxs,$(SOC)),y) += mxs/
+obj-$(CONFIG_ARCH_NOMADIK) += nomadik/
+obj-$(CONFIG_ORION5X) += orion5x/
+obj-$(CONFIG_PANTHEON) += pantheon/
+obj-$(if $(filter spear,$(SOC)),y) += spear/
+obj-$(CONFIG_ARCH_VERSATILE) += versatile/
*/
#include <common.h>
+#include <dm.h>
#include <asm/io.h>
+#include <asm/arch/at91sam9260_matrix.h>
#include <asm/arch/at91_common.h>
#include <asm/arch/at91_pmc.h>
+#include <asm/arch/at91sam9_sdramc.h>
#include <asm/arch/gpio.h>
/*
#endif
}
#endif
+
+void at91_sdram_hw_init(void)
+{
+ at91_set_a_periph(AT91_PIO_PORTC, 16, 0);
+ at91_set_a_periph(AT91_PIO_PORTC, 17, 0);
+ at91_set_a_periph(AT91_PIO_PORTC, 18, 0);
+ at91_set_a_periph(AT91_PIO_PORTC, 19, 0);
+ at91_set_a_periph(AT91_PIO_PORTC, 20, 0);
+ at91_set_a_periph(AT91_PIO_PORTC, 21, 0);
+ at91_set_a_periph(AT91_PIO_PORTC, 22, 0);
+ at91_set_a_periph(AT91_PIO_PORTC, 23, 0);
+ at91_set_a_periph(AT91_PIO_PORTC, 24, 0);
+ at91_set_a_periph(AT91_PIO_PORTC, 25, 0);
+ at91_set_a_periph(AT91_PIO_PORTC, 26, 0);
+ at91_set_a_periph(AT91_PIO_PORTC, 27, 0);
+ at91_set_a_periph(AT91_PIO_PORTC, 28, 0);
+ at91_set_a_periph(AT91_PIO_PORTC, 29, 0);
+ at91_set_a_periph(AT91_PIO_PORTC, 30, 0);
+ at91_set_a_periph(AT91_PIO_PORTC, 31, 0);
+}
+
+/* Platform data for the GPIOs */
+static const struct at91_port_platdata at91sam9260_plat[] = {
+ { ATMEL_BASE_PIOA, "PA" },
+ { ATMEL_BASE_PIOB, "PB" },
+ { ATMEL_BASE_PIOC, "PC" },
+};
+
+U_BOOT_DEVICES(at91sam9260_gpios) = {
+ { "gpio_at91", &at91sam9260_plat[0] },
+ { "gpio_at91", &at91sam9260_plat[1] },
+ { "gpio_at91", &at91sam9260_plat[2] },
+};
return 0;
}
+
+#if !defined(AT91_PLL_LOCK_TIMEOUT)
+#define AT91_PLL_LOCK_TIMEOUT 1000000
+#endif
+
+void at91_plla_init(u32 pllar)
+{
+ struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
+ int timeout = AT91_PLL_LOCK_TIMEOUT;
+
+ writel(pllar, &pmc->pllar);
+ while (!(readl(&pmc->sr) & (AT91_PMC_LOCKA | AT91_PMC_MCKRDY))) {
+ timeout--;
+ if (timeout == 0)
+ break;
+ }
+}
+void at91_pllb_init(u32 pllbr)
+{
+ struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
+ int timeout = AT91_PLL_LOCK_TIMEOUT;
+
+ writel(pllbr, &pmc->pllbr);
+ while (!(readl(&pmc->sr) & (AT91_PMC_LOCKB | AT91_PMC_MCKRDY))) {
+ timeout--;
+ if (timeout == 0)
+ break;
+ }
+}
+
+void at91_mck_init(u32 mckr)
+{
+ struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
+ int timeout = AT91_PLL_LOCK_TIMEOUT;
+ u32 tmp;
+
+ tmp = readl(&pmc->mckr);
+ tmp &= ~(AT91_PMC_MCKR_PRES_MASK |
+ AT91_PMC_MCKR_MDIV_MASK |
+ AT91_PMC_MCKR_PLLADIV_MASK |
+ AT91_PMC_MCKR_CSS_MASK);
+ tmp |= mckr & (AT91_PMC_MCKR_PRES_MASK |
+ AT91_PMC_MCKR_MDIV_MASK |
+ AT91_PMC_MCKR_PLLADIV_MASK |
+ AT91_PMC_MCKR_CSS_MASK);
+ writel(tmp, &pmc->mckr);
+
+ while (!(readl(&pmc->sr) & AT91_PMC_MCKRDY)) {
+ timeout--;
+ if (timeout == 0)
+ break;
+ }
+}
+
+void at91_periph_clk_enable(int id)
+{
+ struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
+
+ writel(1 << id, &pmc->pcer);
+}
# SPDX-License-Identifier: GPL-2.0+
obj-y = generic.o reset.o timer.o
+
+ifndef CONFIG_SPL_BUILD
+obj-y += relocate.o
+endif
--- /dev/null
+/*
+ * relocate - i.MX27-specific vector relocation
+ *
+ * Copyright (c) 2013 Albert ARIBAUD <albert.u.boot@aribaud.net>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <asm-offsets.h>
+#include <config.h>
+#include <linux/linkage.h>
+
+/*
+ * The i.MX27 SoC is very specific with respect to exceptions: it
+ * does not provide RAM at the high vectors address (0xFFFF0000),
+ * thus only the low address (0x00000000) is useable; but that is
+ * in ROM. Therefore, vectors cannot be changed at all.
+ *
+ * However, these ROM-based vectors actually just perform indirect
+ * calls through pointers located in RAM at SoC-specific addresses,
+ * as follows:
+ *
+ * Offset Exception Use by ROM code
+ * 0x00000000 reset indirect branch to [0x00000014]
+ * 0x00000004 undefined instruction indirect branch to [0xfffffef0]
+ * 0x00000008 software interrupt indirect branch to [0xfffffef4]
+ * 0x0000000c prefetch abort indirect branch to [0xfffffef8]
+ * 0x00000010 data abort indirect branch to [0xfffffefc]
+ * 0x00000014 (reserved in ARMv5) vector to ROM reset: 0xc0000000
+ * 0x00000018 IRQ indirect branch to [0xffffff00]
+ * 0x0000001c FIQ indirect branch to [0xffffff04]
+ *
+ * In order to initialize exceptions on i.MX27, we must copy U-Boot's
+ * indirect (not exception!) vector table into 0xfffffef0..0xffffff04
+ * taking care not to copy vectors number 5 (reserved exception).
+ */
+
+ .section .text.relocate_vectors,"ax",%progbits
+
+ENTRY(relocate_vectors)
+
+ ldr r0, [r9, #GD_RELOCADDR] /* r0 = gd->relocaddr */
+ ldr r1, =32 /* size of vector table */
+ add r0, r0, r1 /* skip to indirect table */
+ ldr r1, =0xFFFFFEF0 /* i.MX27 indirect table */
+ ldmia r0!, {r2-r8} /* load indirect vectors 1..7 */
+ stmia r1!, {r2-r5, r7,r8} /* write all but vector 5 */
+
+ bx lr
+
+ENDPROC(relocate_vectors)
+DISPLAYPROGRESS
SECTION 0x0 BOOTABLE
TAG LAST
LOAD 0x1000 spl/u-boot-spl.bin
+DISPLAYPROGRESS
SECTION 0x0 BOOTABLE
TAG LAST
LOAD 0x1000 spl/u-boot-spl.bin
+DISPLAYPROGRESS
SECTION 0x0 BOOTABLE
TAG LAST
LOAD 0x1000 spl/u-boot-spl.bin
uint32_t powered_by_linreg = 0;
int adjust_up, tmp;
- new_brownout = DIV_ROUND(new_target - new_brownout, cfg->step_mV);
+ new_brownout = DIV_ROUND_CLOSEST(new_target - new_brownout,
+ cfg->step_mV);
cur_target = readl(cfg->reg);
cur_target &= cfg->trg_mask;
--- /dev/null
+if CPU_V7
+
+config CPU_V7_HAS_NONSEC
+ bool
+
+config CPU_V7_HAS_VIRT
+ bool
+
+config ARMV7_NONSEC
+ boolean "Enable support for booting in non-secure mode" if EXPERT
+ depends on CPU_V7_HAS_NONSEC
+ default y
+ ---help---
+ Say Y here to enable support for booting in non-secure / SVC mode.
+
+config ARMV7_BOOT_SEC_DEFAULT
+ boolean "Boot in secure mode by default" if EXPERT
+ depends on ARMV7_NONSEC
+ default n
+ ---help---
+ Say Y here to boot in secure mode by default even if non-secure mode
+ is supported. This option is useful to boot kernels which do not
+ suppport booting in non-secure mode. Only set this if you need it.
+ This can be overriden at run-time by setting the bootm_boot_mode env.
+ variable to "sec" or "nonsec".
+
+config ARMV7_VIRT
+ boolean "Enable support for hardware virtualization" if EXPERT
+ depends on CPU_V7_HAS_VIRT && ARMV7_NONSEC
+ default y
+ ---help---
+ Say Y here to boot in hypervisor (HYP) mode when booting non-secure.
+
+endif
ifneq (,$(filter s5pc1xx exynos,$(SOC)))
obj-y += s5p-common/
endif
+
+obj-$(if $(filter am33xx,$(SOC)),y) += am33xx/
+obj-$(if $(filter armada-xp,$(SOC)),y) += armada-xp/
+obj-$(CONFIG_AT91FAMILY) += at91/
+obj-$(if $(filter bcm281xx,$(SOC)),y) += bcm281xx/
+obj-$(if $(filter bcmcygnus,$(SOC)),y) += bcmcygnus/
+obj-$(if $(filter bcmnsp,$(SOC)),y) += bcmnsp/
+obj-$(CONFIG_ARCH_EXYNOS) += exynos/
+obj-$(CONFIG_ARCH_HIGHBANK) += highbank/
+obj-$(CONFIG_ARCH_KEYSTONE) += keystone/
+obj-$(if $(filter ls102xa,$(SOC)),y) += ls102xa/
+obj-$(if $(filter mx5,$(SOC)),y) += mx5/
+obj-$(CONFIG_MX6) += mx6/
+obj-$(CONFIG_OMAP34XX) += omap3/
+obj-$(CONFIG_OMAP44XX) += omap4/
+obj-$(CONFIG_OMAP54XX) += omap5/
+obj-$(CONFIG_RMOBILE) += rmobile/
+obj-$(CONFIG_ARCH_S5PC1XX) += s5pc1xx/
+obj-$(CONFIG_SOCFPGA) += socfpga/
+obj-$(if $(filter stv0991,$(SOC)),y) += stv0991/
+obj-$(CONFIG_ARCH_SUNXI) += sunxi/
+obj-$(CONFIG_TEGRA20) += tegra20/
+obj-$(CONFIG_U8500) += u8500/
+obj-$(CONFIG_ARCH_UNIPHIER) += uniphier/
+obj-$(CONFIG_VF610) += vf610/
+obj-$(CONFIG_ZYNQ) += zynq/
#
obj-$(CONFIG_SAMA5D3) += sama5d3_devices.o
+obj-$(CONFIG_SAMA5D4) += sama5d4_devices.o
obj-y += clock.o
obj-y += cpu.o
obj-y += reset.o
return 0;
}
+void at91_plla_init(u32 pllar)
+{
+ struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
+
+ writel(pllar, &pmc->pllar);
+ while (!(readl(&pmc->sr) & (AT91_PMC_LOCKA | AT91_PMC_MCKRDY)))
+ ;
+}
+
+void at91_mck_init(u32 mckr)
+{
+ struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
+ u32 tmp;
+
+ tmp = readl(&pmc->mckr);
+ tmp &= ~(AT91_PMC_MCKR_CSS_MASK |
+ AT91_PMC_MCKR_PRES_MASK |
+ AT91_PMC_MCKR_MDIV_MASK |
+ AT91_PMC_MCKR_PLLADIV_2);
+ tmp |= mckr & (AT91_PMC_MCKR_CSS_MASK |
+ AT91_PMC_MCKR_PRES_MASK |
+ AT91_PMC_MCKR_MDIV_MASK |
+ AT91_PMC_MCKR_PLLADIV_2);
+ writel(tmp, &pmc->mckr);
+
+ while (!(readl(&pmc->sr) & AT91_PMC_MCKRDY))
+ ;
+}
+
void at91_periph_clk_enable(int id)
{
struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
#
# SPDX-License-Identifier: GPL-2.0+
#
-ifdef CONFIG_SPL_BUILD
-ALL-y += boot.bin
-else
+ifndef CONFIG_SPL_BUILD
ALL-y += u-boot.img
endif
projects / karo-tx-uboot.git / commitdiff