From: Stephen Warren <swarren@wwwdotorg.org>
Date: Wed, 25 Mar 2015 02:07:34 +0000 (-0600)
Subject: ARM: bcm2835: implement phys_to_bus/bus_to_phys
X-Git-Tag: KARO-TX6-2015-09-18~2899
X-Git-Url: https://git.kernelconcepts.de/?p=karo-tx-uboot.git;a=commitdiff_plain;h=1546fcb31d33781027517fd34cf707bf6ab2cda9

ARM: bcm2835: implement phys_to_bus/bus_to_phys

The BCM283[56] contain both a L1 and L2 cache between the GPU (a/k/a
VideoCore CPU?) and DRAM. DMA-capable peripherals can also optionally
access DRAM via this same  L2 cache (although they always bypass the L1
cache). Peripherals select whether to use or bypass the cache via the
top two bits of the bus address.

An IOMMU exists between the ARM CPU and the rest of the system. This
controls whether the ARM CPU's accesses use or bypass the L1 and/or L2
cache. This IOMMU is configured/controlled exclusively by the VideoCore
CPU.

In order for DRAM accesses made by the ARM core to be coherent with
accesses made by other DMA peripherals, we must program a bus address
into those peripherals that causes the peripheral's accesses to use the
same set of caches that the ARM core's accesses will use.

On the RPi1, the VideoCore firmware sets up the IOMMU to enable use of
the L2 cache. This corresponds to addresses based at 0x40000000.

On the RPi2, the VideoCore firmware sets up the IOMMU to disable use of
the L2 cache. This corresponds to addresses based at 0xc0000000.

This patch implements U-Boot's phys_to_bus/bus_to_phys APIs according
to those rules.

For full details of this setup, please see Dom Cobley's description at:
http://lists.denx.de/pipermail/u-boot/2015-March/208201.html
http://permalink.gmane.org/gmane.comp.boot-loaders.u-boot/215038
https://www.mail-archive.com/u-boot@lists.denx.de/msg166568.html

Signed-off-by: Stephen Warren <swarren@wwwdotorg.org>
---

diff --git a/arch/arm/mach-bcm283x/Kconfig b/arch/arm/mach-bcm283x/Kconfig
index b43f2d91fd..0c04c301b2 100644
--- a/arch/arm/mach-bcm283x/Kconfig
+++ b/arch/arm/mach-bcm283x/Kconfig
@@ -23,6 +23,9 @@ config DM_SERIAL
 config DM_GPIO
 	default y
 
+config PHYS_TO_BUS
+	default y
+
 config SYS_BOARD
 	default "rpi" if TARGET_RPI
 	default "rpi_2" if TARGET_RPI_2
diff --git a/arch/arm/mach-bcm283x/Makefile b/arch/arm/mach-bcm283x/Makefile
index 2505428bab..ac27d00e2a 100644
--- a/arch/arm/mach-bcm283x/Makefile
+++ b/arch/arm/mach-bcm283x/Makefile
@@ -5,4 +5,4 @@
 #
 
 obj-$(CONFIG_TARGET_RPI) += lowlevel_init.o
-obj-y	+= init.o reset.o timer.o mbox.o
+obj-y	+= init.o reset.o timer.o mbox.o phys2bus.o
diff --git a/arch/arm/mach-bcm283x/phys2bus.c b/arch/arm/mach-bcm283x/phys2bus.c
new file mode 100644
index 0000000000..fc1c29905d
--- /dev/null
+++ b/arch/arm/mach-bcm283x/phys2bus.c
@@ -0,0 +1,22 @@
+/*
+ * Copyright 2015 Stephen Warren
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#include <config.h>
+#include <phys2bus.h>
+
+unsigned long phys_to_bus(unsigned long phys)
+{
+#ifdef CONFIG_BCM2836
+	return 0xc0000000 | phys;
+#else
+	return 0x40000000 | phys;
+#endif
+}
+
+unsigned long bus_to_phys(unsigned long bus)
+{
+	return bus & ~0xc0000000;
+}