From: Albert ARIBAUD Date: Mon, 2 Jun 2014 06:43:48 +0000 (+0200) Subject: Merge branch 'u-boot-samsung/master' into 'u-boot-arm/master' X-Git-Tag: v2014.07-rc3~4^2~2 X-Git-Url: https://git.kernelconcepts.de/?p=karo-tx-uboot.git;a=commitdiff_plain;h=cc49da249cf2f380d2fed5571fad65ce6494fc95;hp=-c Merge branch 'u-boot-samsung/master' into 'u-boot-arm/master' --- cc49da249cf2f380d2fed5571fad65ce6494fc95 diff --combined drivers/mmc/mmc.c index 8b53ead98f,08187d5f3e..55c2c68cdb --- a/drivers/mmc/mmc.c +++ b/drivers/mmc/mmc.c @@@ -150,8 -150,6 +150,8 @@@ int mmc_send_status(struct mmc *mmc, in #endif return TIMEOUT; } + if (cmd.response[0] & MMC_STATUS_SWITCH_ERROR) + return SWITCH_ERR; return 0; } @@@ -160,6 -158,9 +160,9 @@@ int mmc_set_blocklen(struct mmc *mmc, i { struct mmc_cmd cmd; + if (mmc->card_caps & MMC_MODE_DDR_52MHz) + return 0; + cmd.cmdidx = MMC_CMD_SET_BLOCKLEN; cmd.resp_type = MMC_RSP_R1; cmd.cmdarg = len; @@@ -503,7 -504,7 +506,7 @@@ static int mmc_change_freq(struct mmc * err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, EXT_CSD_HS_TIMING, 1); if (err) - return err; + return err == SWITCH_ERR ? 0 : err; /* Now check to see that it worked */ err = mmc_send_ext_csd(mmc, ext_csd); @@@ -516,10 -517,13 +519,13 @@@ return 0; /* High Speed is set, there are two types: 52MHz and 26MHz */ - if (cardtype & MMC_HS_52MHZ) + if (cardtype & EXT_CSD_CARD_TYPE_52) { + if (cardtype & EXT_CSD_CARD_TYPE_DDR_52) + mmc->card_caps |= MMC_MODE_DDR_52MHz; mmc->card_caps |= MMC_MODE_HS_52MHz | MMC_MODE_HS; - else + } else { mmc->card_caps |= MMC_MODE_HS; + } return 0; } @@@ -552,32 -556,6 +558,32 @@@ static int mmc_set_capacity(struct mmc return 0; } +int mmc_select_hwpart(int dev_num, int hwpart) +{ + struct mmc *mmc = find_mmc_device(dev_num); + int ret; + + if (!mmc) + return -1; + + if (mmc->part_num == hwpart) + return 0; + + if (mmc->part_config == MMCPART_NOAVAILABLE) { + printf("Card doesn't support part_switch\n"); + return -1; + } + + ret = mmc_switch_part(dev_num, hwpart); + if (ret) + return -1; + + mmc->part_num = hwpart; + + return 0; +} + + int mmc_switch_part(int dev_num, unsigned int part_num) { struct mmc *mmc = find_mmc_device(dev_num); @@@ -1082,6 -1060,8 +1088,8 @@@ static int mmc_startup(struct mmc *mmc /* An array of possible bus widths in order of preference */ static unsigned ext_csd_bits[] = { + EXT_CSD_DDR_BUS_WIDTH_8, + EXT_CSD_DDR_BUS_WIDTH_4, EXT_CSD_BUS_WIDTH_8, EXT_CSD_BUS_WIDTH_4, EXT_CSD_BUS_WIDTH_1, @@@ -1089,13 -1069,15 +1097,15 @@@ /* An array to map CSD bus widths to host cap bits */ static unsigned ext_to_hostcaps[] = { + [EXT_CSD_DDR_BUS_WIDTH_4] = MMC_MODE_DDR_52MHz, + [EXT_CSD_DDR_BUS_WIDTH_8] = MMC_MODE_DDR_52MHz, [EXT_CSD_BUS_WIDTH_4] = MMC_MODE_4BIT, [EXT_CSD_BUS_WIDTH_8] = MMC_MODE_8BIT, }; /* An array to map chosen bus width to an integer */ static unsigned widths[] = { - 8, 4, 1, + 8, 4, 8, 4, 1, }; for (idx=0; idx < ARRAY_SIZE(ext_csd_bits); idx++) { @@@ -1338,13 -1320,10 +1348,13 @@@ static int mmc_complete_init(struct mm int mmc_init(struct mmc *mmc) { int err = IN_PROGRESS; - unsigned start = get_timer(0); + unsigned start; if (mmc->has_init) return 0; + + start = get_timer(0); + if (!mmc->init_in_progress) err = mmc_start_init(mmc); diff --combined drivers/power/pmic/Makefile index 920bbdce6e,3244f690b9..9a8bfe07b8 --- a/drivers/power/pmic/Makefile +++ b/drivers/power/pmic/Makefile @@@ -5,11 -5,11 +5,12 @@@ # SPDX-License-Identifier: GPL-2.0+ # +obj-$(CONFIG_POWER_LTC3676) += pmic_ltc3676.o obj-$(CONFIG_POWER_MAX8998) += pmic_max8998.o obj-$(CONFIG_POWER_MAX8997) += pmic_max8997.o obj-$(CONFIG_POWER_MUIC_MAX8997) += muic_max8997.o obj-$(CONFIG_POWER_MAX77686) += pmic_max77686.o obj-$(CONFIG_POWER_PFUZE100) += pmic_pfuze100.o + obj-$(CONFIG_POWER_TPS65090) += pmic_tps65090.o obj-$(CONFIG_POWER_TPS65217) += pmic_tps65217.o obj-$(CONFIG_POWER_TPS65910) += pmic_tps65910.o diff --combined include/configs/mx53evk.h index 5bbae8cf7d,042cdd0323..fb2072d2f0 --- a/include/configs/mx53evk.h +++ b/include/configs/mx53evk.h @@@ -23,8 -23,6 +23,8 @@@ #define CONFIG_INITRD_TAG #define CONFIG_REVISION_TAG +#define CONFIG_SYS_GENERIC_BOARD + #define CONFIG_OF_LIBFDT /* Size of malloc() pool */ @@@ -47,7 -45,7 +47,7 @@@ #define CONFIG_POWER_I2C #define CONFIG_POWER_FSL #define CONFIG_SYS_FSL_PMIC_I2C_ADDR 8 - #define CONFIG_PMIC_FSL_MC13892 + #define CONFIG_POWER_FSL_MC13892 #define CONFIG_RTC_MC13XXX /* MMC Configs */ diff --combined include/configs/mx53loco.h index 12d79b4559,c7f54d4e8c..a74508c5e8 --- a/include/configs/mx53loco.h +++ b/include/configs/mx53loco.h @@@ -22,8 -22,6 +22,8 @@@ #define CONFIG_SETUP_MEMORY_TAGS #define CONFIG_INITRD_TAG +#define CONFIG_SYS_GENERIC_BOARD + /* Size of malloc() pool */ #define CONFIG_SYS_MALLOC_LEN (10 * 1024 * 1024) @@@ -82,7 -80,7 +82,7 @@@ #define CONFIG_POWER_I2C #define CONFIG_DIALOG_POWER #define CONFIG_POWER_FSL - #define CONFIG_PMIC_FSL_MC13892 + #define CONFIG_POWER_FSL_MC13892 #define CONFIG_SYS_DIALOG_PMIC_I2C_ADDR 0x48 #define CONFIG_SYS_FSL_PMIC_I2C_ADDR 0x8 diff --combined include/mmc.h index a3a100bd39,aa2d1ca360..f46572e177 --- a/include/mmc.h +++ b/include/mmc.h @@@ -32,15 -32,13 +32,13 @@@ #define MMC_VERSION_4_41 (MMC_VERSION_MMC | 0x429) #define MMC_VERSION_4_5 (MMC_VERSION_MMC | 0x405) - #define MMC_MODE_HS 0x001 - #define MMC_MODE_HS_52MHz 0x010 - #define MMC_MODE_4BIT 0x100 - #define MMC_MODE_8BIT 0x200 - #define MMC_MODE_SPI 0x400 - #define MMC_MODE_HC 0x800 - - #define MMC_MODE_MASK_WIDTH_BITS (MMC_MODE_4BIT | MMC_MODE_8BIT) - #define MMC_MODE_WIDTH_BITS_SHIFT 8 + #define MMC_MODE_HS (1 << 0) + #define MMC_MODE_HS_52MHz (1 << 1) + #define MMC_MODE_4BIT (1 << 2) + #define MMC_MODE_8BIT (1 << 3) + #define MMC_MODE_SPI (1 << 4) + #define MMC_MODE_HC (1 << 5) + #define MMC_MODE_DDR_52MHz (1 << 6) #define SD_DATA_4BIT 0x00040000 @@@ -54,7 -52,6 +52,7 @@@ #define COMM_ERR -18 /* Communications Error */ #define TIMEOUT -19 #define IN_PROGRESS -20 /* operation is in progress */ +#define SWITCH_ERR -21 /* Card reports failure to switch mode */ #define MMC_CMD_GO_IDLE_STATE 0 #define MMC_CMD_SEND_OP_COND 1 @@@ -71,7 -68,6 +69,7 @@@ #define MMC_CMD_SET_BLOCKLEN 16 #define MMC_CMD_READ_SINGLE_BLOCK 17 #define MMC_CMD_READ_MULTIPLE_BLOCK 18 +#define MMC_CMD_SET_BLOCK_COUNT 23 #define MMC_CMD_WRITE_SINGLE_BLOCK 24 #define MMC_CMD_WRITE_MULTIPLE_BLOCK 25 #define MMC_CMD_ERASE_GROUP_START 35 @@@ -100,9 -96,6 +98,6 @@@ #define SD_HIGHSPEED_BUSY 0x00020000 #define SD_HIGHSPEED_SUPPORTED 0x00020000 - #define MMC_HS_TIMING 0x00000100 - #define MMC_HS_52MHZ 0x2 - #define OCR_BUSY 0x80000000 #define OCR_HCS 0x40000000 #define OCR_VOLTAGE_MASK 0x007FFF80 @@@ -111,7 -104,6 +106,7 @@@ #define SECURE_ERASE 0x80000000 #define MMC_STATUS_MASK (~0x0206BF7F) +#define MMC_STATUS_SWITCH_ERROR (1 << 7) #define MMC_STATUS_RDY_FOR_DATA (1 << 8) #define MMC_STATUS_CURR_STATE (0xf << 9) #define MMC_STATUS_ERROR (1 << 19) @@@ -178,10 -170,16 +173,16 @@@ #define EXT_CSD_CARD_TYPE_26 (1 << 0) /* Card can run at 26MHz */ #define EXT_CSD_CARD_TYPE_52 (1 << 1) /* Card can run at 52MHz */ + #define EXT_CSD_CARD_TYPE_DDR_1_8V (1 << 2) + #define EXT_CSD_CARD_TYPE_DDR_1_2V (1 << 3) + #define EXT_CSD_CARD_TYPE_DDR_52 (EXT_CSD_CARD_TYPE_DDR_1_8V \ + | EXT_CSD_CARD_TYPE_DDR_1_2V) #define EXT_CSD_BUS_WIDTH_1 0 /* Card is in 1 bit mode */ #define EXT_CSD_BUS_WIDTH_4 1 /* Card is in 4 bit mode */ #define EXT_CSD_BUS_WIDTH_8 2 /* Card is in 8 bit mode */ + #define EXT_CSD_DDR_BUS_WIDTH_4 5 /* Card is in 4 bit DDR mode */ + #define EXT_CSD_DDR_BUS_WIDTH_8 6 /* Card is in 8 bit DDR mode */ #define EXT_CSD_BOOT_ACK_ENABLE (1 << 6) #define EXT_CSD_BOOT_PARTITION_ENABLE (1 << 3) @@@ -228,7 -226,6 +229,7 @@@ * boot partitions (2), general purpose partitions (4) in MMC v4.4. */ #define MMC_NUM_BOOT_PARTITION 2 +#define MMC_PART_RPMB 3 /* RPMB partition number */ struct mmc_cid { unsigned long psn; @@@ -340,13 -337,7 +341,13 @@@ int mmc_set_part_conf(struct mmc *mmc, int mmc_set_boot_bus_width(struct mmc *mmc, u8 width, u8 reset, u8 mode); /* Function to modify the RST_n_FUNCTION field of EXT_CSD */ int mmc_set_rst_n_function(struct mmc *mmc, u8 enable); - +/* Functions to read / write the RPMB partition */ +int mmc_rpmb_set_key(struct mmc *mmc, void *key); +int mmc_rpmb_get_counter(struct mmc *mmc, unsigned long *counter); +int mmc_rpmb_read(struct mmc *mmc, void *addr, unsigned short blk, + unsigned short cnt, unsigned char *key); +int mmc_rpmb_write(struct mmc *mmc, void *addr, unsigned short blk, + unsigned short cnt, unsigned char *key); /** * Start device initialization and return immediately; it does not block on * polling OCR (operation condition register) status. Then you should call